This project was created under the Deerfield Academy Computer Science department, Class Com 602 with the guidance of Prof. Benjamin Bakker.
The implementation of the LC3 ("Little Computer 3") uses Clock-Based D-Switches which load the FSM on the rising edge of the clock and implement those changes to gates/components (such as memory, registers, PC, and ALU) on the falling edge of the clock.
Components were created as seperate projects using the Quartus 18.1 Lite Software in order to test the funtionality of each component, as a result, there are many junk files that are not necessary for running a working computer. The files of interest are the Verilog files denoted with a ".v"