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Single_Cycle_RiscV_Processor
Single_Cycle_RiscV_Processor PublicThis project was designed to run on Nexys A7 Artix-7 FPGA Trainer Board. This processor written in System Verilog can run I-Type, R-Type, B-Type, S-Type RISC-V commands. The current instruction set…
SystemVerilog
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Smart_Home_Automation
Smart_Home_Automation PublicA Smart Home Model is being designed by interfacing the HC-05 Bluetooth module with the TIVA C TM4C123GH6PM launchpad. An Android phone will be used as the transmitter to send different commands th…
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Voice-Controlled-Car
Voice-Controlled-Car PublicThe purpose of this project was to develop a robot which can operate on voice commands. To transmit voice commands from our phone to the microcontroller (Tiva-C TM4C123GH6PM Launchpad), Bluetooth M…
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Speaker_Identification
Speaker_Identification PublicReal Time Speaker Identification Using PLP & MFCC Feature Extraction Methods and SVM & GMM-UBM Classification Model
Jupyter Notebook
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Feature_Extraction
Feature_Extraction PublicStudy of Trained ANN & Random Forest Networks for Image Classification using SIFT, SURF & HOG Techniques
Jupyter Notebook
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CNN-Adversarial-Training
CNN-Adversarial-Training PublicAdversarial Training for Enhanced Image Recognition Security
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