fix regresion from apache#14881

reason: svc call may trigger hardfalt Signed-off-by: hujun5 <[email protected]>
hujun260 · Dec 6, 2024 · e3aaf21 · e3aaf21
1 parent 1e49cb4
commit e3aaf21
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Showing 6 changed files with 54 additions and 3 deletions.
diff --git a/arch/arm/src/armv6-m/arm_doirq.c b/arch/arm/src/armv6-m/arm_doirq.c
@@ -56,6 +56,21 @@ void exception_direct(void)
     }
 }
 
+static inline_function bool store_context(int irq, uint32_t *regs)
+{
+  if (NVIC_IRQ_SVCALL == irq && regs[REG_R0] == SYS_restore_context)
+    {
+      return false;
+    }
+
+  if (NVIC_IRQ_HARDFAULT == irq)
+    {
+      return false;
+    }
+
+  return true;
+}
+
 uint32_t *arm_doirq(int irq, uint32_t *regs)
 {
   struct tcb_s **running_task = &g_running_tasks[this_cpu()];
@@ -65,7 +80,7 @@ uint32_t *arm_doirq(int irq, uint32_t *regs)
    * is invalid, and we can safely overwrite it.
    */
 
-  if (!(NVIC_IRQ_SVCALL == irq && regs[REG_R0] == SYS_restore_context))
+  if (store_context(irq, regs))
     {
       tcb->xcp.regs = regs;
     }

diff --git a/arch/arm/src/armv6-m/arm_hardfault.c b/arch/arm/src/armv6-m/arm_hardfault.c
@@ -32,6 +32,7 @@
 #include <debug.h>
 
 #include <arch/irq.h>
+#include <sched/sched.h>
 
 #include "nvic.h"
 #include "arm_internal.h"
@@ -111,6 +112,7 @@ int arm_hardfault(int irq, void *context, void *arg)
         }
     }
 
+  this_task()->xcp.regs = context;
 #if defined(CONFIG_DEBUG_HARDFAULT_ALERT)
   /* Dump some hard fault info */
 

diff --git a/arch/arm/src/armv7-m/arm_doirq.c b/arch/arm/src/armv7-m/arm_doirq.c
@@ -56,6 +56,21 @@ void exception_direct(void)
     }
 }
 
+static inline_function bool store_context(int irq, uint32_t *regs)
+{
+  if (NVIC_IRQ_SVCALL == irq && regs[REG_R0] == SYS_restore_context)
+    {
+      return false;
+    }
+
+  if (NVIC_IRQ_HARDFAULT == irq)
+    {
+      return false;
+    }
+
+  return true;
+}
+
 uint32_t *arm_doirq(int irq, uint32_t *regs)
 {
   struct tcb_s **running_task = &g_running_tasks[this_cpu()];
@@ -65,7 +80,7 @@ uint32_t *arm_doirq(int irq, uint32_t *regs)
    * is invalid, and we can safely overwrite it.
    */
 
-  if (!(NVIC_IRQ_SVCALL == irq && regs[REG_R0] == SYS_restore_context))
+  if (store_context(irq, regs))
     {
       tcb->xcp.regs = regs;
     }

diff --git a/arch/arm/src/armv7-m/arm_hardfault.c b/arch/arm/src/armv7-m/arm_hardfault.c
@@ -34,6 +34,7 @@
 
 #include <nuttx/userspace.h>
 #include <arch/irq.h>
+#include <sched/sched.h>
 
 #include "nvic.h"
 #include "arm_internal.h"
@@ -124,6 +125,7 @@ int arm_hardfault(int irq, void *context, void *arg)
     }
 #endif
 
+  this_task()->xcp.regs = context;
   if (hfsr & NVIC_HFAULTS_FORCED)
     {
       hfalert("Hard Fault escalation:\n");

diff --git a/arch/arm/src/armv8-m/arm_doirq.c b/arch/arm/src/armv8-m/arm_doirq.c
@@ -67,6 +67,21 @@ void exception_direct(void)
     }
 }
 
+static inline_function bool store_context(int irq, uint32_t *regs)
+{
+  if (NVIC_IRQ_SVCALL == irq && regs[REG_R0] == SYS_restore_context)
+    {
+      return false;
+    }
+
+  if (NVIC_IRQ_HARDFAULT == irq)
+    {
+      return false;
+    }
+
+  return true;
+}
+
 uint32_t *arm_doirq(int irq, uint32_t *regs)
 {
   struct tcb_s **running_task = &g_running_tasks[this_cpu()];
@@ -76,7 +91,7 @@ uint32_t *arm_doirq(int irq, uint32_t *regs)
    * is invalid, and we can safely overwrite it.
    */
 
-  if (!(NVIC_IRQ_SVCALL == irq && regs[REG_R0] == SYS_restore_context))
+  if (store_context(irq, regs))
     {
       tcb->xcp.regs = regs;
     }

diff --git a/arch/arm/src/armv8-m/arm_hardfault.c b/arch/arm/src/armv8-m/arm_hardfault.c
@@ -33,6 +33,7 @@
 
 #include <nuttx/userspace.h>
 #include <arch/irq.h>
+#include <sched/sched.h>
 
 #include "nvic.h"
 #include "sau.h"
@@ -127,6 +128,7 @@ int arm_hardfault(int irq, void *context, void *arg)
     }
 #endif
 
+  this_task()->xcp.regs = context;
   if (hfsr & NVIC_HFAULTS_FORCED)
     {
       hfalert("Hard Fault escalation:\n");