Skip to content

Commit

Permalink
virtio-pci: map BAR with the information from capabilities
Browse files Browse the repository at this point in the history
Currently, we map the BAR spaces ahead of time and then match them with the capability they belong to. We can get the slot index from the capability and map the space based on that instead. Although creating a BAR list independent of the capability list could be useful for devices that do not support capability lists, we assume the existence of that support anyways. Fixes #1392.
  • Loading branch information
cagatay-y committed Sep 25, 2024
1 parent cecfc26 commit c56db8d
Show file tree
Hide file tree
Showing 3 changed files with 11 additions and 68 deletions.
53 changes: 0 additions & 53 deletions src/drivers/virtio/env.rs

This file was deleted.

1 change: 0 additions & 1 deletion src/drivers/virtio/mod.rs
Original file line number Diff line number Diff line change
@@ -1,7 +1,6 @@
//! A module containing virtios core infrastructure for hermit-rs.
//!
//! The module contains virtios transport mechanisms, virtqueues and virtio specific errors
pub mod env;
pub mod transport;
pub mod virtqueue;

Expand Down
25 changes: 11 additions & 14 deletions src/drivers/virtio/transport/pci.rs
Original file line number Diff line number Diff line change
Expand Up @@ -37,6 +37,7 @@ use crate::drivers::virtio::error::VirtioError;
any(feature = "tcp", feature = "udp", feature = "vsock")
))]
use crate::drivers::virtio::transport::hardware;
use crate::drivers::virtio::transport::pci::PciBar as VirtioPciBar;
#[cfg(feature = "vsock")]
use crate::drivers::vsock::VirtioVsockDriver;

Expand Down Expand Up @@ -765,10 +766,7 @@ impl PciBar {
///
/// Returns ONLY Virtio specific capabilities, which allow to locate the actual capability
/// structures inside the memory areas, indicated by the BaseAddressRegisters (BAR's).
fn read_caps(
device: &PciDevice<PciConfigRegion>,
bars: &[PciBar],
) -> Result<Vec<PciCap>, PciError> {
fn read_caps(device: &PciDevice<PciConfigRegion>) -> Result<Vec<PciCap>, PciError> {
let device_id = device.device_id();

let capabilities = device
Expand All @@ -780,10 +778,14 @@ fn read_caps(
})
.map(|addr| CapData::read(addr, device.access()).unwrap())
.filter(|cap| cap.cfg_type != CapCfgType::Pci)
.map(|cap| PciCap {
bar: *bars.iter().find(|bar| bar.index == cap.bar).unwrap(),
dev_id: device_id,
cap,
.map(|cap| {
let slot = cap.bar;
let (addr, size) = device.memory_map_bar(slot, true).unwrap();
PciCap {
bar: VirtioPciBar::new(slot, addr.as_u64(), size.try_into().unwrap()),
dev_id: device_id,
cap,
}
})
.collect::<Vec<_>>();

Expand All @@ -795,11 +797,6 @@ fn read_caps(
}
}

/// Maps memory areas indicated by devices BAR's into virtual address space.
fn map_bars(device: &PciDevice<PciConfigRegion>) -> Result<Vec<PciBar>, PciError> {
crate::drivers::virtio::env::pci::map_bar_mem(device)
}

/// Checks if minimal set of capabilities is present.
///
/// INFO: Currently only checks if at least one common config struct has been found and mapped.
Expand Down Expand Up @@ -828,7 +825,7 @@ pub(crate) fn map_caps(device: &PciDevice<PciConfigRegion>) -> Result<UniCapsCol
};

// Get list of PciCaps pointing to capabilities
let cap_list = match read_caps(device, &bar_list) {
let cap_list = match read_caps(device) {
Ok(list) => list,
Err(pci_error) => return Err(pci_error),
};
Expand Down

0 comments on commit c56db8d

Please sign in to comment.