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Generated missing tint e2e tests for ir.dxc.hlsl
For quadSwapX, Y, and Diagonal Change-Id: I84c32cf279c4bb85222a8d52df21b8c7b99890e9 Reviewed-on: https://dawn-review.googlesource.com/c/dawn/+/202634 Commit-Queue: Natalie Chouinard <[email protected]> Auto-Submit: Antonio Maiorano <[email protected]> Reviewed-by: Natalie Chouinard <[email protected]> Reviewed-by: dan sinclair <[email protected]> Commit-Queue: dan sinclair <[email protected]>
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16 changes: 16 additions & 0 deletions
16
test/tint/builtins/gen/literal/quadSwapDiagonal/15ac75.wgsl.expected.ir.dxc.hlsl
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RWByteAddressBuffer prevent_dce : register(u0); | ||
vector<float16_t, 2> quadSwapDiagonal_15ac75() { | ||
vector<float16_t, 2> res = QuadReadAcrossDiagonal((float16_t(1.0h)).xx); | ||
return res; | ||
} | ||
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||
void fragment_main() { | ||
prevent_dce.Store<vector<float16_t, 2> >(0u, quadSwapDiagonal_15ac75()); | ||
} | ||
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[numthreads(1, 1, 1)] | ||
void compute_main() { | ||
prevent_dce.Store<vector<float16_t, 2> >(0u, quadSwapDiagonal_15ac75()); | ||
} | ||
|
16 changes: 16 additions & 0 deletions
16
test/tint/builtins/gen/literal/quadSwapDiagonal/2be5e7.wgsl.expected.ir.dxc.hlsl
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@@ -0,0 +1,16 @@ | ||
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RWByteAddressBuffer prevent_dce : register(u0); | ||
float16_t quadSwapDiagonal_2be5e7() { | ||
float16_t res = QuadReadAcrossDiagonal(float16_t(1.0h)); | ||
return res; | ||
} | ||
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void fragment_main() { | ||
prevent_dce.Store<float16_t>(0u, quadSwapDiagonal_2be5e7()); | ||
} | ||
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[numthreads(1, 1, 1)] | ||
void compute_main() { | ||
prevent_dce.Store<float16_t>(0u, quadSwapDiagonal_2be5e7()); | ||
} | ||
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16 changes: 16 additions & 0 deletions
16
test/tint/builtins/gen/literal/quadSwapDiagonal/331804.wgsl.expected.ir.dxc.hlsl
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RWByteAddressBuffer prevent_dce : register(u0); | ||
float4 quadSwapDiagonal_331804() { | ||
float4 res = QuadReadAcrossDiagonal((1.0f).xxxx); | ||
return res; | ||
} | ||
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||
void fragment_main() { | ||
prevent_dce.Store4(0u, asuint(quadSwapDiagonal_331804())); | ||
} | ||
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[numthreads(1, 1, 1)] | ||
void compute_main() { | ||
prevent_dce.Store4(0u, asuint(quadSwapDiagonal_331804())); | ||
} | ||
|
16 changes: 16 additions & 0 deletions
16
test/tint/builtins/gen/literal/quadSwapDiagonal/348173.wgsl.expected.ir.dxc.hlsl
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RWByteAddressBuffer prevent_dce : register(u0); | ||
uint2 quadSwapDiagonal_348173() { | ||
uint2 res = QuadReadAcrossDiagonal((1u).xx); | ||
return res; | ||
} | ||
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void fragment_main() { | ||
prevent_dce.Store2(0u, quadSwapDiagonal_348173()); | ||
} | ||
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[numthreads(1, 1, 1)] | ||
void compute_main() { | ||
prevent_dce.Store2(0u, quadSwapDiagonal_348173()); | ||
} | ||
|
16 changes: 16 additions & 0 deletions
16
test/tint/builtins/gen/literal/quadSwapDiagonal/486196.wgsl.expected.ir.dxc.hlsl
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RWByteAddressBuffer prevent_dce : register(u0); | ||
float quadSwapDiagonal_486196() { | ||
float res = QuadReadAcrossDiagonal(1.0f); | ||
return res; | ||
} | ||
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void fragment_main() { | ||
prevent_dce.Store(0u, asuint(quadSwapDiagonal_486196())); | ||
} | ||
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[numthreads(1, 1, 1)] | ||
void compute_main() { | ||
prevent_dce.Store(0u, asuint(quadSwapDiagonal_486196())); | ||
} | ||
|
16 changes: 16 additions & 0 deletions
16
test/tint/builtins/gen/literal/quadSwapDiagonal/730e40.wgsl.expected.ir.dxc.hlsl
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RWByteAddressBuffer prevent_dce : register(u0); | ||
uint quadSwapDiagonal_730e40() { | ||
uint res = QuadReadAcrossDiagonal(1u); | ||
return res; | ||
} | ||
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void fragment_main() { | ||
prevent_dce.Store(0u, quadSwapDiagonal_730e40()); | ||
} | ||
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[numthreads(1, 1, 1)] | ||
void compute_main() { | ||
prevent_dce.Store(0u, quadSwapDiagonal_730e40()); | ||
} | ||
|
16 changes: 16 additions & 0 deletions
16
test/tint/builtins/gen/literal/quadSwapDiagonal/8077c8.wgsl.expected.ir.dxc.hlsl
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Original file line number | Diff line number | Diff line change |
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RWByteAddressBuffer prevent_dce : register(u0); | ||
float2 quadSwapDiagonal_8077c8() { | ||
float2 res = QuadReadAcrossDiagonal((1.0f).xx); | ||
return res; | ||
} | ||
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void fragment_main() { | ||
prevent_dce.Store2(0u, asuint(quadSwapDiagonal_8077c8())); | ||
} | ||
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[numthreads(1, 1, 1)] | ||
void compute_main() { | ||
prevent_dce.Store2(0u, asuint(quadSwapDiagonal_8077c8())); | ||
} | ||
|
16 changes: 16 additions & 0 deletions
16
test/tint/builtins/gen/literal/quadSwapDiagonal/856536.wgsl.expected.ir.dxc.hlsl
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@@ -0,0 +1,16 @@ | ||
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RWByteAddressBuffer prevent_dce : register(u0); | ||
uint3 quadSwapDiagonal_856536() { | ||
uint3 res = QuadReadAcrossDiagonal((1u).xxx); | ||
return res; | ||
} | ||
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||
void fragment_main() { | ||
prevent_dce.Store3(0u, quadSwapDiagonal_856536()); | ||
} | ||
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[numthreads(1, 1, 1)] | ||
void compute_main() { | ||
prevent_dce.Store3(0u, quadSwapDiagonal_856536()); | ||
} | ||
|
16 changes: 16 additions & 0 deletions
16
test/tint/builtins/gen/literal/quadSwapDiagonal/9ccb38.wgsl.expected.ir.dxc.hlsl
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RWByteAddressBuffer prevent_dce : register(u0); | ||
int quadSwapDiagonal_9ccb38() { | ||
int res = QuadReadAcrossDiagonal(1); | ||
return res; | ||
} | ||
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void fragment_main() { | ||
prevent_dce.Store(0u, asuint(quadSwapDiagonal_9ccb38())); | ||
} | ||
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||
[numthreads(1, 1, 1)] | ||
void compute_main() { | ||
prevent_dce.Store(0u, asuint(quadSwapDiagonal_9ccb38())); | ||
} | ||
|
16 changes: 16 additions & 0 deletions
16
test/tint/builtins/gen/literal/quadSwapDiagonal/a090b0.wgsl.expected.ir.dxc.hlsl
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,16 @@ | ||
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RWByteAddressBuffer prevent_dce : register(u0); | ||
int2 quadSwapDiagonal_a090b0() { | ||
int2 res = QuadReadAcrossDiagonal((1).xx); | ||
return res; | ||
} | ||
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void fragment_main() { | ||
prevent_dce.Store2(0u, asuint(quadSwapDiagonal_a090b0())); | ||
} | ||
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[numthreads(1, 1, 1)] | ||
void compute_main() { | ||
prevent_dce.Store2(0u, asuint(quadSwapDiagonal_a090b0())); | ||
} | ||
|
16 changes: 16 additions & 0 deletions
16
test/tint/builtins/gen/literal/quadSwapDiagonal/a665b1.wgsl.expected.ir.dxc.hlsl
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,16 @@ | ||
|
||
RWByteAddressBuffer prevent_dce : register(u0); | ||
int4 quadSwapDiagonal_a665b1() { | ||
int4 res = QuadReadAcrossDiagonal((1).xxxx); | ||
return res; | ||
} | ||
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||
void fragment_main() { | ||
prevent_dce.Store4(0u, asuint(quadSwapDiagonal_a665b1())); | ||
} | ||
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[numthreads(1, 1, 1)] | ||
void compute_main() { | ||
prevent_dce.Store4(0u, asuint(quadSwapDiagonal_a665b1())); | ||
} | ||
|
16 changes: 16 additions & 0 deletions
16
test/tint/builtins/gen/literal/quadSwapDiagonal/a82e1d.wgsl.expected.ir.dxc.hlsl
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,16 @@ | ||
|
||
RWByteAddressBuffer prevent_dce : register(u0); | ||
int3 quadSwapDiagonal_a82e1d() { | ||
int3 res = QuadReadAcrossDiagonal((1).xxx); | ||
return res; | ||
} | ||
|
||
void fragment_main() { | ||
prevent_dce.Store3(0u, asuint(quadSwapDiagonal_a82e1d())); | ||
} | ||
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[numthreads(1, 1, 1)] | ||
void compute_main() { | ||
prevent_dce.Store3(0u, asuint(quadSwapDiagonal_a82e1d())); | ||
} | ||
|
16 changes: 16 additions & 0 deletions
16
test/tint/builtins/gen/literal/quadSwapDiagonal/af19a5.wgsl.expected.ir.dxc.hlsl
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,16 @@ | ||
|
||
RWByteAddressBuffer prevent_dce : register(u0); | ||
vector<float16_t, 4> quadSwapDiagonal_af19a5() { | ||
vector<float16_t, 4> res = QuadReadAcrossDiagonal((float16_t(1.0h)).xxxx); | ||
return res; | ||
} | ||
|
||
void fragment_main() { | ||
prevent_dce.Store<vector<float16_t, 4> >(0u, quadSwapDiagonal_af19a5()); | ||
} | ||
|
||
[numthreads(1, 1, 1)] | ||
void compute_main() { | ||
prevent_dce.Store<vector<float16_t, 4> >(0u, quadSwapDiagonal_af19a5()); | ||
} | ||
|
16 changes: 16 additions & 0 deletions
16
test/tint/builtins/gen/literal/quadSwapDiagonal/b905fc.wgsl.expected.ir.dxc.hlsl
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,16 @@ | ||
|
||
RWByteAddressBuffer prevent_dce : register(u0); | ||
float3 quadSwapDiagonal_b905fc() { | ||
float3 res = QuadReadAcrossDiagonal((1.0f).xxx); | ||
return res; | ||
} | ||
|
||
void fragment_main() { | ||
prevent_dce.Store3(0u, asuint(quadSwapDiagonal_b905fc())); | ||
} | ||
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||
[numthreads(1, 1, 1)] | ||
void compute_main() { | ||
prevent_dce.Store3(0u, asuint(quadSwapDiagonal_b905fc())); | ||
} | ||
|
16 changes: 16 additions & 0 deletions
16
test/tint/builtins/gen/literal/quadSwapDiagonal/c31636.wgsl.expected.ir.dxc.hlsl
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,16 @@ | ||
|
||
RWByteAddressBuffer prevent_dce : register(u0); | ||
uint4 quadSwapDiagonal_c31636() { | ||
uint4 res = QuadReadAcrossDiagonal((1u).xxxx); | ||
return res; | ||
} | ||
|
||
void fragment_main() { | ||
prevent_dce.Store4(0u, quadSwapDiagonal_c31636()); | ||
} | ||
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[numthreads(1, 1, 1)] | ||
void compute_main() { | ||
prevent_dce.Store4(0u, quadSwapDiagonal_c31636()); | ||
} | ||
|
16 changes: 16 additions & 0 deletions
16
test/tint/builtins/gen/literal/quadSwapDiagonal/e4bec8.wgsl.expected.ir.dxc.hlsl
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,16 @@ | ||
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||
RWByteAddressBuffer prevent_dce : register(u0); | ||
vector<float16_t, 3> quadSwapDiagonal_e4bec8() { | ||
vector<float16_t, 3> res = QuadReadAcrossDiagonal((float16_t(1.0h)).xxx); | ||
return res; | ||
} | ||
|
||
void fragment_main() { | ||
prevent_dce.Store<vector<float16_t, 3> >(0u, quadSwapDiagonal_e4bec8()); | ||
} | ||
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[numthreads(1, 1, 1)] | ||
void compute_main() { | ||
prevent_dce.Store<vector<float16_t, 3> >(0u, quadSwapDiagonal_e4bec8()); | ||
} | ||
|
16 changes: 16 additions & 0 deletions
16
test/tint/builtins/gen/literal/quadSwapX/02834c.wgsl.expected.ir.dxc.hlsl
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,16 @@ | ||
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||
RWByteAddressBuffer prevent_dce : register(u0); | ||
vector<float16_t, 4> quadSwapX_02834c() { | ||
vector<float16_t, 4> res = QuadReadAcrossX((float16_t(1.0h)).xxxx); | ||
return res; | ||
} | ||
|
||
void fragment_main() { | ||
prevent_dce.Store<vector<float16_t, 4> >(0u, quadSwapX_02834c()); | ||
} | ||
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[numthreads(1, 1, 1)] | ||
void compute_main() { | ||
prevent_dce.Store<vector<float16_t, 4> >(0u, quadSwapX_02834c()); | ||
} | ||
|
16 changes: 16 additions & 0 deletions
16
test/tint/builtins/gen/literal/quadSwapX/053f3b.wgsl.expected.ir.dxc.hlsl
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,16 @@ | ||
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RWByteAddressBuffer prevent_dce : register(u0); | ||
int3 quadSwapX_053f3b() { | ||
int3 res = QuadReadAcrossX((1).xxx); | ||
return res; | ||
} | ||
|
||
void fragment_main() { | ||
prevent_dce.Store3(0u, asuint(quadSwapX_053f3b())); | ||
} | ||
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||
[numthreads(1, 1, 1)] | ||
void compute_main() { | ||
prevent_dce.Store3(0u, asuint(quadSwapX_053f3b())); | ||
} | ||
|
16 changes: 16 additions & 0 deletions
16
test/tint/builtins/gen/literal/quadSwapX/07f1fc.wgsl.expected.ir.dxc.hlsl
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Original file line number | Diff line number | Diff line change |
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@@ -0,0 +1,16 @@ | ||
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||
RWByteAddressBuffer prevent_dce : register(u0); | ||
uint4 quadSwapX_07f1fc() { | ||
uint4 res = QuadReadAcrossX((1u).xxxx); | ||
return res; | ||
} | ||
|
||
void fragment_main() { | ||
prevent_dce.Store4(0u, quadSwapX_07f1fc()); | ||
} | ||
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||
[numthreads(1, 1, 1)] | ||
void compute_main() { | ||
prevent_dce.Store4(0u, quadSwapX_07f1fc()); | ||
} | ||
|
16 changes: 16 additions & 0 deletions
16
test/tint/builtins/gen/literal/quadSwapX/150d6f.wgsl.expected.ir.dxc.hlsl
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,16 @@ | ||
|
||
RWByteAddressBuffer prevent_dce : register(u0); | ||
float3 quadSwapX_150d6f() { | ||
float3 res = QuadReadAcrossX((1.0f).xxx); | ||
return res; | ||
} | ||
|
||
void fragment_main() { | ||
prevent_dce.Store3(0u, asuint(quadSwapX_150d6f())); | ||
} | ||
|
||
[numthreads(1, 1, 1)] | ||
void compute_main() { | ||
prevent_dce.Store3(0u, asuint(quadSwapX_150d6f())); | ||
} | ||
|
16 changes: 16 additions & 0 deletions
16
test/tint/builtins/gen/literal/quadSwapX/19f8ce.wgsl.expected.ir.dxc.hlsl
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,16 @@ | ||
|
||
RWByteAddressBuffer prevent_dce : register(u0); | ||
uint2 quadSwapX_19f8ce() { | ||
uint2 res = QuadReadAcrossX((1u).xx); | ||
return res; | ||
} | ||
|
||
void fragment_main() { | ||
prevent_dce.Store2(0u, quadSwapX_19f8ce()); | ||
} | ||
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||
[numthreads(1, 1, 1)] | ||
void compute_main() { | ||
prevent_dce.Store2(0u, quadSwapX_19f8ce()); | ||
} | ||
|
16 changes: 16 additions & 0 deletions
16
test/tint/builtins/gen/literal/quadSwapX/1e1086.wgsl.expected.ir.dxc.hlsl
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@@ -0,0 +1,16 @@ | ||
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RWByteAddressBuffer prevent_dce : register(u0); | ||
int quadSwapX_1e1086() { | ||
int res = QuadReadAcrossX(1); | ||
return res; | ||
} | ||
|
||
void fragment_main() { | ||
prevent_dce.Store(0u, asuint(quadSwapX_1e1086())); | ||
} | ||
|
||
[numthreads(1, 1, 1)] | ||
void compute_main() { | ||
prevent_dce.Store(0u, asuint(quadSwapX_1e1086())); | ||
} | ||
|
16 changes: 16 additions & 0 deletions
16
test/tint/builtins/gen/literal/quadSwapX/69af6a.wgsl.expected.ir.dxc.hlsl
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,16 @@ | ||
|
||
RWByteAddressBuffer prevent_dce : register(u0); | ||
float4 quadSwapX_69af6a() { | ||
float4 res = QuadReadAcrossX((1.0f).xxxx); | ||
return res; | ||
} | ||
|
||
void fragment_main() { | ||
prevent_dce.Store4(0u, asuint(quadSwapX_69af6a())); | ||
} | ||
|
||
[numthreads(1, 1, 1)] | ||
void compute_main() { | ||
prevent_dce.Store4(0u, asuint(quadSwapX_69af6a())); | ||
} | ||
|
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