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Update version to 0.4.1 depending on verilog-ts-mode 0.1.2
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@gmlarumbe
gmlarumbe committed Dec 20, 2023
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4 changes: 2 additions & 2 deletions verilog-ext.el
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;; Author: Gonzalo Larumbe <[email protected]>
;; URL: https://github.com/gmlarumbe/verilog-ext
;; Version: 0.4.0
;; Version: 0.4.1
;; Keywords: Verilog, IDE, Tools
;; Package-Requires: ((emacs "29.1") (verilog-mode "2023.6.6.141322628") (verilog-ts-mode "0.1.1") (lsp-mode "8.0.0") (ag "0.48") (ripgrep "0.4.0") (hydra "0.15.0") (apheleia "3.1") (yasnippet "0.14.0") (flycheck "32") (outshine "3.0.1") (async "1.9.7"))
;; Package-Requires: ((emacs "29.1") (verilog-mode "2023.6.6.141322628") (verilog-ts-mode "0.1.2") (lsp-mode "8.0.0") (ag "0.48") (ripgrep "0.4.0") (hydra "0.15.0") (apheleia "3.1") (yasnippet "0.14.0") (flycheck "32") (outshine "3.0.1") (async "1.9.7"))

;; This program is free software; you can redistribute it and/or modify
;; it under the terms of the GNU General Public License as published by
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