-
Notifications
You must be signed in to change notification settings - Fork 38
Commit
This commit does not belong to any branch on this repository, and may belong to a fork outside of the repository.
- Loading branch information
1 parent
3702f0d
commit 4ca6dd9
Showing
5 changed files
with
94 additions
and
0 deletions.
There are no files selected for viewing
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,18 @@ | ||
Implementer: Fujitsu Ltd. | ||
CPU type: 000000000000001e | ||
HW_CAP: advsimd fp sve(64) atomic | ||
# of CPU cores: 48 | ||
Data cache level: 2 | ||
L1D cache size: 65536 | ||
L2 cache size: 8388608 | ||
L1D cache sharing cores: 1 | ||
L2 cache sharing cores: 12 | ||
|
||
numCores=48 | ||
L1, 3, 65536, 65536, 0, 1, 1, 0 | ||
L2, 4, 0, 0, 8388608, 0, 0, 12 | ||
L3, 0, 0, 0, 0, 0, 0, 0 | ||
L4, 0, 0, 0, 0, 0, 0, 0 | ||
L5, 0, 0, 0, 0, 0, 0, 0 | ||
L6, 0, 0, 0, 0, 0, 0, 0 | ||
L7, 0, 0, 0, 0, 0, 0, 0 |
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,18 @@ | ||
Implementer: Arm Limited | ||
CPU type: 0000000000000006 | ||
HW_CAP: advsimd fp | ||
# of CPU cores: 4 | ||
Data cache level: 2 | ||
L1D cache size: 32768 | ||
L2 cache size: 2097152 | ||
L1D cache sharing cores: 1 | ||
L2 cache sharing cores: 4 | ||
|
||
numCores=4 | ||
L1, 3, 49152, 32768, 0, 1, 1, 0 | ||
L2, 4, 0, 0, 2097152, 0, 0, 4 | ||
L3, 0, 0, 0, 0, 0, 0, 0 | ||
L4, 0, 0, 0, 0, 0, 0, 0 | ||
L5, 0, 0, 0, 0, 0, 0, 0 | ||
L6, 0, 0, 0, 0, 0, 0, 0 | ||
L7, 0, 0, 0, 0, 0, 0, 0 |
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,18 @@ | ||
Implementer: Apple Inc. | ||
CPU type: 0000000000000016 | ||
HW_CAP: advsimd fp atomic | ||
# of CPU cores: 8 | ||
Data cache level: 2 | ||
L1D cache size: 65536 | ||
L2 cache size: 4194304 | ||
L1D cache sharing cores: 1 | ||
L2 cache sharing cores: 4 | ||
|
||
numCores=8 | ||
L1, 3, 131072, 65536, 0, 1, 1, 0 | ||
L2, 4, 0, 0, 4194304, 0, 0, 4 | ||
L3, 4, 0, 0, 0, 0, 0, 0 | ||
L4, 0, 0, 0, 0, 0, 0, 0 | ||
L5, 0, 0, 0, 0, 0, 0, 0 | ||
L6, 0, 0, 0, 0, 0, 0, 0 | ||
L7, 0, 0, 0, 0, 0, 0, 0 |
20 changes: 20 additions & 0 deletions
20
sample/cpuinfo.WindowsDevKit2023.Snapdragon_8cx_Gen3.windows.11.txt
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,20 @@ | ||
Implementer: Reserved for software use | ||
CPU type: 0000000000000012 | ||
HW_CAP: advsimd atomic | ||
# of CPU cores: 8 | ||
Data cache level: 3 | ||
L1D cache size: 65536 | ||
L2 cache size: 1048576 | ||
L3 cache size: 8388608 | ||
L1D cache sharing cores: 1 | ||
L2 cache sharing cores: 1 | ||
L3 cache sharing cores: 8 | ||
|
||
numCores=8 | ||
L1, 3, 65536, 65536, 0, 1, 1, 0 | ||
L2, 4, 0, 0, 1048576, 0, 0, 1 | ||
L3, 4, 0, 0, 8388608, 0, 0, 8 | ||
L4, 0, 0, 0, 0, 0, 0, 0 | ||
L5, 0, 0, 0, 0, 0, 0, 0 | ||
L6, 0, 0, 0, 0, 0, 0, 0 | ||
L7, 0, 0, 0, 0, 0, 0, 0 |
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,20 @@ | ||
Implementer: Arm Limited | ||
CPU type: 000000000000003e | ||
HW_CAP: advsimd fp sve(32) atomic bf16 | ||
# of CPU cores: 1 | ||
Data cache level: 3 | ||
L1D cache size: 65536 | ||
L2 cache size: 1048576 | ||
L3 cache size: 33554432 | ||
L1D cache sharing cores: 1 | ||
L2 cache sharing cores: 1 | ||
L3 cache sharing cores: 1 | ||
|
||
numCores=1 | ||
L1, 3, 65536, 65536, 0, 1, 1, 0 | ||
L2, 4, 0, 0, 1048576, 0, 0, 1 | ||
L3, 4, 0, 0, 33554432, 0, 0, 1 | ||
L4, 0, 0, 0, 0, 0, 0, 0 | ||
L5, 0, 0, 0, 0, 0, 0, 0 | ||
L6, 0, 0, 0, 0, 0, 0, 0 | ||
L7, 0, 0, 0, 0, 0, 0, 0 |