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clang-format
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fifield committed Sep 11, 2024
1 parent fd2c56a commit 2592c81
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Showing 3 changed files with 16 additions and 16 deletions.
7 changes: 4 additions & 3 deletions include/aie/Targets/AIETargets.h
Original file line number Diff line number Diff line change
Expand Up @@ -40,11 +40,12 @@ mlir::LogicalResult AIETranslateToNPU(mlir::ModuleOp module,
mlir::LogicalResult AIETranslateToNPU(mlir::ModuleOp, std::vector<uint32_t> &,
llvm::StringRef sequenceName = "");
mlir::LogicalResult
AIETranslateControlPacketsToUI32Vec(mlir::ModuleOp module, llvm::raw_ostream &output,
llvm::StringRef sequenceName = "");
AIETranslateControlPacketsToUI32Vec(mlir::ModuleOp module,
llvm::raw_ostream &output,
llvm::StringRef sequenceName = "");
mlir::LogicalResult
AIETranslateControlPacketsToUI32Vec(mlir::ModuleOp, std::vector<uint32_t> &,
llvm::StringRef sequenceName = "");
llvm::StringRef sequenceName = "");
mlir::LogicalResult AIETranslateToLdScript(mlir::ModuleOp module,
llvm::raw_ostream &output,
int tileCol, int tileRow);
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10 changes: 5 additions & 5 deletions lib/Conversion/AIEToConfiguration/AIEToConfiguration.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -185,9 +185,10 @@ parseTransactionBinary(const std::vector<uint8_t> &data,
return num_cols;
}

static LogicalResult
generateTxn(AIERTControl &ctl, const StringRef workDirPath, DeviceOp &targetOp,
bool aieSim, bool enableElfs, bool enableInit, bool enableCores) {
static LogicalResult generateTxn(AIERTControl &ctl, const StringRef workDirPath,
DeviceOp &targetOp, bool aieSim,
bool enableElfs, bool enableInit,
bool enableCores) {
if (enableElfs && !targetOp.getOps<CoreOp>().empty() &&
failed(ctl.addAieElfs(targetOp, workDirPath, aieSim)))
return failure();
Expand Down Expand Up @@ -223,8 +224,7 @@ struct ConvertAIEToTransactionPass
// start collecting transations
XAie_StartTransaction(&ctl.devInst, XAIE_TRANSACTION_DISABLE_AUTO_FLUSH);

auto result =
generateTxn(ctl, clElfDir, device, aieSim, true, true, true);
auto result = generateTxn(ctl, clElfDir, device, aieSim, true, true, true);
if (failed(result))
return signalPassFailure();

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15 changes: 7 additions & 8 deletions lib/Targets/AIETargetNPU.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -254,10 +254,9 @@ LogicalResult xilinx::AIE::AIETranslateToNPU(ModuleOp module,
return success();
}

LogicalResult
xilinx::AIE::AIETranslateControlPacketsToUI32Vec(ModuleOp module,
std::vector<uint32_t> &instructions,
StringRef sequenceName) {
LogicalResult xilinx::AIE::AIETranslateControlPacketsToUI32Vec(
ModuleOp module, std::vector<uint32_t> &instructions,
StringRef sequenceName) {
DeviceOp deviceOp = *module.getOps<DeviceOp>().begin();
auto sequenceOps = deviceOp.getOps<AIEX::RuntimeSequenceOp>();
for (auto seq : sequenceOps) {
Expand Down Expand Up @@ -297,11 +296,11 @@ xilinx::AIE::AIETranslateControlPacketsToUI32Vec(ModuleOp module,
return success();
}

LogicalResult
xilinx::AIE::AIETranslateControlPacketsToUI32Vec(ModuleOp module, raw_ostream &output,
StringRef sequenceName) {
LogicalResult xilinx::AIE::AIETranslateControlPacketsToUI32Vec(
ModuleOp module, raw_ostream &output, StringRef sequenceName) {
std::vector<uint32_t> instructions;
auto r = AIETranslateControlPacketsToUI32Vec(module, instructions, sequenceName);
auto r =
AIETranslateControlPacketsToUI32Vec(module, instructions, sequenceName);
if (failed(r))
return r;
for (auto w : instructions)
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