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Really fix build
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Signed-off-by: falkTX <[email protected]>
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falkTX committed Aug 31, 2023
1 parent a13a5bd commit d5a0063
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Showing 2 changed files with 4 additions and 4 deletions.
4 changes: 2 additions & 2 deletions source/modules/zita-resampler/resampler.cc
Original file line number Diff line number Diff line change
Expand Up @@ -241,7 +241,7 @@ bool Resampler::process (void)
c1 = _table->_ctab + hl * ph;
c2 = _table->_ctab + hl * (np - ph);

#if defined(__SSE2_MATH__)
#if defined(__SSE2_MATH__) && !defined(CARLA_OS_WIN)
__m128 C1, C2, Q1, Q2, S;
for (j = 0; j < _nchan; j++)
{
Expand All @@ -262,7 +262,7 @@ bool Resampler::process (void)
*out_data++ = S [0] + S [1] + S [2] + S [3];
}

#elif defined(__ARM_NEON) || defined(__ARM_NEON__)
#elif (defined(__ARM_NEON) || defined(__ARM_NEON__)) && !defined(CARLA_OS_WIN)
// ARM64 version by Nicolas Belin <[email protected]>
float32x4_t *C1 = (float32x4_t *)c1;
float32x4_t *C2 = (float32x4_t *)c2;
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4 changes: 2 additions & 2 deletions source/modules/zita-resampler/vresampler.cc
Original file line number Diff line number Diff line change
Expand Up @@ -251,7 +251,7 @@ bool VResampler::process (void)
q1 = _table->_ctab + hl * n;
q2 = _table->_ctab + hl * (np - n);

#if defined(__SSE2_MATH__)
#if defined(__SSE2_MATH__) && !defined(CARLA_OS_WIN)
__m128 C1, C2, Q1, Q2, S;
C1 = _mm_load1_ps (&a);
C2 = _mm_load1_ps (&b);
Expand Down Expand Up @@ -285,7 +285,7 @@ bool VResampler::process (void)
*out_data++ = S [0] + S [1] + S [2] + S [3];
}

#elif defined(__ARM_NEON) || defined(__ARM_NEON__)
#elif (defined(__ARM_NEON) || defined(__ARM_NEON__)) && !defined(CARLA_OS_WIN)
// ARM64 version by Nicolas Belin <[email protected]>
float32x4_t *C1 = (float32x4_t *)_c1;
float32x4_t *C2 = (float32x4_t *)_c2;
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