IDF release/v4.4 0456f9746a

espressif · Feb 3, 2024 · 5214bab · 5214bab
1 parent a1461aa
commit 5214bab
Show file tree

Hide file tree

Showing 175 changed files with 321 additions and 88 deletions.
diff --git a/platform.txt b/platform.txt
diff --git a/tools/platformio-build-esp32.py b/tools/platformio-build-esp32.py
@@ -334,7 +334,7 @@
         "UNITY_INCLUDE_CONFIG_H",
         "WITH_POSIX",
         "_GNU_SOURCE",
-        ("IDF_VER", '\\"v4.4.6-440-g27ec26d2d3-dirty\\"'),
+        ("IDF_VER", '\\"v4.4.6-467-g0456f9746a-dirty\\"'),
         "ESP_PLATFORM",
         "_POSIX_READER_WRITER_LOCKS",
         "ARDUINO_ARCH_ESP32",

diff --git a/tools/platformio-build-esp32c3.py b/tools/platformio-build-esp32c3.py
@@ -331,7 +331,7 @@
         "UNITY_INCLUDE_CONFIG_H",
         "WITH_POSIX",
         "_GNU_SOURCE",
-        ("IDF_VER", '\\"v4.4.6-440-g27ec26d2d3-dirty\\"'),
+        ("IDF_VER", '\\"v4.4.6-467-g0456f9746a-dirty\\"'),
         "ESP_PLATFORM",
         "_POSIX_READER_WRITER_LOCKS",
         "ARDUINO_ARCH_ESP32",

diff --git a/tools/platformio-build-esp32s2.py b/tools/platformio-build-esp32s2.py
@@ -317,7 +317,7 @@
         "UNITY_INCLUDE_CONFIG_H",
         "WITH_POSIX",
         "_GNU_SOURCE",
-        ("IDF_VER", '\\"v4.4.6-440-g27ec26d2d3-dirty\\"'),
+        ("IDF_VER", '\\"v4.4.6-467-g0456f9746a-dirty\\"'),
         "ESP_PLATFORM",
         "_POSIX_READER_WRITER_LOCKS",
         "ARDUINO_ARCH_ESP32",

diff --git a/tools/platformio-build-esp32s3.py b/tools/platformio-build-esp32s3.py
@@ -333,7 +333,7 @@
         "UNITY_INCLUDE_CONFIG_H",
         "WITH_POSIX",
         "_GNU_SOURCE",
-        ("IDF_VER", '\\"v4.4.6-440-g27ec26d2d3-dirty\\"'),
+        ("IDF_VER", '\\"v4.4.6-467-g0456f9746a-dirty\\"'),
         "ESP_PLATFORM",
         "_POSIX_READER_WRITER_LOCKS",
         "ARDUINO_ARCH_ESP32",

diff --git a/tools/sdk/esp32/dio_qspi/include/sdkconfig.h b/tools/sdk/esp32/dio_qspi/include/sdkconfig.h
@@ -19,14 +19,14 @@
 #define CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE 1
 #define CONFIG_BOOTLOADER_LOG_LEVEL_NONE 1
 #define CONFIG_BOOTLOADER_LOG_LEVEL 0
+#define CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT 1
 #define CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V 1
 #define CONFIG_BOOTLOADER_REGION_PROTECTION_ENABLE 1
 #define CONFIG_BOOTLOADER_WDT_ENABLE 1
 #define CONFIG_BOOTLOADER_WDT_TIME_MS 9000
 #define CONFIG_BOOTLOADER_APP_ROLLBACK_ENABLE 1
 #define CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP 1
 #define CONFIG_BOOTLOADER_RESERVE_RTC_SIZE 0x10
-#define CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT 1
 #define CONFIG_ESPTOOLPY_BAUD_OTHER_VAL 115200
 #define CONFIG_ESPTOOLPY_FLASHMODE_DIO 1
 #define CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_STR 1
@@ -502,6 +502,7 @@
 #define CONFIG_LWIP_DHCP_GET_NTP_SRV 1
 #define CONFIG_LWIP_DHCP_MAX_NTP_SERVERS 1
 #define CONFIG_LWIP_SNTP_UPDATE_DELAY 10800000
+#define CONFIG_LWIP_DNS_MAX_SERVERS 3
 #define CONFIG_LWIP_ESP_LWIP_ASSERT 1
 #define CONFIG_LWIP_HOOK_TCP_ISN_DEFAULT 1
 #define CONFIG_LWIP_HOOK_IP6_ROUTE_NONE 1
@@ -843,5 +844,5 @@
 #define CONFIG_ULP_COPROC_ENABLED CONFIG_ESP32_ULP_COPROC_ENABLED
 #define CONFIG_ULP_COPROC_RESERVE_MEM CONFIG_ESP32_ULP_COPROC_RESERVE_MEM
 #define CONFIG_WARN_WRITE_STRINGS CONFIG_COMPILER_WARN_WRITE_STRINGS
-#define CONFIG_ARDUINO_IDF_COMMIT "27ec26d2d3"
+#define CONFIG_ARDUINO_IDF_COMMIT "0456f9746a"
 #define CONFIG_ARDUINO_IDF_BRANCH "release/v4.4"
diff --git a/tools/sdk/esp32/dio_qspi/libspi_flash.a b/tools/sdk/esp32/dio_qspi/libspi_flash.a
diff --git a/tools/sdk/esp32/dout_qspi/include/sdkconfig.h b/tools/sdk/esp32/dout_qspi/include/sdkconfig.h
@@ -19,14 +19,14 @@
 #define CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE 1
 #define CONFIG_BOOTLOADER_LOG_LEVEL_NONE 1
 #define CONFIG_BOOTLOADER_LOG_LEVEL 0
+#define CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT 1
 #define CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V 1
 #define CONFIG_BOOTLOADER_REGION_PROTECTION_ENABLE 1
 #define CONFIG_BOOTLOADER_WDT_ENABLE 1
 #define CONFIG_BOOTLOADER_WDT_TIME_MS 9000
 #define CONFIG_BOOTLOADER_APP_ROLLBACK_ENABLE 1
 #define CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP 1
 #define CONFIG_BOOTLOADER_RESERVE_RTC_SIZE 0x10
-#define CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT 1
 #define CONFIG_ESPTOOLPY_BAUD_OTHER_VAL 115200
 #define CONFIG_ESPTOOLPY_FLASHMODE_DOUT 1
 #define CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_STR 1
@@ -502,6 +502,7 @@
 #define CONFIG_LWIP_DHCP_GET_NTP_SRV 1
 #define CONFIG_LWIP_DHCP_MAX_NTP_SERVERS 1
 #define CONFIG_LWIP_SNTP_UPDATE_DELAY 10800000
+#define CONFIG_LWIP_DNS_MAX_SERVERS 3
 #define CONFIG_LWIP_ESP_LWIP_ASSERT 1
 #define CONFIG_LWIP_HOOK_TCP_ISN_DEFAULT 1
 #define CONFIG_LWIP_HOOK_IP6_ROUTE_NONE 1
@@ -843,5 +844,5 @@
 #define CONFIG_ULP_COPROC_ENABLED CONFIG_ESP32_ULP_COPROC_ENABLED
 #define CONFIG_ULP_COPROC_RESERVE_MEM CONFIG_ESP32_ULP_COPROC_RESERVE_MEM
 #define CONFIG_WARN_WRITE_STRINGS CONFIG_COMPILER_WARN_WRITE_STRINGS
-#define CONFIG_ARDUINO_IDF_COMMIT "27ec26d2d3"
+#define CONFIG_ARDUINO_IDF_COMMIT "0456f9746a"
 #define CONFIG_ARDUINO_IDF_BRANCH "release/v4.4"
diff --git a/tools/sdk/esp32/dout_qspi/libspi_flash.a b/tools/sdk/esp32/dout_qspi/libspi_flash.a
diff --git a/tools/sdk/esp32/include/bootloader_support/include/bootloader_flash_override.h b/tools/sdk/esp32/include/bootloader_support/include/bootloader_flash_override.h
@@ -96,7 +96,7 @@ extern const bootloader_qio_info_t __attribute__((weak)) bootloader_flash_qe_sup
   */
 esp_err_t IRAM_ATTR __attribute__((weak)) bootloader_flash_unlock(void);
 
-#if CONFIG_SPI_FLASH_OCTAL_32BIT_ADDR_ENABLE
+#if CONFIG_BOOTLOADER_CACHE_32BIT_ADDR_OCTAL_FLASH
 /**
  * @brief Enable 32bits address flash(larger than 16MB) can map to cache.
  *

diff --git a/tools/sdk/esp32/include/lwip/port/esp32/include/lwipopts.h b/tools/sdk/esp32/include/lwip/port/esp32/include/lwipopts.h
@@ -3,7 +3,7 @@
  *
  * SPDX-License-Identifier: BSD-3-Clause
  *
- * SPDX-FileContributor: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileContributor: 2015-2024 Espressif Systems (Shanghai) CO LTD
  */
 
 #ifndef __LWIPOPTS_H__
@@ -375,8 +375,16 @@ static inline uint32_t timeout_from_offered(uint32_t lease, uint32_t min)
  */
 #define LWIP_DNS                        1
 
-#define DNS_MAX_SERVERS                 3
-#define DNS_FALLBACK_SERVER_INDEX        (DNS_MAX_SERVERS - 1)
+#define DNS_MAX_SERVERS                 CONFIG_LWIP_DNS_MAX_SERVERS
+#define DNS_FALLBACK_SERVER_INDEX       (DNS_MAX_SERVERS - 1)
+
+#ifdef CONFIG_LWIP_FALLBACK_DNS_SERVER_SUPPORT
+#define FALLBACK_DNS_SERVER_ADDRESS(address)                           \
+        do {    ip_addr_t *server_dns = address;                            \
+                char server_ip[] = CONFIG_LWIP_FALLBACK_DNS_SERVER_ADDRESS; \
+                ipaddr_aton(server_ip, server_dns);                         \
+        } while (0)
+#endif /* CONFIG_LWIP_FALLBACK_DNS_SERVER_SUPPORT */
 
 /*
    ---------------------------------
@@ -1123,6 +1131,7 @@ static inline uint32_t timeout_from_offered(uint32_t lease, uint32_t min)
 #define ESP_LWIP_LOCK                   1
 #define ESP_THREAD_PROTECTION           1
 #define ESP_IP_FORWARD                  1
+#define ESP_LWIP_FALLBACK_DNS_PREFER_IPV4 0
 
 #ifdef CONFIG_LWIP_IPV6_AUTOCONFIG
 #define ESP_IPV6_AUTOCONFIG             CONFIG_LWIP_IPV6_AUTOCONFIG

diff --git a/tools/sdk/esp32/include/spi_flash/include/esp_flash.h b/tools/sdk/esp32/include/spi_flash/include/esp_flash.h
@@ -172,6 +172,8 @@ esp_err_t esp_flash_get_size(esp_flash_t *chip, uint32_t *out_size);
 esp_err_t esp_flash_get_physical_size(esp_flash_t *chip, uint32_t *flash_size);
 
 /** @brief Read flash unique ID via the common "RDUID" SPI flash command.
+ *
+ * @note This is an optional feature, which is not supported on all flash chips. READ PROGRAMMING GUIDE FIRST!
  *
  * @param chip Pointer to identify flash chip. Must have been successfully initialised via esp_flash_init().
  * @param[out] out_id Pointer to receive unique ID value.

diff --git a/tools/sdk/esp32/include/spi_flash/include/esp_private/spi_flash_os.h b/tools/sdk/esp32/include/spi_flash/include/esp_private/spi_flash_os.h
@@ -139,9 +139,14 @@ bool spi_timing_is_tuned(void);
  */
 void spi_flash_set_vendor_required_regs(void);
 
+#if CONFIG_SPI_FLASH_HPM_ON
 /**
  * @brief Enable SPI flash high performance mode.
  *
+ * @note 1. When `CONFIG_SPI_FLASH_HPM_ON` is True, caller can always call this function without taking whether the used
+ *          frequency falls into the HPM range into consideration.
+ *       2. However, caller shouldn't attempt to call this function on Octal flash.
+ *
  * @return ESP_OK if success.
  */
 esp_err_t spi_flash_enable_high_performance_mode(void);
@@ -161,6 +166,7 @@ const spi_flash_hpm_dummy_conf_t *spi_flash_hpm_get_dummy(void);
  * @return true Yes, and work under HPM with adjusting dummy. Otherwise, false.
  */
 bool spi_flash_hpm_dummy_adjust(void);
+#endif //CONFIG_SPI_FLASH_HPM_ON
 
 #ifdef __cplusplus
 }

diff --git a/tools/sdk/esp32/ld/sections.ld b/tools/sdk/esp32/ld/sections.ld
diff --git a/tools/sdk/esp32/lib/libapp_update.a b/tools/sdk/esp32/lib/libapp_update.a
diff --git a/tools/sdk/esp32/lib/libbt.a b/tools/sdk/esp32/lib/libbt.a
diff --git a/tools/sdk/esp32/lib/libesp32-camera.a b/tools/sdk/esp32/lib/libesp32-camera.a
diff --git a/tools/sdk/esp32/lib/libesp_common.a b/tools/sdk/esp32/lib/libesp_common.a
diff --git a/tools/sdk/esp32/lib/libesp_diagnostics.a b/tools/sdk/esp32/lib/libesp_diagnostics.a
diff --git a/tools/sdk/esp32/lib/libesp_https_ota.a b/tools/sdk/esp32/lib/libesp_https_ota.a
diff --git a/tools/sdk/esp32/lib/libesp_hw_support.a b/tools/sdk/esp32/lib/libesp_hw_support.a
diff --git a/tools/sdk/esp32/lib/libesp_insights.a b/tools/sdk/esp32/lib/libesp_insights.a
diff --git a/tools/sdk/esp32/lib/libesp_littlefs.a b/tools/sdk/esp32/lib/libesp_littlefs.a
diff --git a/tools/sdk/esp32/lib/libesp_phy.a b/tools/sdk/esp32/lib/libesp_phy.a
diff --git a/tools/sdk/esp32/lib/libesp_rainmaker.a b/tools/sdk/esp32/lib/libesp_rainmaker.a
diff --git a/tools/sdk/esp32/lib/libesp_system.a b/tools/sdk/esp32/lib/libesp_system.a
diff --git a/tools/sdk/esp32/lib/libespcoredump.a b/tools/sdk/esp32/lib/libespcoredump.a
diff --git a/tools/sdk/esp32/lib/libespressif__esp_secure_cert_mgr.a b/tools/sdk/esp32/lib/libespressif__esp_secure_cert_mgr.a
diff --git a/tools/sdk/esp32/lib/libfatfs.a b/tools/sdk/esp32/lib/libfatfs.a
diff --git a/tools/sdk/esp32/lib/libhal.a b/tools/sdk/esp32/lib/libhal.a
diff --git a/tools/sdk/esp32/lib/libnvs_flash.a b/tools/sdk/esp32/lib/libnvs_flash.a
diff --git a/tools/sdk/esp32/lib/librmaker_common.a b/tools/sdk/esp32/lib/librmaker_common.a
diff --git a/tools/sdk/esp32/lib/librtc_store.a b/tools/sdk/esp32/lib/librtc_store.a
diff --git a/tools/sdk/esp32/lib/libspiffs.a b/tools/sdk/esp32/lib/libspiffs.a
diff --git a/tools/sdk/esp32/lib/libwear_levelling.a b/tools/sdk/esp32/lib/libwear_levelling.a
diff --git a/tools/sdk/esp32/qio_qspi/include/sdkconfig.h b/tools/sdk/esp32/qio_qspi/include/sdkconfig.h
@@ -20,14 +20,14 @@
 #define CONFIG_BOOTLOADER_LOG_LEVEL_NONE 1
 #define CONFIG_BOOTLOADER_LOG_LEVEL 0
 #define CONFIG_BOOTLOADER_SPI_WP_PIN 7
+#define CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT 1
 #define CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V 1
 #define CONFIG_BOOTLOADER_REGION_PROTECTION_ENABLE 1
 #define CONFIG_BOOTLOADER_WDT_ENABLE 1
 #define CONFIG_BOOTLOADER_WDT_TIME_MS 9000
 #define CONFIG_BOOTLOADER_APP_ROLLBACK_ENABLE 1
 #define CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP 1
 #define CONFIG_BOOTLOADER_RESERVE_RTC_SIZE 0x10
-#define CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT 1
 #define CONFIG_ESPTOOLPY_BAUD_OTHER_VAL 115200
 #define CONFIG_ESPTOOLPY_FLASHMODE_QIO 1
 #define CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_STR 1
@@ -502,6 +502,7 @@
 #define CONFIG_LWIP_DHCP_GET_NTP_SRV 1
 #define CONFIG_LWIP_DHCP_MAX_NTP_SERVERS 1
 #define CONFIG_LWIP_SNTP_UPDATE_DELAY 10800000
+#define CONFIG_LWIP_DNS_MAX_SERVERS 3
 #define CONFIG_LWIP_ESP_LWIP_ASSERT 1
 #define CONFIG_LWIP_HOOK_TCP_ISN_DEFAULT 1
 #define CONFIG_LWIP_HOOK_IP6_ROUTE_NONE 1
@@ -843,5 +844,5 @@
 #define CONFIG_ULP_COPROC_ENABLED CONFIG_ESP32_ULP_COPROC_ENABLED
 #define CONFIG_ULP_COPROC_RESERVE_MEM CONFIG_ESP32_ULP_COPROC_RESERVE_MEM
 #define CONFIG_WARN_WRITE_STRINGS CONFIG_COMPILER_WARN_WRITE_STRINGS
-#define CONFIG_ARDUINO_IDF_COMMIT "27ec26d2d3"
+#define CONFIG_ARDUINO_IDF_COMMIT "0456f9746a"
 #define CONFIG_ARDUINO_IDF_BRANCH "release/v4.4"
diff --git a/tools/sdk/esp32/qio_qspi/libspi_flash.a b/tools/sdk/esp32/qio_qspi/libspi_flash.a
diff --git a/tools/sdk/esp32/qout_qspi/include/sdkconfig.h b/tools/sdk/esp32/qout_qspi/include/sdkconfig.h
@@ -20,14 +20,14 @@
 #define CONFIG_BOOTLOADER_LOG_LEVEL_NONE 1
 #define CONFIG_BOOTLOADER_LOG_LEVEL 0
 #define CONFIG_BOOTLOADER_SPI_WP_PIN 7
+#define CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT 1
 #define CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V 1
 #define CONFIG_BOOTLOADER_REGION_PROTECTION_ENABLE 1
 #define CONFIG_BOOTLOADER_WDT_ENABLE 1
 #define CONFIG_BOOTLOADER_WDT_TIME_MS 9000
 #define CONFIG_BOOTLOADER_APP_ROLLBACK_ENABLE 1
 #define CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP 1
 #define CONFIG_BOOTLOADER_RESERVE_RTC_SIZE 0x10
-#define CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT 1
 #define CONFIG_ESPTOOLPY_BAUD_OTHER_VAL 115200
 #define CONFIG_ESPTOOLPY_FLASHMODE_QOUT 1
 #define CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_STR 1
@@ -502,6 +502,7 @@
 #define CONFIG_LWIP_DHCP_GET_NTP_SRV 1
 #define CONFIG_LWIP_DHCP_MAX_NTP_SERVERS 1
 #define CONFIG_LWIP_SNTP_UPDATE_DELAY 10800000
+#define CONFIG_LWIP_DNS_MAX_SERVERS 3
 #define CONFIG_LWIP_ESP_LWIP_ASSERT 1
 #define CONFIG_LWIP_HOOK_TCP_ISN_DEFAULT 1
 #define CONFIG_LWIP_HOOK_IP6_ROUTE_NONE 1
@@ -843,5 +844,5 @@
 #define CONFIG_ULP_COPROC_ENABLED CONFIG_ESP32_ULP_COPROC_ENABLED
 #define CONFIG_ULP_COPROC_RESERVE_MEM CONFIG_ESP32_ULP_COPROC_RESERVE_MEM
 #define CONFIG_WARN_WRITE_STRINGS CONFIG_COMPILER_WARN_WRITE_STRINGS
-#define CONFIG_ARDUINO_IDF_COMMIT "27ec26d2d3"
+#define CONFIG_ARDUINO_IDF_COMMIT "0456f9746a"
 #define CONFIG_ARDUINO_IDF_BRANCH "release/v4.4"
diff --git a/tools/sdk/esp32/qout_qspi/libspi_flash.a b/tools/sdk/esp32/qout_qspi/libspi_flash.a
diff --git a/tools/sdk/esp32/sdkconfig b/tools/sdk/esp32/sdkconfig
@@ -50,8 +50,16 @@ CONFIG_BOOTLOADER_LOG_LEVEL_NONE=y
 # CONFIG_BOOTLOADER_LOG_LEVEL_DEBUG is not set
 # CONFIG_BOOTLOADER_LOG_LEVEL_VERBOSE is not set
 CONFIG_BOOTLOADER_LOG_LEVEL=0
+
+#
+# Serial Flash Configurations
+#
 # CONFIG_BOOTLOADER_SPI_CUSTOM_WP_PIN is not set
 CONFIG_BOOTLOADER_SPI_WP_PIN=7
+# CONFIG_BOOTLOADER_FLASH_DC_AWARE is not set
+CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT=y
+# end of Serial Flash Configurations
+
 CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V=y
 # CONFIG_BOOTLOADER_FACTORY_RESET is not set
 # CONFIG_BOOTLOADER_APP_TEST is not set
@@ -66,7 +74,6 @@ CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP=y
 # CONFIG_BOOTLOADER_SKIP_VALIDATE_ALWAYS is not set
 CONFIG_BOOTLOADER_RESERVE_RTC_SIZE=0x10
 # CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC is not set
-CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT=y
 # end of Bootloader config
 
 #
@@ -898,6 +905,10 @@ CONFIG_ESP_IPC_ISR_ENABLE=y
 # LCD and Touch Panel
 #
 
+#
+# LCD Touch Drivers are maintained in the IDF Component Registry
+#
+
 #
 # LCD Peripheral Configuration
 #
@@ -1349,6 +1360,13 @@ CONFIG_LWIP_DHCP_MAX_NTP_SERVERS=1
 CONFIG_LWIP_SNTP_UPDATE_DELAY=10800000
 # end of SNTP
 
+#
+# DNS
+#
+CONFIG_LWIP_DNS_MAX_SERVERS=3
+# CONFIG_LWIP_FALLBACK_DNS_SERVER_SUPPORT is not set
+# end of DNS
+
 CONFIG_LWIP_ESP_LWIP_ASSERT=y
 
 #
@@ -1589,6 +1607,20 @@ CONFIG_PTHREAD_TASK_CORE_DEFAULT=-1
 CONFIG_PTHREAD_TASK_NAME_DEFAULT="pthread"
 # end of PThreads
 
+#
+# Main Flash configuration
+#
+
+#
+# Optional and Experimental Features (READ DOCS FIRST)
+#
+
+#
+# Features here require specific hardware (READ DOCS FIRST!)
+#
+# end of Optional and Experimental Features (READ DOCS FIRST)
+# end of Main Flash configuration
+
 #
 # SPI Flash driver
 #

diff --git a/tools/sdk/esp32c3/dio_qspi/include/sdkconfig.h b/tools/sdk/esp32c3/dio_qspi/include/sdkconfig.h
@@ -19,14 +19,14 @@
 #define CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE 1
 #define CONFIG_BOOTLOADER_LOG_LEVEL_NONE 1
 #define CONFIG_BOOTLOADER_LOG_LEVEL 0
+#define CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT 1
 #define CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V 1
 #define CONFIG_BOOTLOADER_REGION_PROTECTION_ENABLE 1
 #define CONFIG_BOOTLOADER_WDT_ENABLE 1
 #define CONFIG_BOOTLOADER_WDT_TIME_MS 9000
 #define CONFIG_BOOTLOADER_APP_ROLLBACK_ENABLE 1
 #define CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP 1
 #define CONFIG_BOOTLOADER_RESERVE_RTC_SIZE 0x10
-#define CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT 1
 #define CONFIG_SECURE_BOOT_SUPPORTS_RSA 1
 #define CONFIG_SECURE_TARGET_HAS_SECURE_ROM_DL_MODE 1
 #define CONFIG_BOOT_ROM_LOG_ALWAYS_ON 1
@@ -492,6 +492,7 @@
 #define CONFIG_LWIP_DHCP_GET_NTP_SRV 1
 #define CONFIG_LWIP_DHCP_MAX_NTP_SERVERS 1
 #define CONFIG_LWIP_SNTP_UPDATE_DELAY 10800000
+#define CONFIG_LWIP_DNS_MAX_SERVERS 3
 #define CONFIG_LWIP_ESP_LWIP_ASSERT 1
 #define CONFIG_LWIP_HOOK_TCP_ISN_DEFAULT 1
 #define CONFIG_LWIP_HOOK_IP6_ROUTE_NONE 1
@@ -847,5 +848,5 @@
 #define CONFIG_TOOLPREFIX CONFIG_SDK_TOOLPREFIX
 #define CONFIG_UDP_RECVMBOX_SIZE CONFIG_LWIP_UDP_RECVMBOX_SIZE
 #define CONFIG_WARN_WRITE_STRINGS CONFIG_COMPILER_WARN_WRITE_STRINGS
-#define CONFIG_ARDUINO_IDF_COMMIT "27ec26d2d3"
+#define CONFIG_ARDUINO_IDF_COMMIT "0456f9746a"
 #define CONFIG_ARDUINO_IDF_BRANCH "release/v4.4"
diff --git a/tools/sdk/esp32c3/dio_qspi/libspi_flash.a b/tools/sdk/esp32c3/dio_qspi/libspi_flash.a
diff --git a/tools/sdk/esp32c3/dout_qspi/include/sdkconfig.h b/tools/sdk/esp32c3/dout_qspi/include/sdkconfig.h
@@ -19,14 +19,14 @@
 #define CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE 1
 #define CONFIG_BOOTLOADER_LOG_LEVEL_NONE 1
 #define CONFIG_BOOTLOADER_LOG_LEVEL 0
+#define CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT 1
 #define CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V 1
 #define CONFIG_BOOTLOADER_REGION_PROTECTION_ENABLE 1
 #define CONFIG_BOOTLOADER_WDT_ENABLE 1
 #define CONFIG_BOOTLOADER_WDT_TIME_MS 9000
 #define CONFIG_BOOTLOADER_APP_ROLLBACK_ENABLE 1
 #define CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP 1
 #define CONFIG_BOOTLOADER_RESERVE_RTC_SIZE 0x10
-#define CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT 1
 #define CONFIG_SECURE_BOOT_SUPPORTS_RSA 1
 #define CONFIG_SECURE_TARGET_HAS_SECURE_ROM_DL_MODE 1
 #define CONFIG_BOOT_ROM_LOG_ALWAYS_ON 1
@@ -492,6 +492,7 @@
 #define CONFIG_LWIP_DHCP_GET_NTP_SRV 1
 #define CONFIG_LWIP_DHCP_MAX_NTP_SERVERS 1
 #define CONFIG_LWIP_SNTP_UPDATE_DELAY 10800000
+#define CONFIG_LWIP_DNS_MAX_SERVERS 3
 #define CONFIG_LWIP_ESP_LWIP_ASSERT 1
 #define CONFIG_LWIP_HOOK_TCP_ISN_DEFAULT 1
 #define CONFIG_LWIP_HOOK_IP6_ROUTE_NONE 1
@@ -847,5 +848,5 @@
 #define CONFIG_TOOLPREFIX CONFIG_SDK_TOOLPREFIX
 #define CONFIG_UDP_RECVMBOX_SIZE CONFIG_LWIP_UDP_RECVMBOX_SIZE
 #define CONFIG_WARN_WRITE_STRINGS CONFIG_COMPILER_WARN_WRITE_STRINGS
-#define CONFIG_ARDUINO_IDF_COMMIT "27ec26d2d3"
+#define CONFIG_ARDUINO_IDF_COMMIT "0456f9746a"
 #define CONFIG_ARDUINO_IDF_BRANCH "release/v4.4"
diff --git a/tools/sdk/esp32c3/dout_qspi/libspi_flash.a b/tools/sdk/esp32c3/dout_qspi/libspi_flash.a
diff --git a/tools/sdk/esp32c3/include/bootloader_support/include/bootloader_flash_override.h b/tools/sdk/esp32c3/include/bootloader_support/include/bootloader_flash_override.h
@@ -96,7 +96,7 @@ extern const bootloader_qio_info_t __attribute__((weak)) bootloader_flash_qe_sup
   */
 esp_err_t IRAM_ATTR __attribute__((weak)) bootloader_flash_unlock(void);
 
-#if CONFIG_SPI_FLASH_OCTAL_32BIT_ADDR_ENABLE
+#if CONFIG_BOOTLOADER_CACHE_32BIT_ADDR_OCTAL_FLASH
 /**
  * @brief Enable 32bits address flash(larger than 16MB) can map to cache.
  *