test output whether all simulated modules are found

emsec · Mar 1, 2024 · 857a567 · 857a567
1 parent da4fe3e
commit 857a567
Showing 1 changed file with 6 additions and 0 deletions.
diff --git a/plugins/simulator/netlist_simulator_controller/src/netlist_simulator_controller.cpp b/plugins/simulator/netlist_simulator_controller/src/netlist_simulator_controller.cpp
@@ -884,6 +884,7 @@ namespace hal
         for (const Gate* g: mSimulationInput->get_gates())
         {
             Module* m = g->get_module();
+            // test all parent modules whether gates are contained in simulation
             while (m)
             {
                 auto it = containedModules.find(m);
@@ -899,6 +900,11 @@ namespace hal
                 m = m->get_parent_module();
             }
         }
+        for (const auto &it : containedModules)
+        {
+            if (it.second.empty())
+                std::cerr << it.first->get_id() << " mod simulated <" << it.first->get_name() << ">" << std::endl;
+        }
     }
 
     void NetlistSimulatorController::add_gates(const std::vector<Gate*>& gates)