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getvictor edited this page Jul 27, 2013
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EDA Playground gives engineers immediate hands-on exposure to simulating Verilog/SystemVerilog/VHDL. All you need is a web browser. The goal is to accelerate learning of design/testbench development with easier code sharing, and with simpler access to simulators and libraries.
- With a simple click, run your code and see console output in real time. Pick another simulator version and run it again.
- Save and share your code snippets with others by sending them a link. Perfect for web forum discussions or emails. Great for asking questions: Why am I seeing this result?, or sharing your knowledge: This is how I would do it.
- Quickly try something out
- Try out some new SystemVerilog syntax before using it on your project. For example, Does this simulator version support IEEE 1800-2012 syntax?
- Try out a library that you're thinking of using without installing it. Does it do what you expect?
- Modify your friend's shared code and run it.
- Browse and use a large repository of working code examples and templates.
The following simulators can be used.
On public EDA Playground
- All simulators available on public version.
- Any additional simulators that your company/university has developed or has licenses for.
Request new features and bug fixes here: https://github.com/getvictor/eda-playground/issues
EDA Playground was created in May 2013 by Victor Lyuboslavsky.