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Enable Floating Point Exceptions #1619
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src/core/hashTable.cc
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@@ -515,7 +515,8 @@ void HashTable_O::sxhash_eql(HashGenerator& hg, T_sp obj) { | |||
return; | |||
} | |||
case gctools::single_float_tag: { | |||
hg.addValue0(std::abs(::floor(obj.unsafe_single_float()))); | |||
float value = obj.unsafe_single_float(); | |||
hg.addValue0((std::fpclassify(value) == FP_ZERO) ? 0u : float_convert<float>::to_bits(value)); |
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does float_convert
not work on zeroes somehow? If it doesn't, this should probably be mentioned in a comment in float_convert
.
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No the issue is that standard requires that -0.0 and 0.0 behave the same in hashes.
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okay, that makes sense for the others, but for an eql hash they should be distinct, right? Since they're not eql
? Unless there's a hash table specific rule I'm missing here.
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In addition to the tests in sxhash.lsp it is tested by gethash in all varieties.
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Actually, I'm wrong. The only gethash test that requires that is equalp. Apologies, I'll fix it.
// printf("Enter handle_fpe Signo: %d Errno:%d Code:%d\n", (info->si_signo), (info->si_errno), (info->si_code)); | ||
// init_float_traps(); // WHY | ||
if (_lisp) { | ||
feenableexcept(_lisp->getTrapFpeBits()); |
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handle_fpe is a signal handler and should be as reentrant as possible. It would be possible for an interrupt to occur between enable and disable here - true elsewhere as well of course. Is there any way we can do this atomically? I imagine not, but it would be nice.
Also, why is this code restoring the floating point traps necessary? Does receiving an FPE warp the traps somehow? An explanation in a comment would be appreciated. Also an explanation for why the if (_lisp)
check - because this can happen extremely early, maybe?
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The interrupts should get queued. On amd64 the traps are all reset on SIGFPE so you have to restore them. This is not true on Aarch64.
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The if (_lisp)
check is just there because I am paranoid.
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Ok, could you mention the reset in a comment? Also, do you have a doc reference for this or is it just what you've observed.
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Just what I have observed, but I'll look for a reference. I think it might originate with how FPE is enabled/disabled. On amd64 FPE is always on until you mask it to off and then the mask is reset. Whereas on aarch64 the FPE is off until you explicitly enable it. Aarch64 doesn't have the concept of "masking."
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