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The book "Writing a RISC-V Emulator from Scratch in 10 Steps".

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Writing a RISC-V Emulator in Rust

Introduction

NOTE: This project is actively ongoing. Pages are not perfect and they can change soon.

This is the book for writing a 64-bit RISC-V emulator from scratch in Rust. It shows us how to implement an emulator in 10 steps. You can run xv6, a simple Unix-like OS, in your emulator in the final step.

You'll learn the following basic computer architecture from making an emulator in Rust:

  • Basic RISC-V architecture
  • Instruction sets
  • Privileged architecture
  • Exceptions
  • Interrupts
  • Peripheral devices
    • UART
    • PLIC
    • CLINT
    • Virtio
  • Virtual memory system

The source code is available at d0iasm/rvemu-for-book.

Step Content
Step 1 CPU with Two Instructions
Step 2 Memory and System Bus
Step 3 Control and Status Registers
Step 4 Privileged Architecture
Step 5 Exceptions
Step 6 PLIC (a platform-level interrupt controller) and CLINT (a core-local interrupter)
Step 7 UART (a universal asynchronous receiver-transmitter)
Step 8 Interrupts
Step 9 Virtio
Step 10 Virtual Memory System

Congratulations🎉 Now you can run xv6 in your emulator!

The author is @d0iasm and please feel free to ask and request anything to me via Twitter or GitHub issues!

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