stm32/h7: Implemented support changing the clock routed to the USB pe…

…ripherals in the RCC
blackmagic-debug · Aug 11, 2024 · 0f4be32 · 0f4be32
1 parent fb55765
commit 0f4be32
Show file tree

Hide file tree

Showing 2 changed files with 16 additions and 9 deletions.
diff --git a/include/libopencm3/stm32/h7/rcc.h b/include/libopencm3/stm32/h7/rcc.h
@@ -407,15 +407,16 @@ LGPL License Terms @ref lgpl_license
 #define RCC_D2CCIP1R_SAISEL_PERCK       0x4
 /**@}*/
 
-#define RCC_D2CCIP2R_LPTIM1SEL_SHIFT        28
-#define RCC_D2CCIP2R_CECSEL_SHIFT           22
-#define RCC_D2CCIP2R_USBSEL_SHIFT           20
-#define RCC_D2CCIP2R_I2C123SEL_SHIFT        12
-#define RCC_D2CCIP2R_RNGSEL_MASK            0x3
-#define RCC_D2CCIP2R_RNGSEL_SHIFT           8
-#define RCC_D2CCIP2R_USART16SEL_SHIFT       3
-#define RCC_D2CCIP2R_USART234578SEL_SHIFT   0
-#define RCC_D2CCIP2R_USARTSEL_MASK          7
+#define RCC_D2CCIP2R_LPTIM1SEL_SHIFT        28U
+#define RCC_D2CCIP2R_CECSEL_SHIFT           22U
+#define RCC_D2CCIP2R_USBSEL_MASK            0x3U
+#define RCC_D2CCIP2R_USBSEL_SHIFT           20U
+#define RCC_D2CCIP2R_I2C123SEL_SHIFT        12U
+#define RCC_D2CCIP2R_RNGSEL_MASK            0x3U
+#define RCC_D2CCIP2R_RNGSEL_SHIFT           8U
+#define RCC_D2CCIP2R_USART16SEL_SHIFT       3U
+#define RCC_D2CCIP2R_USART234578SEL_SHIFT   0U
+#define RCC_D2CCIP2R_USARTSEL_MASK          7U
 
 /** @defgroup rcc_d2ccip2r_values RCC_D2CCIP2R Values
  * @ingroup rcc_registers

diff --git a/lib/stm32/h7/rcc.c b/lib/stm32/h7/rcc.c
@@ -417,6 +417,12 @@ void rcc_set_peripheral_clk_sel(uint32_t periph, uint32_t sel) {
 			mask = RCC_D2CCIP2R_USARTSEL_MASK << RCC_D2CCIP2R_USART234578SEL_SHIFT;
 			val = sel << RCC_D2CCIP2R_USART234578SEL_SHIFT;
 			break;
+		case USB1_OTG_HS_BASE:
+		case USB2_OTG_FS_BASE:
+			reg = &RCC_D2CCIP2R;
+			mask = RCC_D2CCIP2R_USBSEL_MASK << RCC_D2CCIP2R_USBSEL_SHIFT;
+			val = sel << RCC_D2CCIP2R_USBSEL_SHIFT;
+			break;
 
 		default:
 			cm3_assert_not_reached();