Fix: -Wformat for tc_printf

Signed-off-by: Hristo Mitrev <[email protected]>
blackmagic-debug · Aug 18, 2024 · db48ed5 · db48ed5
1 parent ac2605c
commit db48ed5
Show file tree

Hide file tree

Showing 15 changed files with 49 additions and 40 deletions.
diff --git a/src/target/ch579.c b/src/target/ch579.c
@@ -136,7 +136,7 @@ bool ch579_probe(target_s *target)
 {
 	uint8_t chip_id = target_mem32_read8(target, CH579_R8_CHIP_ID);
 	if (chip_id != 0x79) {
-		DEBUG_ERROR("Not CH579! 0x%02" PRIx8 "\n", chip_id);
+		DEBUG_ERROR("Not CH579! 0x%02x\n", chip_id);
 		return false;
 	}
 

diff --git a/src/target/efm32.c b/src/target/efm32.c
@@ -581,7 +581,7 @@ bool efm32_probe(target_s *t)
 	/* Setup Target */
 	t->target_options |= TOPT_INHIBIT_NRST;
 	t->driver = priv_storage->efm32_variant_string;
-	tc_printf(t, "flash size %u page size %u\n", flash_size, flash_page_size);
+	tc_printf(t, "flash size %" PRIu32 " page size %" PRIu32 "\n", flash_size, flash_page_size);
 
 	target_add_ram32(t, SRAM_BASE, ram_size);
 	efm32_add_flash(t, 0x00000000, flash_size, flash_page_size);
@@ -744,11 +744,11 @@ static bool efm32_cmd_serial(target_s *t, int argc, const char **argv)
 		break;
 
 	default:
-		tc_printf(t, "Bad DI version %hhu! This driver doesn't know about this DI version\n", di_version);
+		tc_printf(t, "Bad DI version %u! This driver doesn't know about this DI version\n", di_version);
 		return false;
 	}
 
-	tc_printf(t, "Unique Number: 0x%016llx\n", unique);
+	tc_printf(t, "Unique Number: 0x%08" PRIx32 "%08" PRIx32 "\n", (uint32_t)(unique >> 32U), (uint32_t)unique);
 
 	return true;
 }
@@ -768,15 +768,15 @@ static bool efm32_cmd_efm_info(target_s *t, int argc, const char **argv)
 
 	switch (di_version) {
 	case 1:
-		tc_printf(t, "DI version 1 (silabs remix?) base 0x%08" PRIx32 "\n\n", EFM32_V1_DI);
+		tc_printf(t, "DI version 1 (silabs remix?) base 0x%08" PRIx16 "\n\n", EFM32_V1_DI);
 		break;
 
 	case 2:
-		tc_printf(t, "DI version 2 (energy micro remix?) base 0x%08" PRIx32 "\n\n", EFM32_V2_DI);
+		tc_printf(t, "DI version 2 (energy micro remix?) base 0x%08" PRIx16 "\n\n", EFM32_V2_DI);
 		break;
 
 	default:
-		tc_printf(t, "Bad DI version %hhu! This driver doesn't know about this DI version\n", di_version);
+		tc_printf(t, "Bad DI version %u! This driver doesn't know about this DI version\n", di_version);
 		return false;
 	}
 
@@ -791,8 +791,8 @@ static bool efm32_cmd_efm_info(target_s *t, int argc, const char **argv)
 
 	tc_printf(t, "%s %hu F%hu = %s %hukiB flash, %hukiB ram\n", device->name, part_number, flash_kib,
 		device->description, flash_kib, ram_kib);
-	tc_printf(t, "Device says flash page size is %u bytes, we're using %u bytes\n", flash_page_size_reported,
-		flash_page_size);
+	tc_printf(t, "Device says flash page size is %" PRIu32 " bytes, we're using %" PRIu32 " bytes\n",
+		flash_page_size_reported, flash_page_size);
 	if (flash_page_size_reported < flash_page_size) {
 		tc_printf(t, "This is bad, flash writes may be corrupted\n");
 	}
@@ -814,7 +814,7 @@ static bool efm32_cmd_efm_info(target_s *t, int argc, const char **argv)
 			}
 		}
 
-		tc_printf(t, "Package %s %hhu pins\n", pkgtype->name, miscchip.pincount);
+		tc_printf(t, "Package %s %u pins\n", pkgtype->name, miscchip.pincount);
 		tc_printf(t, "Temperature grade %s\n", tempgrade->name);
 		tc_printf(t, "\n");
 	}

diff --git a/src/target/lpc546xx.c b/src/target/lpc546xx.c
@@ -208,7 +208,7 @@ static bool lpc546xx_cmd_read_partid(target_s *target, int argc, const char **ar
 	iap_result_s result;
 	if (lpc_iap_call(flash, &result, IAP_CMD_PARTID))
 		return false;
-	tc_printf(target, "PART ID: 0x%08x\n", result.values[0]);
+	tc_printf(target, "PART ID: 0x%08" PRIx32 "\n", result.values[0]);
 	return true;
 }
 

diff --git a/src/target/nrf51.c b/src/target/nrf51.c
@@ -277,7 +277,7 @@ static bool nrf51_cmd_read_hwid(target_s *t, int argc, const char **argv)
 	(void)argc;
 	(void)argv;
 	uint32_t hwid = target_mem32_read32(t, NRF51_FICR_CONFIGID) & 0xffffU;
-	tc_printf(t, "Hardware ID: 0x%04X\n", hwid);
+	tc_printf(t, "Hardware ID: 0x%04" PRIX32 "\n", hwid);
 
 	return true;
 }
@@ -287,7 +287,7 @@ static bool nrf51_cmd_read_fwid(target_s *t, int argc, const char **argv)
 	(void)argc;
 	(void)argv;
 	uint32_t fwid = (target_mem32_read32(t, NRF51_FICR_CONFIGID) >> 16U) & 0xffffU;
-	tc_printf(t, "Firmware ID: 0x%04X\n", fwid);
+	tc_printf(t, "Firmware ID: 0x%04" PRIX32 "\n", fwid);
 
 	return true;
 }
@@ -299,7 +299,7 @@ static bool nrf51_cmd_read_deviceid(target_s *t, int argc, const char **argv)
 	uint32_t deviceid_low = target_mem32_read32(t, NRF51_FICR_DEVICEID_LOW);
 	uint32_t deviceid_high = target_mem32_read32(t, NRF51_FICR_DEVICEID_HIGH);
 
-	tc_printf(t, "Device ID: 0x%08X%08X\n", deviceid_high, deviceid_low);
+	tc_printf(t, "Device ID: 0x%08" PRIX32 "%08" PRIX32 "\n", deviceid_high, deviceid_low);
 
 	return true;
 }
@@ -328,7 +328,7 @@ static bool nrf51_cmd_read_deviceinfo(target_s *t, int argc, const char **argv)
 	di.flash = target_mem32_read32(t, NRF51_FICR_DEVICE_INFO_FLASH);
 	di.variant.f = target_mem32_read32(t, NRF51_FICR_DEVICE_INFO_VARIANT);
 
-	tc_printf(t, "Part:\t\tNRF%X\n", di.part);
+	tc_printf(t, "Part:\t\tNRF%" PRIX32 "\n", di.part);
 	tc_printf(t, "Variant:\t%c%c%c%c\n", di.variant.c[3], di.variant.c[2], di.variant.c[1], di.variant.c[0]);
 	tc_printf(t, "Package:\t");
 	switch (di.package) {
@@ -345,12 +345,12 @@ static bool nrf51_cmd_read_deviceinfo(target_s *t, int argc, const char **argv)
 		tc_printf(t, "QIxx\n");
 		break;
 	default:
-		tc_printf(t, "Unknown (Code %X)\n", di.package);
+		tc_printf(t, "Unknown (Code %" PRIX32 ")\n", di.package);
 		break;
 	}
 
-	tc_printf(t, "Ram:\t\t%ukiB\n", di.ram);
-	tc_printf(t, "Flash:\t\t%ukiB\n", di.flash);
+	tc_printf(t, "Ram:\t\t%" PRIu32 "kiB\n", di.ram);
+	tc_printf(t, "Flash:\t\t%" PRIu32 "kiB\n", di.flash);
 	return true;
 }
 
@@ -363,9 +363,9 @@ static bool nrf51_cmd_read_deviceaddr(target_s *t, int argc, const char **argv)
 	uint32_t addr_high = target_mem32_read32(t, NRF51_FICR_DEVICEADDR_HIGH) & 0xffffU;
 
 	if (!(addr_type & 1U))
-		tc_printf(t, "Publicly Listed Address: 0x%04X%08X\n", addr_high, addr_low);
+		tc_printf(t, "Publicly Listed Address: 0x%04" PRIX32 "%08" PRIX32 "\n", addr_high, addr_low);
 	else
-		tc_printf(t, "Randomly Assigned Address: 0x%04X%08X\n", addr_high, addr_low);
+		tc_printf(t, "Randomly Assigned Address: 0x%04" PRIX32 "%08" PRIX32 "\n", addr_high, addr_low);
 
 	return true;
 }

diff --git a/src/target/renesas_ra.c b/src/target/renesas_ra.c
@@ -956,7 +956,7 @@ static bool renesas_uid(target_s *const target, const int argc, const char **con
 
 	tc_printf(target, "Unique id: 0x");
 	for (size_t i = 0U; i < 16U; i++)
-		tc_printf(target, "%02" PRIx8, uid[i]);
+		tc_printf(target, "%02x", uid[i]);
 	tc_printf(target, "\n");
 
 	return true;

diff --git a/src/target/sam3x.c b/src/target/sam3x.c
@@ -626,7 +626,7 @@ static bool sam_cmd_gpnvm(target_s *t, int argc, const char **argv)
 	uint32_t gpnvm = 0;
 	if (!sam_gpnvm_get(t, base, &gpnvm))
 		return false;
-	tc_printf(t, "GPNVM: 0x%08X\n", gpnvm);
+	tc_printf(t, "GPNVM: 0x%08" PRIX32 "\n", gpnvm);
 
 	if (drv == DRIVER_SAMX7X && (mask & GPNVM_SAMX7X_TCM_BIT_MASK)) {
 		sam_priv_s *storage = (sam_priv_s *)t->target_storage;

diff --git a/src/target/samd.c b/src/target/samd.c
@@ -846,7 +846,7 @@ static bool samd_cmd_serial(target_s *t, int argc, const char **argv)
 	tc_printf(t, "Serial Number: 0x");
 
 	for (size_t i = 0; i < 4U; ++i)
-		tc_printf(t, "%08x", target_mem32_read32(t, SAMD_NVM_SERIAL(i)));
+		tc_printf(t, "%08" PRIx32 "", target_mem32_read32(t, SAMD_NVM_SERIAL(i)));
 	tc_printf(t, "\n");
 	return true;
 }

diff --git a/src/target/samx5x.c b/src/target/samx5x.c
@@ -730,7 +730,7 @@ static bool samx5x_cmd_serial(target_s *t, int argc, const char **argv)
 	tc_printf(t, "Serial Number: 0x");
 
 	for (size_t i = 0; i < 4U; ++i)
-		tc_printf(t, "%08x", target_mem32_read32(t, SAMX5X_NVM_SERIAL(i)));
+		tc_printf(t, "%08" PRIx32 "", target_mem32_read32(t, SAMX5X_NVM_SERIAL(i)));
 	tc_printf(t, "\n");
 	return true;
 }

diff --git a/src/target/semihosting.c b/src/target/semihosting.c
@@ -741,7 +741,7 @@ int32_t semihosting_exit(target_s *const target, const semihosting_exit_reason_e
 	if (reason == EXIT_REASON_APPLICATION_EXIT)
 		tc_printf(target, "exit(%" PRIu32 ")\n", status_code);
 	else
-		tc_printf(target, "Exception trapped: %" PRIx32 " (%" PRIu32 ")\n", reason, status_code);
+		tc_printf(target, "Exception trapped: %x (%" PRIu32 ")\n", reason, status_code);
 	target_halt_resume(target, true);
 	return 0;
 }

diff --git a/src/target/stm32f1.c b/src/target/stm32f1.c
@@ -1075,8 +1075,8 @@ static bool stm32f1_cmd_option(target_s *target, int argc, const char **argv)
 	for (size_t i = 0U; i < 16U; i += 4U) {
 		const uint32_t addr = FLASH_OBP_RDP + i;
 		const uint32_t val = target_mem32_read32(target, addr);
-		tc_printf(target, "0x%08X: 0x%04X\n", addr, val & 0xffffU);
-		tc_printf(target, "0x%08X: 0x%04X\n", addr + 2U, val >> 16U);
+		tc_printf(target, "0x%08" PRIX32 ": 0x%04" PRIX32 "\n", addr, val & 0xffffU);
+		tc_printf(target, "0x%08" PRIX32 ": 0x%04" PRIX32 "\n", addr + 2U, val >> 16U);
 	}
 
 	return true;

diff --git a/src/target/stm32g0.c b/src/target/stm32g0.c
@@ -673,7 +673,7 @@ static void stm32g0_display_registers(target_s *target)
 {
 	for (size_t i = 0; i < OPT_REG_COUNT; ++i) {
 		const uint32_t val = target_mem32_read32(target, options_def[i].addr);
-		tc_printf(target, "0x%08X: 0x%08X\n", options_def[i].addr, val);
+		tc_printf(target, "0x%08" PRIX32 ": 0x%08" PRIX32 "\n", options_def[i].addr, val);
 	}
 }
 

diff --git a/src/target/stm32h7.c b/src/target/stm32h7.c
@@ -682,7 +682,7 @@ static bool stm32h7_crc(target_s *target, int argc, const char **argv)
 	if (!stm32h7_crc_bank(target, STM32H7_FLASH_BANK2_BASE))
 		return false;
 	uint32_t crc2 = target_mem32_read32(target, STM32H7_FPEC2_BASE + STM32H7_FLASH_CRCDATA);
-	tc_printf(target, "CRC: bank1 0x%08lx, bank2 0x%08lx\n", crc1, crc2);
+	tc_printf(target, "CRC: bank1 0x%08" PRIx32 ", bank2 0x%08" PRIx32 " \n", crc1, crc2);
 	return true;
 }
 

diff --git a/src/target/stm32l0.c b/src/target/stm32l0.c
@@ -757,7 +757,7 @@ static bool stm32lx_cmd_option(target_s *const target, const int argc, const cha
 		uint32_t val = strtoul(argv[3], NULL, 0);
 		if (!raw_write)
 			val = (val & 0xffffU) | ((~val & 0xffffU) << 16U);
-		tc_printf(target, "%s %08x <- %08x\n", argv[1], addr, val);
+		tc_printf(target, "%s %08" PRIx32 " <- %08" PRIx32 "\n", argv[1], addr, val);
 
 		if (addr >= STM32Lx_FLASH_OPT_BASE && addr < STM32Lx_FLASH_OPT_BASE + opt_size && (addr & 3U) == 0) {
 			if (!stm32lx_option_write(target, addr, val))
@@ -770,22 +770,23 @@ static bool stm32lx_cmd_option(target_s *const target, const int argc, const cha
 	for (size_t i = 0; i < opt_size; i += 4U) {
 		const uint32_t addr = STM32Lx_FLASH_OPT_BASE + i;
 		const uint32_t val = target_mem32_read32(target, addr);
-		tc_printf(target, "0x%08" PRIx32 ": 0x%04u 0x%04u %s\n", addr, val & 0xffffU, (val >> 16U) & 0xffffU,
-			(val & 0xffffU) == ((~val >> 16U) & 0xffffU) ? "OK" : "ERR");
+		tc_printf(target, "0x%08" PRIx32 ": 0x%04" PRIu32 " 0x%04" PRIu32 " %s\n", addr, val & 0xffffU,
+			(val >> 16U) & 0xffffU, (val & 0xffffU) == ((~val >> 16U) & 0xffffU) ? "OK" : "ERR");
 	}
 
 	const uint32_t options = target_mem32_read32(target, STM32Lx_FLASH_OPTR(flash_base));
 	const size_t read_protection = stm32lx_prot_level(options);
 	if (stm32lx_is_stm32l1(target)) {
 		tc_printf(target,
-			"OPTR: 0x%08" PRIx32 ", RDPRT %u, SPRMD %u, BOR %u, WDG_SW %u, nRST_STP %u, nRST_STBY %u, nBFB2 %u\n",
-			options, read_protection, (options & STM32L1_FLASH_OPTR_SPRMOD) ? 1 : 0,
+			"OPTR: 0x%08" PRIx32 ", RDPRT %" PRIu32 ", SPRMD %u, BOR %" PRIu32 " , WDG_SW %u"
+			", nRST_STP %u, nRST_STBY %u, nBFB2 %u\n",
+			options, (uint32_t)read_protection, (options & STM32L1_FLASH_OPTR_SPRMOD) ? 1 : 0,
 			(options >> STM32L1_FLASH_OPTR_BOR_LEV_SHIFT) & STM32L1_FLASH_OPTR_BOR_LEV_MASK,
 			(options & STM32Lx_FLASH_OPTR_WDG_SW) ? 1 : 0, (options & STM32L1_FLASH_OPTR_nRST_STOP) ? 1 : 0,
 			(options & STM32L1_FLASH_OPTR_nRST_STDBY) ? 1 : 0, (options & STM32L1_FLASH_OPTR_nBFB2) ? 1 : 0);
 	} else {
-		tc_printf(target, "OPTR: 0x%08" PRIx32 ", RDPROT %u, WPRMOD %u, WDG_SW %u, BOOT1 %u\n", options,
-			read_protection, (options & STM32L0_FLASH_OPTR_WPRMOD) ? 1 : 0,
+		tc_printf(target, "OPTR: 0x%08" PRIx32 ", RDPROT %" PRIu32 ", WPRMOD %" PRIu16 ", WDG_SW %u, BOOT1 %u\n",
+			options, (uint32_t)read_protection, (options & STM32L0_FLASH_OPTR_WPRMOD) ? 1 : 0,
 			(options & STM32Lx_FLASH_OPTR_WDG_SW) ? 1 : 0, (options & STM32L0_FLASH_OPTR_BOOT1) ? 1 : 0);
 	}
 
@@ -867,8 +868,8 @@ static bool stm32lx_cmd_eeprom(target_s *const target, const int argc, const cha
 	tc_printf(target, "  byte     <addr> <value8>  - Write a byte\n");
 	tc_printf(target, "  halfword <addr> <value16> - Write a half-word\n");
 	tc_printf(target, "  word     <addr> <value32> - Write a word\n");
-	tc_printf(target, "The value of <addr> must in the interval [0x%08x, 0x%x)\n", STM32Lx_FLASH_EEPROM_BASE,
-		STM32Lx_FLASH_EEPROM_BASE + stm32lx_nvm_eeprom_size(target));
+	tc_printf(target, "The value of <addr> must in the interval [0x%08" PRIx32 ", 0x%" PRIx32 ")\n",
+		STM32Lx_FLASH_EEPROM_BASE, STM32Lx_FLASH_EEPROM_BASE + stm32lx_nvm_eeprom_size(target));
 
 done:
 	stm32lx_nvm_lock(target, flash_base);

diff --git a/src/target/stm32l4.c b/src/target/stm32l4.c
@@ -1031,7 +1031,7 @@ static bool stm32l4_cmd_option(target_s *target, int argc, const char **argv)
 	for (size_t i = 0; i < word_count; ++i) {
 		const uint32_t addr = fpec_base + opt_reg_offsets[i];
 		const uint32_t val = target_mem32_read32(target, fpec_base + opt_reg_offsets[i]);
-		tc_printf(target, "0x%08X: 0x%08X\n", addr, val);
+		tc_printf(target, "0x%08" PRIX32 ": 0x%08" PRIX32 "\n", addr, val);
 	}
 	return true;
 }

diff --git a/src/target/target_internal.h b/src/target/target_internal.h
@@ -208,7 +208,15 @@ bool target_mem64_write16(target_s *target, target_addr64_t addr, uint16_t value
 bool target_mem64_write8(target_s *target, target_addr64_t addr, uint8_t value);
 bool target_check_error(target_s *target);
 
+#if defined(__MINGW32__) || defined(__MINGW64__) || defined(__CYGWIN__)
+#define TC_FORMAT_ATTR __attribute__((format(__MINGW_PRINTF_FORMAT, 2, 3)))
+#elif defined(__GNUC__) || defined(__clang__)
+#define TC_FORMAT_ATTR __attribute__((format(printf, 2, 3)))
+#else
+#define TC_FORMAT_ATTR
+#endif
+
 /* Access to host controller interface */
-void tc_printf(target_s *target, const char *fmt, ...);
+void tc_printf(target_s *target, const char *fmt, ...) TC_FORMAT_ATTR;
 
 #endif /* TARGET_TARGET_INTERNAL_H */