esp32c3: Switched the SPI Flash support handling over to the framewor…

…k from all bespoke

src/target/esp32c3.c

@@ -127,12 +127,6 @@ typedef struct esp32c3_priv {
 	target_addr_t last_invalidated_sector;
 } esp32c3_priv_s;
 
-typedef struct esp32c3_spi_flash {
-	target_flash_s flash;
-	uint32_t page_size;
-	uint8_t sector_erase_opcode;
-} esp32c3_spi_flash_s;
-
 static void esp32c3_disable_wdts(target_s *target);
 static void esp32c3_restore_wdts(target_s *target);
 static void esp32c3_halt_request(target_s *target);
@@ -142,6 +136,7 @@ static target_halt_reason_e esp32c3_halt_poll(target_s *target, target_addr_t *w
 static void esp32c3_spi_read(target_s *target, uint16_t command, target_addr_t address, void *buffer, size_t length);
 static void esp32c3_spi_write(
 	target_s *target, uint16_t command, target_addr_t address, const void *buffer, size_t length);
+static void esp32c3_spi_run_command(target_s *target, uint16_t command, target_addr_t address);
 
 static bool esp32c3_mass_erase(target_s *target);
 static bool esp32c3_enter_flash_mode(target_s *target);
@@ -173,41 +168,6 @@ bool esp32c3_target_prepare(target_s *const target)
 	return true;
 }
 
-static void esp32c3_add_flash(target_s *const target)
-{
-	esp32c3_spi_flash_s *const spi_flash = calloc(1, sizeof(*spi_flash));
-	if (!spi_flash) { /* calloc failed: heap exhaustion */
-		DEBUG_ERROR("calloc: failed in %s\n", __func__);
-		return;
-	}
-
-	spi_parameters_s spi_parameters;
-	if (!sfdp_read_parameters(target, &spi_parameters, esp32c3_spi_read)) {
-		/* SFDP readout failed, so read the JTAG ID of the device next */
-		spi_flash_id_s flash_id;
-		esp32c3_spi_read(target, SPI_FLASH_CMD_READ_JEDEC_ID, 0, &flash_id, sizeof(flash_id));
-		const uint32_t capacity = 1U << flash_id.capacity;
-
-		/* Now make some assumptions and hope for the best. */
-		spi_parameters.page_size = 256U;
-		spi_parameters.sector_size = 4096U;
-		spi_parameters.capacity = MIN(capacity, ESP32_C3_IBUS_FLASH_SIZE);
-		spi_parameters.sector_erase_opcode = SPI_FLASH_OPCODE_SECTOR_ERASE;
-	}
-
-	target_flash_s *const flash = &spi_flash->flash;
-	flash->start = ESP32_C3_IBUS_FLASH_BASE;
-	flash->length = MIN(spi_parameters.capacity, ESP32_C3_IBUS_FLASH_SIZE);
-	flash->blocksize = spi_parameters.sector_size;
-	flash->write = esp32c3_spi_flash_write;
-	flash->erase = esp32c3_spi_flash_erase;
-	flash->erased = 0xffU;
-	target_add_flash(target, flash);
-
-	spi_flash->page_size = spi_parameters.page_size;
-	spi_flash->sector_erase_opcode = spi_parameters.sector_erase_opcode;
-}
-
 bool esp32c3_probe(target_s *const target)
 {
 	const riscv_hart_s *const hart = riscv_hart_struct(target);
@@ -234,8 +194,21 @@ bool esp32c3_probe(target_s *const target)
 	target_add_ram(target, ESP32_C3_RTC_SRAM_BASE, ESP32_C3_RTC_SRAM_SIZE);
 
 	/* Establish the target Flash mappings */
-	esp32c3_add_flash(target);
-
+	spi_flash_id_s flash_id;
+	esp32c3_spi_read(target, SPI_FLASH_CMD_READ_JEDEC_ID, 0, &flash_id, sizeof(flash_id));
+	/* If we read out valid Flash information, set up a region for it */
+	if (flash_id.manufacturer != 0xffU && flash_id.type != 0xffU && flash_id.capacity != 0xffU) {
+		const uint32_t capacity = 1U << flash_id.capacity;
+		DEBUG_INFO("SPI Flash: mfr = %02x, type = %02x, capacity = %08" PRIx32 "\n", flash_id.manufacturer,
+			flash_id.type, capacity);
+		spi_flash_s *const flash = bmp_spi_add_flash(
+			target, ESP32_C3_IBUS_FLASH_BASE, capacity, esp32c3_spi_read, esp32c3_spi_write, esp32c3_spi_run_command);
+		/* Adjust the resulting capacity to not exceed the available memory mapping window size */
+		flash->flash.length = MIN(flash->flash.length, ESP32_C3_IBUS_FLASH_SIZE);
+		/* Adjust over to our slightly modified versions of the Flash routines */
+		flash->flash.write = esp32c3_spi_flash_write;
+		flash->flash.erase = esp32c3_spi_flash_erase;
+	}
 	return true;
 }
 
@@ -422,7 +395,7 @@ static inline uint8_t esp32c3_spi_read_status(target_s *const target)
 	return status;
 }
 
-static inline void esp32c3_spi_run_command(target_s *const target, const uint32_t command, const target_addr_t address)
+static void esp32c3_spi_run_command(target_s *const target, const uint16_t command, const target_addr_t address)
 {
 	/* Start by setting up the common components of the transaction */
 	const uint32_t enabled_stages = esp32c3_spi_config(target, command, address, 0U);
@@ -479,7 +452,7 @@ static bool esp32c3_spi_flash_erase(target_flash_s *const flash, const target_ad
 {
 	(void)length;
 	target_s *const target = flash->t;
-	const esp32c3_spi_flash_s *const spi_flash = (esp32c3_spi_flash_s *)flash;
+	const spi_flash_s *const spi_flash = (spi_flash_s *)flash;
 	esp32c3_spi_run_command(target, SPI_FLASH_CMD_WRITE_ENABLE, 0U);
 	if (!(esp32c3_spi_read_status(target) & SPI_FLASH_STATUS_WRITE_ENABLED))
 		return false;