platforms/stlink: add support for forcing ST-Link v2 clone detection

One of the ST-Link v2 clones I have (labelled "MINI ST-Link v2", "A"
on one side of the PCB and "QYF-0685" on the other) gets detected as
hardware version 1 rather than as a v2 clone (hardware version
257). It has PC13 pulled low via a 4.7kΩ resistor and PB11 connected
to PB10 rather than pulled up. PA15 seems to be unconnected.

It's hard to tell how other clones are wired and if PB10 is connected
to something else on them. The safest choice is to provide a
compile-time option to force "detection" of a clone (so we use PB6 for
nRST).

src/platforms/stlink/Makefile.inc

@@ -35,6 +35,10 @@ ifeq ($(BLUEPILL), 1)
 CFLAGS += -DBLUEPILL=1
 endif
 
+ifeq ($(STLINK_FORCE_CLONE), 1)
+CFLAGS += -DSTLINK_FORCE_CLONE=1
+endif
+
 VPATH += platforms/common/stm32
 
 SRC +=          \

src/platforms/stlink/README.md

@@ -18,6 +18,14 @@ then they often don't provide a UART interface. In this case, build the firmware
 
 Note: on some clones, SWIM is strongly pulled up by a 680 Ohm resistor.
 
+Some of the clones are not detected correctly by the firmware
+(`version` output will say e.g. `Hardware Version 1` instead of
+`Hardware Version 257`) because of differences in internal
+connections. In this case you can build the firmware with
+`STLINK_FORCE_CLONE=1` to force the firmware to use the clone pinmap
+(nRST on PB6).
+
+
 ## External connections
 
 | Function  | Normal Pin | Alt Pin |

src/platforms/stlink/stlink_common.c

@@ -88,6 +88,11 @@ uint32_t detect_rev(void)
 		RCC_CFGR |= (RCC_CFGR_MCO_HSE << 24U);
 		gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, GPIO8);
 	}
+
+	/* Override detection to use clone pinmap (i.e. PB6 as nRST). */
+#if defined(STLINK_FORCE_CLONE)
+	revision = 0x101;
+#endif
 	/* Clean up after ourself on boards that aren't identified as ST-Link v2.1's */
 	if ((revision & 0xff) < 2U) {
 		gpio_clear(GPIOA, GPIO12);