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fixup! riscv32: Implemented support for non-native-width system bus m…
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…emory reads
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dragonmux committed Nov 14, 2023
1 parent dd50858 commit 9d87909
Showing 1 changed file with 1 addition and 1 deletion.
2 changes: 1 addition & 1 deletion src/target/riscv32.c
Original file line number Diff line number Diff line change
Expand Up @@ -345,7 +345,7 @@ static void riscv32_sysbus_mem_adjusted_read(riscv_hart_s *const hart, void *con
const uint8_t adjustment = access_length & (uint8_t)~1U;
/* Having completed the read, unpack the first part of the data (two bytes) */
if (adjustment)
data = adiv5_unpack_data(data, src, value, ALIGN_16BIT);
data = (char *)adiv5_unpack_data(data, src, value, ALIGN_16BIT);
/* Now unpack the remaining byte if necessary */
if (access_length & 1U)
adiv5_unpack_data(data, src + adjustment, value, ALIGN_8BIT);
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