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cortexm: Switched the storage type used for the register arrays now t…
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…hey're not coupled to anything they shouldn't be
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dragonmux committed Sep 4, 2024
1 parent 990745e commit 4dd781c
Showing 1 changed file with 3 additions and 3 deletions.
6 changes: 3 additions & 3 deletions src/target/cortexm.c
Original file line number Diff line number Diff line change
Expand Up @@ -85,20 +85,20 @@ typedef struct cortexm_priv {
} cortexm_priv_s;

/* Register number tables */
static const uint32_t regnum_cortex_m[CORTEXM_GENERAL_REG_COUNT] = {
static const uint8_t regnum_cortex_m[CORTEXM_GENERAL_REG_COUNT] = {
0U, 1U, 2U, 3U, 4U, 5U, 6U, 7U, 8U, 9U, 10U, 11U, 12U, 13U, 14U, 15U, /* r0-r15 */
0x10U, /* xpsr */
0x11U, /* msp */
0x12U, /* psp */
0x14U, /* special */
};

static const uint32_t regnum_cortex_m_trustzone[CORTEXM_TRUSTZONE_REG_COUNT] = {
static const uint8_t regnum_cortex_m_trustzone[CORTEXM_TRUSTZONE_REG_COUNT] = {
0x18U, 0x19U, /* Non-secure msp + psp */
0x1aU, 0x1bU, /* Secure msp + psp */
};

static const uint32_t regnum_cortex_mf[CORTEX_FLOAT_REG_COUNT] = {
static const uint8_t regnum_cortex_mf[CORTEX_FLOAT_REG_COUNT] = {
0x21U, /* fpscr */
0x40U, 0x41U, 0x42U, 0x43U, 0x44U, 0x45U, 0x46U, 0x47U, /* s0-s7 */
0x48U, 0x49U, 0x4aU, 0x4bU, 0x4cU, 0x4dU, 0x4eU, 0x4fU, /* s8-s15 */
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