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FEAT: Add distributed filters topology #5608

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Description

This feature adds attributes of the topology page of the distributed filters

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Please mention the issue number or describe the problem this pull request addresses.

Checklist

  • [x ] I have tested my changes locally.
  • I have added necessary documentation or updated existing documentation.
  • [x ] I have followed the coding style guidelines of this project.
  • I have added appropriate tests (unit, integration, system).
  • [ x] I have reviewed my changes before submitting this pull request.
  • [x ] I have linked the issue or issues that are solved by the PR if any.
  • I have agreed with the Contributor License Agreement (CLA).

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Thanks for opening a Pull Request. If you want to perform a review write a comment saying:

@ansys-reviewer-bot review

@github-actions github-actions bot added the enhancement New features or code improvements label Dec 23, 2024
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codecov bot commented Dec 23, 2024

Codecov Report

All modified and coverable lines are covered by tests ✅

Project coverage is 85.26%. Comparing base (3a67112) to head (5275ce8).

Additional details and impacted files
@@           Coverage Diff           @@
##             main    #5608   +/-   ##
=======================================
  Coverage   85.26%   85.26%           
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  Files         152      152           
  Lines       61016    61016           
=======================================
+ Hits        52025    52028    +3     
+ Misses       8991     8988    -3     

@ramin4667 ramin4667 requested a review from myoung301 December 23, 2024 20:10
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The new method for creating a design is nice and clean! The tests look really thorough with testing for error messages.

Please see review comments and let me know if you have questions or it would help to go through some of it together.


Examples
--------
Create a ``FilterSolutions`` instance with a band-pass elliptic ideal filter.

>>> import ansys.aedt.core
>>> from ansys.aedt.core.filtersolutions_core.attributes import FilterImplementation
>>> import ansys.aedt.core.filtersolutions
>>> from ansys.aedt.core.filtersolutions_core.dll_interface import DllInterface
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Is it expected that the API user will use DllInterface to get the version? I thought that DllInterface was more for internal functionality and not something the user would need to worry about.

>>> design = ansys.aedt.core.FilterSolutions(version="2025 R1", projectname= "fs1",
>>> implementation_type= FilterImplementation.LUMPED,
>>> )
>>> design = ansys.aedt.core.FilterSolutions.LumpDesign(version= desktop_version)
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If FilterSolutions is the base class for the design types and is not intended to be used directly, we probably don't need a usage example. Also, the name is misleading then too. If named FilterSolutions, it implies this is the main class for using the Filter Solutions API (as HFSS class is for HFSS API). However, it's the child classes (LumpedDesign, DistributedDesign) that the user will want. So, I think it probably makes sense to rename this class to FilterSolutionsDesignBase or something along those lines and make it clear in the class documentation that this is a parent class that shouldn't be instantiated directly and the child design classes are what should be used to create a design.


See Also
--------
:doc:`filtersolutions`
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I'm not sure what this refers to - this file? Or is there another filtersolutions somewhere?

else:
raise RuntimeError("The " + str(implementation_type) + " is not supported in this release.")

class LumpDesign(FilterSolutions):
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Should this be LumpDesign or LumpedDesign? I think we are referring to a 'Lumped Filter', not a 'Lump Filter'.

self.attributes = Attributes()
self.ideal_response = IdealResponse()
self.graph_setup = GraphSetup()
self.source_impedance_table = LumpedTerminationImpedance(TerminationType.SOURCE)
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Can things like source_impedance_table that are shared by all design types go into the base class init?

@@ -37,57 +37,65 @@
class TestClass:

def test_lumped_capacitor_q(self):
lumpdesign = ansys.aedt.core.FilterSolutions(implementation_type=FilterImplementation.LUMPED)
lumpdesign = ansys.aedt.core.filtersolutions.LumpDesign(config["desktopVersion"])
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Use fixture.

@@ -36,19 +36,22 @@
@pytest.mark.skipif(config["desktopVersion"] < "2025.1", reason="Skipped on versions earlier than 2025.1")
class TestClass:
def test_row_count(self):
lumpdesign = ansys.aedt.core.FilterSolutions(implementation_type=FilterImplementation.LUMPED)
lumpdesign = ansys.aedt.core.filtersolutions.LumpDesign(config["desktopVersion"])
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Use fixture.

@@ -35,7 +35,8 @@
@pytest.mark.skipif(config["desktopVersion"] < "2025.1", reason="Skipped on versions earlier than 2025.1")
class TestClass:
def test_raise_error(self):
design = ansys.aedt.core.FilterSolutions(implementation_type=FilterImplementation.LUMPED)
design = ansys.aedt.core.filtersolutions.LumpDesign(config["desktopVersion"])
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If fixtures are in common file, re-use it here.

@@ -49,15 +49,17 @@
@pytest.mark.skipif(config["desktopVersion"] < "2025.2", reason="Skipped on versions earlier than 2025.2")
class TestClass:
def test_modelithics_inductor_list_count(self):
lumpdesign = ansys.aedt.core.FilterSolutions(implementation_type=FilterImplementation.LUMPED)
lumpdesign = ansys.aedt.core.filtersolutions.LumpDesign(config["desktopVersion"])
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Use fixture.

@@ -39,50 +39,59 @@
@pytest.mark.skipif(config["desktopVersion"] < "2025.1", reason="Skipped on versions earlier than 2025.1")
class TestClass:
def test_lumped_generator_resistor_30(self):
lumpdesign = ansys.aedt.core.FilterSolutions(implementation_type=FilterImplementation.LUMPED)
lumpdesign = ansys.aedt.core.filtersolutions.LumpDesign(config["desktopVersion"])
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Use fixture.

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