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Merge branch 'main' into feat/toolkit_installer
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Samuelopez-ansys committed Apr 30, 2024
2 parents 9f3b822 + 388de1d commit 61ae42d
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Showing 28 changed files with 336 additions and 116 deletions.
4 changes: 2 additions & 2 deletions .pre-commit-config.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -13,7 +13,7 @@ exclude: |
repos:
- repo: https://github.com/psf/black
rev: 24.4.0 # IF VERSION CHANGES --> MODIFY "blacken-docs" MANUALLY AS WELL!!
rev: 24.4.2 # IF VERSION CHANGES --> MODIFY "blacken-docs" MANUALLY AS WELL!!
hooks:
- id: black
args:
Expand Down Expand Up @@ -56,7 +56,7 @@ repos:
rev: 1.16.0
hooks:
- id: blacken-docs
additional_dependencies: [black==24.4.0]
additional_dependencies: [black==24.4.2]

# This validates our pre-commit.ci configuration
- repo: https://github.com/pre-commit-ci/pre-commit-ci-config
Expand Down
5 changes: 3 additions & 2 deletions _unittest/test_08_Primitives3D.py
Original file line number Diff line number Diff line change
Expand Up @@ -1764,7 +1764,7 @@ def test_83_cover_face(self):
o1 = self.aedtapp.modeler.create_circle(cs_plane=0, position=[0, 0, 0], radius=10)
assert self.aedtapp.modeler.cover_faces(o1)

def test_84_replace_3dcomponent(self):
def test_84_replace_3d_component(self):
self.aedtapp["test_variable"] = "20mm"
box1 = self.aedtapp.modeler.create_box([0, 0, 0], [10, "test_variable", 30])
box2 = self.aedtapp.modeler.create_box([0, 0, 0], ["test_variable", 100, 30])
Expand All @@ -1782,7 +1782,8 @@ def test_84_replace_3dcomponent(self):
assert len(self.aedtapp.modeler.user_defined_components) == 2

@pytest.mark.skipif(config["desktopVersion"] < "2023.1", reason="Method available in beta from 2023.1")
def test_85_insert_layoutcomponent(self):
@pytest.mark.skipif(is_linux, reason="EDB object is not loaded")
def test_85_insert_layout_component(self):
self.aedtapp.insert_design("LayoutComponent")
self.aedtapp.solution_type = "Modal"
assert not self.aedtapp.modeler.insert_layout_component(
Expand Down
66 changes: 46 additions & 20 deletions _unittest/test_21_Circuit.py
Original file line number Diff line number Diff line change
Expand Up @@ -50,7 +50,6 @@ def examples(local_scratch):
return netlist_file1, netlist_file2, touchstone_file, touchstone_file2


@pytest.mark.skipif(is_linux, reason="Multiple tests are not passing in Linux with AEDT 2024R1")
class TestClass:
@pytest.fixture(autouse=True)
def init(self, aedtapp, circuitprj, local_scratch, examples):
Expand Down Expand Up @@ -207,10 +206,9 @@ def test_17_create_setup(self):
]
assert LNA_setup.update()

@pytest.mark.skipif(is_linux, reason="To be investigated on linux.")
def test_18_export_touchstone(self):
assert self.aedtapp.analyze("Dom_LNA")
time.sleep(30)
time.sleep(2)
solution_name = "Dom_LNA"
sweep_name = None
file_name = os.path.join(self.local_scratch.path, "new.s2p")
Expand All @@ -220,7 +218,7 @@ def test_18_export_touchstone(self):
assert self.aedtapp.setup_names[0] == solution_name
assert self.aedtapp.export_touchstone(solution_name, sweep_name)

def test_19A_create_sweeps(self):
def test_19a_create_sweeps(self):
setup_name = "Sweep_LNA"
LNA_setup = self.aedtapp.create_setup(setup_name)
LNA_setup.add_sweep_step("Freq", 1, 2, 0.01, "GHz", override_existing_sweep=True)
Expand All @@ -233,16 +231,21 @@ def test_19A_create_sweeps(self):
assert LNA_setup.props["SweepDefinition"][1]["Variable"] == "Temp"
assert LNA_setup.props["SweepDefinition"][1]["Data"] == "DEC 20cel 100cel 81"

def test_19B_create_EyE_setups(self):
def test_19b_create_eye_setups(self):
setup_name = "Dom_Verify"
assert self.aedtapp.create_setup(setup_name, "NexximVerifEye")
setup_name = "Dom_Quick"
assert self.aedtapp.create_setup(setup_name, "NexximQuickEye")
setup_name = "Dom_AMI"
assert self.aedtapp.create_setup(setup_name, "NexximAMI")

def test_20_create_AMI_plots(self, add_app):
@pytest.mark.skipif(
is_linux and config["desktopVersion"] == "2024.1",
reason="Project with multiple circuit designs is not working.",
)
def test_20a_create_ami_plots(self, add_app):
ami_design = add_app(ami_project, design_name="Models Init Only", application=Circuit, subfolder=test_subfolder)

report_name = "MyReport"
assert (
ami_design.post.create_ami_initial_response_plot(
Expand Down Expand Up @@ -277,7 +280,7 @@ def test_20_create_AMI_plots(self, add_app):
)

@pytest.mark.skipif(config["desktopVersion"] > "2021.2", reason="Skipped on versions higher than 2021.2")
def test_20B_create_AMI_plots(self):
def test_20b_create_ami_plots(self):
assert (
self.aedtapp.post.create_statistical_eye_plot(
"Dom_Verify",
Expand Down Expand Up @@ -415,23 +418,39 @@ def test_31_duplicate(self): # pragma: no cover
def test_32_push_down(self):
self.aedtapp.insert_design("Circuit_Design_Push_Down")
subcircuit_1 = self.aedtapp.modeler.schematic.create_subcircuit(location=[0.0, 0.0])
active_project_name_1 = self.aedtapp.oproject.GetActiveDesign().GetName()
active_project = self.aedtapp.oproject.GetActiveDesign()
if is_linux and config["desktopVersion"] == "2024.1":
time.sleep(1)
self.aedtapp._desktop.CloseAllWindows()
active_project_name_1 = active_project.GetName()
self.aedtapp.pop_up()
subcircuit_2 = self.aedtapp.modeler.schematic.create_subcircuit(
location=[0.0, 0.0], nested_subcircuit_id=subcircuit_1.component_info["RefDes"]
)
active_project_name_3 = self.aedtapp.oproject.GetActiveDesign().GetName()
active_project = self.aedtapp.oproject.GetActiveDesign()
if is_linux and config["desktopVersion"] == "2024.1":
time.sleep(1)
self.aedtapp._desktop.CloseAllWindows()
active_project_name_3 = active_project.GetName()
assert active_project_name_1 == active_project_name_3
assert subcircuit_2.component_info["RefDes"] == "U2"
assert self.aedtapp.push_down(subcircuit_1)

def test_33_pop_up(self):
self.aedtapp.insert_design("Circuit_Design_Pop_Up")
assert self.aedtapp.pop_up()
active_project_name_1 = self.aedtapp.oproject.GetActiveDesign().GetName()
active_project = self.aedtapp.oproject.GetActiveDesign()
if is_linux and config["desktopVersion"] == "2024.1":
time.sleep(1)
self.aedtapp._desktop.CloseAllWindows()
active_project_name_1 = active_project.GetName()
self.aedtapp.modeler.schematic.create_subcircuit(location=[0.0, 0.0])
assert self.aedtapp.pop_up()
active_project_name_2 = self.aedtapp.oproject.GetActiveDesign().GetName()
active_project = self.aedtapp.oproject.GetActiveDesign()
if is_linux and config["desktopVersion"] == "2024.1":
time.sleep(1)
self.aedtapp._desktop.CloseAllWindows()
active_project_name_2 = active_project.GetName()
assert active_project_name_1 == active_project_name_2

def test_34_activate_variables(self):
Expand Down Expand Up @@ -481,14 +500,15 @@ def test_38_browse_log_file(self):
self.aedtapp.modeler.components.create_interface_port("net_10", (0.01, 0))
lna = self.aedtapp.create_setup("mylna", self.aedtapp.SETUPS.NexximLNA)
lna.props["SweepDefinition"]["Data"] = "LINC 0Hz 1GHz 101"

assert not self.aedtapp.browse_log_file()
self.aedtapp.analyze()
time.sleep(2)
assert self.aedtapp.browse_log_file()
self.aedtapp.save_project()
assert self.aedtapp.browse_log_file()
assert not self.aedtapp.browse_log_file(os.path.join(self.aedtapp.working_directory, "logfiles"))
assert self.aedtapp.browse_log_file(self.aedtapp.working_directory)
if not is_linux:
self.aedtapp.save_project()
assert self.aedtapp.browse_log_file()
assert not self.aedtapp.browse_log_file(os.path.join(self.aedtapp.working_directory, "logfiles"))
assert self.aedtapp.browse_log_file(self.aedtapp.working_directory)

def test_39_export_results_circuit(self):
exported_files = self.aedtapp.export_results()
Expand Down Expand Up @@ -691,9 +711,10 @@ def test_41_assign_excitations(self, add_app):
assert "PortTest" in c.excitations
c.excitation_objects["PortTest"].delete()
assert len(c.excitation_objects) == 0
self.aedtapp.save_project()
c = add_app(application=Circuit, design_name="sources")
assert c.sources
if not is_linux:
self.aedtapp.save_project()
c = add_app(application=Circuit, design_name="sources")
assert c.sources

def test_41_set_variable(self):
self.aedtapp.variable_manager.set_variable("var_test", expression="123")
Expand Down Expand Up @@ -772,6 +793,7 @@ def test_43_create_and_change_prop_text(self):
assert self.aedtapp.modeler.create_text("text test", "1000mil", "-2000mil")

@pytest.mark.skipif(config["NonGraphical"], reason="Change property doesn't work in non-graphical mode.")
@pytest.mark.skipif(is_linux and config["desktopVersion"] == "2024.1", reason="Schematic has to be closed.")
def test_44_change_text_property(self):
self.aedtapp.set_active_design("text")
text_id = self.aedtapp.oeditor.GetAllGraphics()[0].split("@")[1]
Expand All @@ -785,6 +807,7 @@ def test_44_change_text_property(self):
assert not self.aedtapp.modeler.change_text_property(text_id, "Invalid", {})

@pytest.mark.skipif(config["NonGraphical"], reason="Change property doesn't work in non-graphical mode.")
@pytest.mark.skipif(is_linux and config["desktopVersion"] == "2024.1", reason="Schematic has to be closed.")
def test_45_create_circuit_from_multizone_layout(self, add_edb):
edb = add_edb(project_name="multi_zone_project")
common_reference_net = "gnd"
Expand All @@ -799,7 +822,6 @@ def test_45_create_circuit_from_multizone_layout(self, add_edb):
assert self.aedtapp.remove_all_unused_definitions()

def test_46_create_vpwl(self):

# default inputs
myres = self.aedtapp.modeler.schematic.create_voltage_pwl(name="V1")
assert myres.refdes != ""
Expand Down Expand Up @@ -834,6 +856,9 @@ def test_47_automatic_lna(self):
)
assert status

@pytest.mark.skipif(
config["NonGraphical"] and is_linux, reason="Method is not working in Linux and non-graphical mode."
)
def test_48_automatic_tdr(self):
touchstone_file = os.path.join(local_path, "example_models", test_subfolder, touchstone_custom)

Expand All @@ -850,6 +875,7 @@ def test_48_automatic_tdr(self):
)
assert result

@pytest.mark.skipif(config["NonGraphical"] and is_linux, reason="Method not working in Linux and Non graphical.")
def test_49_automatic_ami(self):
touchstone_file = os.path.join(local_path, "example_models", test_subfolder, touchstone_custom)
ami_file = os.path.join(local_path, "example_models", test_subfolder, "pcieg5_32gt.ibs")
Expand Down
35 changes: 22 additions & 13 deletions _unittest/test_22_Circuit_DynamicLink.py
Original file line number Diff line number Diff line change
Expand Up @@ -8,7 +8,7 @@
from pyaedt import Q2d
from pyaedt import Q3d
from pyaedt import is_ironpython
from pyaedt.generic.general_methods import is_linux
from pyaedt import is_linux

test_subfloder = "T22"
test_project_name = "Dynamic_Link"
Expand Down Expand Up @@ -81,34 +81,38 @@ def test_02_add_subcircuits_3dlayout(self):
assert hfss3Dlayout_comp.id == 86
assert hfss3Dlayout_comp

@pytest.mark.skipif(is_ironpython or is_linux, reason="Skipped because Desktop is crashing")
@pytest.mark.skipif(is_ironpython, reason="Skipped because Desktop is crashing")
@pytest.mark.skipif(config["NonGraphical"] and is_linux, reason="Method not working in Linux and Non graphical.")
def test_03_add_subcircuits_hfss_link(self, add_app):
pin_names = self.aedtapp.get_source_pin_names(src_design_name, src_project_name, self.src_project_file, 2)

assert len(pin_names) == 4
assert "usb_P_pcb" in pin_names
hfss = add_app(project_name=self.src_project_file, design_name="uUSB", just_open=True)
hfss_comp = self.aedtapp.modeler.schematic.add_subcircuit_dynamic_link(hfss, comp_name="uUSB")
assert hfss_comp.id == 87
assert hfss_comp.composed_name == "CompInst@uUSB;87;3"

@pytest.mark.skipif(is_ironpython or is_linux, reason="Skipped because Desktop is crashing")
@pytest.mark.skipif(is_ironpython, reason="Skipped because Desktop is crashing")
@pytest.mark.skipif(config["NonGraphical"] and is_linux, reason="Method not working in Linux and Non graphical")
def test_04_refresh_dynamic_link(self):
assert self.aedtapp.modeler.schematic.refresh_dynamic_link("uUSB")

@pytest.mark.skipif(is_ironpython or is_linux, reason="Skipped because Desktop is crashing")
@pytest.mark.skipif(is_ironpython, reason="Skipped because Desktop is crashing")
@pytest.mark.skipif(config["NonGraphical"] and is_linux, reason="Method not working in Linux and Non graphical")
def test_05_set_sim_option_on_hfss_subcircuit(self):
hfss_comp = "CompInst@uUSB;87;3"
assert self.aedtapp.modeler.schematic.set_sim_option_on_hfss_subcircuit(hfss_comp)
assert self.aedtapp.modeler.schematic.set_sim_option_on_hfss_subcircuit(hfss_comp, option="interpolate")
assert not self.aedtapp.modeler.schematic.set_sim_option_on_hfss_subcircuit(hfss_comp, option="not_good")

@pytest.mark.skipif(is_linux or is_ironpython, reason="Skipped because Desktop is crashing")
@pytest.mark.skipif(is_ironpython, reason="Skipped because AEDT is crashing.")
@pytest.mark.skipif(config["NonGraphical"] and is_linux, reason="Method not working in Linux and Non graphical")
def test_06_set_sim_solution_on_hfss_subcircuit(self):
hfss_comp = "CompInst@uUSB;87;3"
assert self.aedtapp.modeler.schematic.set_sim_solution_on_hfss_subcircuit(hfss_comp)

@pytest.mark.skipif(is_ironpython or is_linux, reason="Skipped because Desktop is crashing")
@pytest.mark.skipif(is_ironpython, reason="Skipped because Desktop is crashing")
@pytest.mark.skipif(config["NonGraphical"] and is_linux, reason="Method not working in Linux and Non graphical")
def test_07_create_page_port_and_interface_port(self):
hfss_comp_id = 87
hfss3Dlayout_comp_id = 86
Expand Down Expand Up @@ -180,7 +184,8 @@ def test_07_create_page_port_and_interface_port(self):

assert "Port_remove" not in self.aedtapp.excitations

@pytest.mark.skipif(is_ironpython or is_linux, reason="Skipped because Desktop is crashing")
@pytest.mark.skipif(is_ironpython, reason="Skipped because Desktop is crashing")
@pytest.mark.skipif(config["NonGraphical"] and is_linux, reason="Method not working in Linux and Non graphical")
def test_08_assign_excitations(self):
filepath = os.path.join(local_path, "example_models", test_subfloder, "frequency_dependent_source.fds")
ports_list = ["Excitation_1", "Excitation_2"]
Expand All @@ -205,7 +210,8 @@ def test_09_setup(self):
LNA_setup.props["SweepDefinition"]["Data"] = " ".join(sweep_list)
assert LNA_setup.update()

@pytest.mark.skipif(is_ironpython or is_linux, reason="Skipped because Desktop is crashing")
@pytest.mark.skipif(is_ironpython, reason="Skipped because Desktop is crashing")
@pytest.mark.skipif(config["NonGraphical"] and is_linux, reason="Method not working in Linux and Non graphical")
def test_10_q2d_link(self, add_app):
self.aedtapp.insert_design("test_link")
q2d = add_app(application=Q2d, project_name=self.q3d, just_open=True)
Expand All @@ -215,7 +221,8 @@ def test_10_q2d_link(self, add_app):
assert c1.parameters["Length"] == "25mm"
assert c1.parameters["r1"] == "0.3mm"

@pytest.mark.skipif(is_ironpython or is_linux, reason="Skipped because Desktop is crashing")
@pytest.mark.skipif(is_ironpython, reason="Skipped because Desktop is crashing")
@pytest.mark.skipif(config["NonGraphical"] and is_linux, reason="Method not working in Linux and Non graphical")
def test_10_q3d_link(self, add_app):
q3d = add_app(application=Q3d, project_name=self.q3d, just_open=True)

Expand All @@ -225,7 +232,8 @@ def test_10_q3d_link(self, add_app):
assert q3d_comp
assert len(q3d_comp.pins) == 4

@pytest.mark.skipif(is_ironpython or is_linux, reason="Skipped because Desktop is crashing")
@pytest.mark.skipif(is_ironpython, reason="Skipped because Desktop is crashing")
@pytest.mark.skipif(config["NonGraphical"] and is_linux, reason="Method not working in Linux and Non graphical")
def test_10_hfss_link(self, add_app):
hfss = add_app(project_name=self.q3d, just_open=True)

Expand All @@ -237,7 +245,8 @@ def test_10_hfss_link(self, add_app):
hfss2, solution_name="Setup2 : Sweep", tline_port="1"
)

@pytest.mark.skipif(is_ironpython or is_linux, reason="Skipped because Desktop is crashing")
@pytest.mark.skipif(is_ironpython, reason="Skipped because Desktop is crashing")
@pytest.mark.skipif(config["NonGraphical"] and is_linux, reason="Method not working in Linux and Non graphical")
def test_11_siwave_link(self):
model = os.path.join(local_path, "example_models", test_subfloder, "Galileo_um.siw")
model_out = self.local_scratch.copyfile(model)
Expand All @@ -248,7 +257,7 @@ def test_11_siwave_link(self):
assert siw_comp
assert len(siw_comp.pins) == 2

@pytest.mark.skipif(config.get("skip_circuits", False) or is_linux, reason="Skipped because Desktop is crashing")
@pytest.mark.skipif(config.get("skip_circuits", False), reason="Skipped because Desktop is crashing")
def test_12_create_interface_port(self):
page_port = self.aedtapp.modeler.components.create_page_port(name="Port12", location=[0, -0.50])
interface_port = self.aedtapp.modeler.components.create_interface_port(name="Port12", location=[0.3, -0.50])
Expand Down
5 changes: 4 additions & 1 deletion _unittest/test_28_Maxwell3D.py
Original file line number Diff line number Diff line change
Expand Up @@ -869,7 +869,10 @@ def test_53_assign_layout_force(self, layout_comp):
nets_layers = {"1V0": "Bottom Solder"}
assert layout_comp.assign_layout_force(nets_layers, "LC1_1")

@pytest.mark.skipif(desktop_version < "2023.2", reason="Method available in beta from 2023.2")
@pytest.mark.skipif(
desktop_version < "2023.2" or is_linux, reason="Method is available in beta in 2023.2 and later."
)
@pytest.mark.skipif(is_linux, reason="EDB object is not loaded.")
def test_54_enable_harmonic_force_layout(self, layout_comp):
comp = layout_comp.modeler.user_defined_components["LC1_1"]
layers = list(comp.layout_component.layers.keys())
Expand Down
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