-
Notifications
You must be signed in to change notification settings - Fork 895
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
Adjust keep_hierarchy
behavior
#4706
base: main
Are you sure you want to change the base?
Conversation
There's still a bit of a disconnect with the |
When I built this I experimented with also running opt in the flow and it didn't make much of a difference vs just techmapping, so I think this may not be as much of a problem? Anyway, it's just a knob for the user to twiddle, and users with an engineering background (the core audience) usually like that kind of arbitrary control, even if to a fault |
For instance numbers I expect opt isn’t as important as the abc transformations and mapping to technology cells |
@@ -23,20 +23,77 @@ | |||
USING_YOSYS_NAMESPACE | |||
PRIVATE_NAMESPACE_BEGIN | |||
|
|||
struct ThresholdHiearchyKeeping { |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
nit: Hiearchy
-> Hierarchy
@@ -575,6 +575,9 @@ Non-standard or SystemVerilog features for formal verification | |||
``@(posedge <netname>)`` or ``@(negedge <netname>)`` when ``<netname>`` | |||
is marked with the ``(* gclk *)`` Verilog attribute. | |||
|
|||
- The `gate_cost_equivalent` attribute on a module can be used to specify |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
This chapter is "Non-standard or SystemVerilog features for formal verification", shouldn't it go into the preceding one?
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Maybe we could direct readers to check the keep_hierarchy help string?
log(" gates after simple techmapping. Intended for tuning trade-offs between\n"); | ||
log(" quality and yosys runtime.\n"); | ||
log("\n"); | ||
log(" When evaluating a module's cost, gates which are within a submodule\n"); |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
It seems like modules already labeled keep_hierarchy before this pass would still contribute to their supermodule's sum cost
What are the reasons/motivation for this change?
This makes two changes to
keep_hierarchy -min_cost
to make it better suited to the task of partially preserving hierarchy for macro placement:keep_hierarchy
towards the upper module's cost.gate_cost_equivalent
attribute as a way of specifying cost on blackboxes.