Update ipu.py

reference_designs/ipu-xrt/add_one_objFifo/aie2.py

@@ -73,7 +73,9 @@ def sequence(inTensor, notUsed, outTensor):
                 ipu_dma_memcpy_nd(
                     metadata="in0", bd_id=1, mem=inTensor, lengths=[1, 1, 1, 64]
                 )
-                ipu_sync(column=0, row=0, direction=0, channel=0)
+                ipu_sync(
+                    column=0, row=0, direction=0, channel=0, column_num=1, row_num=1
+                )
 
     print(ctx.module)
 

reference_designs/ipu-xrt/log_hello_world/hello_world.py

@@ -63,7 +63,9 @@ def sequence(in_mem, out_mem, logout):
                 ipu_dma_memcpy_nd(
                     metadata="logoutOF", bd_id=2, mem=logout, lengths=[1, 1, 1, N]
                 )
-                ipu_sync(column=0, row=0, direction=0, channel=0)
+                ipu_sync(
+                    column=0, row=0, direction=0, channel=0, column_num=1, row_num=1
+                )
 
     print(ctx.module)
 

reference_designs/ipu-xrt/matrix_multiplication/aie2.py

@@ -217,7 +217,9 @@ def sequence(A, B, C):
                             strides=[n_in_i32s, k_x_N_in_i32s, N_in_i32s],
                         )
 
-                    ipu_sync(column=0, row=0, direction=0, channel=0)
+                    ipu_sync(
+                        column=0, row=0, direction=0, channel=0, column_num=1, row_num=1
+                    )
 
     print(ctx.module)
 

reference_designs/ipu-xrt/matrix_multiplication_column/aie2.py

@@ -250,7 +250,9 @@ def sequence(A, B, C):
                             strides=[0, n_in_i32s, N_in_i32s],
                         )
 
-                    ipu_sync(column=0, row=0, direction=0, channel=0)
+                    ipu_sync(
+                        column=0, row=0, direction=0, channel=0, column_num=1, row_num=1
+                    )
 
     print(ctx.module)
 

reference_designs/ipu-xrt/passthrough_hardware/aie2.py

@@ -53,7 +53,9 @@ def core_body():
             def sequence(A, B, C):
                 ipu_dma_memcpy_nd(metadata="out", bd_id=0, mem=C, lengths=[1, 1, 1, N])
                 ipu_dma_memcpy_nd(metadata="in", bd_id=1, mem=A, lengths=[1, 1, 1, N])
-                ipu_sync(column=0, row=0, direction=0, channel=0)
+                ipu_sync(
+                    column=0, row=0, direction=0, channel=0, column_num=1, row_num=1
+                )
 
     print(ctx.module)
 

reference_designs/ipu-xrt/vector_scalar/aie2.py

@@ -70,7 +70,9 @@ def core_body():
             def sequence(A, B, C):
                 ipu_dma_memcpy_nd(metadata="out", bd_id=0, mem=C, lengths=[1, 1, 1, N])
                 ipu_dma_memcpy_nd(metadata="in", bd_id=1, mem=A, lengths=[1, 1, 1, N])
-                ipu_sync(column=0, row=0, direction=0, channel=0)
+                ipu_sync(
+                    column=0, row=0, direction=0, channel=0, column_num=1, row_num=1
+                )
 
     print(ctx.module)
 

reference_designs/ipu-xrt/vision_pipelines/color_detect/aie2_colorDetect.py

@@ -10,9 +10,10 @@
 from aie.dialects.aie import *
 from aie.dialects.aiex import *
 from aie.extras.dialects.ext import arith
-from aie.extras.dialects.ext.scf import for_
+from aie.extras.dialects.ext.scf import range_, yield_
 from aie.extras.context import mlir_mod_ctx
 from aie.extras import types as T
+from aie.ir import TypeAttr
 
 
 width = 64
@@ -56,7 +57,7 @@ def deviceBody():
                 "gray2rgbaLine", inputs=[line_ty, line_bytes_ty, T.i32()]
             )
             bitwise_and_line = external_func(
-                "bitwiseORLine",
+                "bitwiseANDLine",
                 inputs=[line_bytes_ty, line_bytes_ty, line_bytes_ty, T.i32()],
             )
 
@@ -182,7 +183,7 @@ def deviceBody():
             # Compute tile 2
             @core(compute_tile2, "rgba2hue.cc.o")
             def coreBody():
-                for _ in for_(sys.maxsize):
+                for _ in range_(sys.maxsize):
                     elem_in = acquire(
                         ObjectFifoPort.Consume, "inOF_L3L2", 1, line_bytes_ty
                     ).acquired_elem()
@@ -192,6 +193,7 @@ def coreBody():
                     Call(rgba2hueLine, [elem_in, elem_out, arith.constant(line_width)])
                     objectfifo_release(ObjectFifoPort.Consume, "inOF_L3L2", 1)
                     objectfifo_release(ObjectFifoPort.Produce, "OF_2to34", 1)
+                    yield_([])
 
             # Compute tile 3
             @core(compute_tile3, "threshold.cc.o")
@@ -201,7 +203,7 @@ def coreBody():
                 threshold_maxvalue = arith.constant(255, T.i16())
                 threshold_mode_to_zero_inv = arith.constant(4, T.i8())
                 threshold_mode_binary = arith.constant(0, T.i8())
-                for _ in for_(sys.maxsize):
+                for _ in range_(sys.maxsize):
                     elem_in = acquire(
                         ObjectFifoPort.Consume, "OF_2to34", 1, line_ty
                     ).acquired_elem()
@@ -240,6 +242,7 @@ def coreBody():
                     )
                     objectfifo_release(ObjectFifoPort.Consume, "OF_3to3", 1)
                     objectfifo_release(ObjectFifoPort.Produce, "OF_3to5", 1)
+                    yield_([])
 
             # Compute tile 4
             @core(compute_tile4, "threshold.cc.o")
@@ -249,7 +252,7 @@ def coreBody():
                 threshold_maxvalue = arith.constant(255, T.i16())
                 threshold_mode_to_zero_inv = arith.constant(4, T.i8())
                 threshold_mode_binary = arith.constant(0, T.i8())
-                for _ in for_(sys.maxsize):
+                for _ in range_(sys.maxsize):
                     elem_in = acquire(
                         ObjectFifoPort.Consume, "OF_2to34", 1, line_ty
                     ).acquired_elem()
@@ -288,11 +291,12 @@ def coreBody():
                     )
                     objectfifo_release(ObjectFifoPort.Consume, "OF_4to4", 1)
                     objectfifo_release(ObjectFifoPort.Produce, "OF_4to5", 1)
+                    yield_([])
 
             # Compute tile 5
             @core(compute_tile5, "combined_bitwiseOR_gray2rgba_bitwiseAND.a")
             def coreBody():
-                for _ in for_(sys.maxsize):
+                for _ in range_(sys.maxsize):
                     # bitwise OR
                     elem_in1 = acquire(
                         ObjectFifoPort.Consume, "OF_3to5", 1, line_ty
@@ -350,6 +354,7 @@ def coreBody():
                     objectfifo_release(ObjectFifoPort.Consume, "OF_5to5b", 1)
                     objectfifo_release(ObjectFifoPort.Consume, "inOF_L2L1", 1)
                     objectfifo_release(ObjectFifoPort.Produce, "outOF_L1L2", 1)
+                    yield_([])
 
             # To/from AIE-array data movement