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[aievec][nfc] update mul elem tests and add scalar llvm tests (#1325)
* update the input IRs for the aievec.mul_elem tests. * add scalar to-llvm tests.
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test/unit_tests/aievec_tests/bf16xbf16_mul_elem/bf16xbf16_mul_elem-llvm-scalar.mlir
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | ||
// Copyright (C) 2023, Advanced Micro Devices, Inc. | ||
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// REQUIRES: valid_xchess_license | ||
// REQUIRES: peano | ||
// RUN: mkdir -p %t/data; cd %t | ||
// RUN: aie-opt %s %vector-to-generic-llvmir% -o llvmir.mlir | ||
// RUN: aie-translate llvmir.mlir %llvmir-to-ll% -o dut.ll | ||
// RUN: %PEANO_INSTALL_DIR/bin/clang %clang_aie2_args -c dut.ll -o dut.o | ||
// RUN: xchesscc_wrapper %xchesscc_aie2_args -DTO_LLVM +w work +o work -I%S -I. %S/testbench.cc dut.o | ||
// RUN: xca_udm_dbg --aiearch aie-ml -qf -T -P %aietools/data/aie_ml/lib/ -t "%S/../profiling.tcl ./work/a.out" >& xca_udm_dbg.stdout | ||
// RUN: FileCheck --input-file=./xca_udm_dbg.stdout %s | ||
// CHECK: TEST PASSED | ||
// XFAIL: * | ||
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module { | ||
func.func @dut(%arg0: memref<1024xbf16>, %arg1: memref<1024xbf16>, %arg2: memref<1024xbf16>) { | ||
memref.assume_alignment %arg0, 32 : memref<1024xbf16> | ||
memref.assume_alignment %arg1, 32 : memref<1024xbf16> | ||
memref.assume_alignment %arg2, 32 : memref<1024xbf16> | ||
affine.for %arg3 = 0 to 1024 { | ||
%0 = affine.load %arg0[%arg3] : memref<1024xbf16> | ||
%1 = affine.load %arg1[%arg3] : memref<1024xbf16> | ||
%2 = arith.mulf %0, %1 : bf16 | ||
affine.store %2, %arg2[%arg3] : memref<1024xbf16> | ||
} | ||
return | ||
} | ||
} |
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28 changes: 28 additions & 0 deletions
28
test/unit_tests/aievec_tests/i16xi16_mul_elem/i16xi16_mul_elem-llvm-scalar.mlir
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | ||
// Copyright (C) 2023, Advanced Micro Devices, Inc. | ||
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||
// REQUIRES: valid_xchess_license | ||
// REQUIRES: peano | ||
// RUN: mkdir -p %t/data; cd %t | ||
// RUN: aie-opt %s %vector-to-generic-llvmir% -o llvmir.mlir | ||
// RUN: aie-translate llvmir.mlir %llvmir-to-ll% -o dut.ll | ||
// RUN: %PEANO_INSTALL_DIR/bin/clang %clang_aie2_args -c dut.ll -o dut.o | ||
// RUN: xchesscc_wrapper %xchesscc_aie2_args -DTO_LLVM +w work +o work -I%S -I. %S/testbench.cc dut.o | ||
// RUN: xca_udm_dbg --aiearch aie-ml -qf -T -P %aietools/data/aie_ml/lib/ -t "%S/../profiling.tcl ./work/a.out" >& xca_udm_dbg.stdout | ||
// RUN: FileCheck --input-file=./xca_udm_dbg.stdout %s | ||
// CHECK: TEST PASSED | ||
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||
module { | ||
func.func @dut(%arg0: memref<1024xi16>, %arg1: memref<1024xi16>, %arg2: memref<1024xi16>) { | ||
memref.assume_alignment %arg0, 32 : memref<1024xi16> | ||
memref.assume_alignment %arg1, 32 : memref<1024xi16> | ||
memref.assume_alignment %arg2, 32 : memref<1024xi16> | ||
affine.for %arg3 = 0 to 1024 { | ||
%0 = affine.load %arg0[%arg3] : memref<1024xi16> | ||
%1 = affine.load %arg1[%arg3] : memref<1024xi16> | ||
%2 = arith.muli %0, %1 : i16 | ||
affine.store %2, %arg2[%arg3] : memref<1024xi16> | ||
} | ||
return | ||
} | ||
} |
31 changes: 31 additions & 0 deletions
31
test/unit_tests/aievec_tests/i16xi16_mul_elem_2/i16xi16_mul_elem-llvm-scalar.mlir
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | ||
// Copyright (C) 2023, Advanced Micro Devices, Inc. | ||
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||
// REQUIRES: valid_xchess_license | ||
// REQUIRES: peano | ||
// RUN: mkdir -p %t/data; cd %t | ||
// RUN: aie-opt %s %vector-to-generic-llvmir% -o llvmir.mlir | ||
// RUN: aie-translate llvmir.mlir %llvmir-to-ll% -o dut.ll | ||
// RUN: %PEANO_INSTALL_DIR/bin/clang %clang_aie2_args -c dut.ll -o dut.o | ||
// RUN: xchesscc_wrapper %xchesscc_aie2_args -DTO_LLVM +w work +o work -I%S -I. %S/testbench.cc dut.o | ||
// RUN: xca_udm_dbg --aiearch aie-ml -qf -T -P %aietools/data/aie_ml/lib/ -t "%S/../profiling.tcl ./work/a.out" >& xca_udm_dbg.stdout | ||
// RUN: FileCheck --input-file=./xca_udm_dbg.stdout %s | ||
// CHECK: TEST PASSED | ||
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||
module { | ||
func.func @dut(%arg0: memref<1024xi16>, %arg1: memref<1024xi16>, %arg2: memref<1024xi32>) { | ||
memref.assume_alignment %arg0, 32 : memref<1024xi16> | ||
memref.assume_alignment %arg1, 32 : memref<1024xi16> | ||
memref.assume_alignment %arg2, 32 : memref<1024xi32> | ||
affine.for %arg3 = 0 to 1024 { | ||
%0 = affine.load %arg0[%arg3] : memref<1024xi16> | ||
%1 = affine.load %arg1[%arg3] : memref<1024xi16> | ||
%2 = arith.extsi %0 : i16 to i32 | ||
%3 = arith.extsi %1 : i16 to i32 | ||
%4 = arith.muli %2, %3 : i32 | ||
affine.store %4, %arg2[%arg3] : memref<1024xi32> | ||
} | ||
return | ||
} | ||
} | ||
|
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28 changes: 28 additions & 0 deletions
28
test/unit_tests/aievec_tests/i32xi32_mul_elem/i32xi32_mul_elem-llvm-scalar.mlir
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---|---|---|
@@ -0,0 +1,28 @@ | ||
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | ||
// Copyright (C) 2023, Advanced Micro Devices, Inc. | ||
|
||
// REQUIRES: valid_xchess_license | ||
// REQUIRES: peano | ||
// RUN: mkdir -p %t/data; cd %t | ||
// RUN: aie-opt %s %vector-to-generic-llvmir% -o llvmir.mlir | ||
// RUN: aie-translate llvmir.mlir %llvmir-to-ll% -o dut.ll | ||
// RUN: %PEANO_INSTALL_DIR/bin/clang %clang_aie2_args -c dut.ll -o dut.o | ||
// RUN: xchesscc_wrapper %xchesscc_aie2_args -DTO_LLVM +w work +o work -I%S -I. %S/testbench.cc dut.o | ||
// RUN: xca_udm_dbg --aiearch aie-ml -qf -T -P %aietools/data/aie_ml/lib/ -t "%S/../profiling.tcl ./work/a.out" >& xca_udm_dbg.stdout | ||
// RUN: FileCheck --input-file=./xca_udm_dbg.stdout %s | ||
// CHECK: TEST PASSED | ||
|
||
module { | ||
func.func @dut(%arg0: memref<1024xi32>, %arg1: memref<1024xi32>, %arg2: memref<1024xi32>) { | ||
memref.assume_alignment %arg0, 32 : memref<1024xi32> | ||
memref.assume_alignment %arg1, 32 : memref<1024xi32> | ||
memref.assume_alignment %arg2, 32 : memref<1024xi32> | ||
affine.for %arg3 = 0 to 1024 { | ||
%0 = affine.load %arg0[%arg3] : memref<1024xi32> | ||
%1 = affine.load %arg1[%arg3] : memref<1024xi32> | ||
%2 = arith.muli %0, %1 : i32 | ||
affine.store %2, %arg2[%arg3] : memref<1024xi32> | ||
} | ||
return | ||
} | ||
} |
30 changes: 30 additions & 0 deletions
30
test/unit_tests/aievec_tests/i8xi8_mul_elem/i8xi8_mul_elem-llvm-scalar.mlir
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@@ -0,0 +1,30 @@ | ||
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | ||
// Copyright (C) 2023, Advanced Micro Devices, Inc. | ||
|
||
// REQUIRES: valid_xchess_license | ||
// REQUIRES: peano | ||
// RUN: mkdir -p %t/data; cd %t | ||
// RUN: aie-opt %s %vector-to-generic-llvmir% -o llvmir.mlir | ||
// RUN: aie-translate llvmir.mlir %llvmir-to-ll% -o dut.ll | ||
// RUN: %PEANO_INSTALL_DIR/bin/clang %clang_aie2_args -c dut.ll -o dut.o | ||
// RUN: xchesscc_wrapper %xchesscc_aie2_args -DTO_LLVM +w work +o work -I%S -I. %S/testbench.cc dut.o | ||
// RUN: xca_udm_dbg --aiearch aie-ml -qf -T -P %aietools/data/aie_ml/lib/ -t "%S/../profiling.tcl ./work/a.out" >& xca_udm_dbg.stdout | ||
// RUN: FileCheck --input-file=./xca_udm_dbg.stdout %s | ||
// CHECK: TEST PASSED | ||
|
||
module { | ||
func.func @dut(%arg0: memref<1024xi8>, %arg1: memref<1024xi8>, %arg2: memref<1024xi32>) { | ||
memref.assume_alignment %arg0, 32 : memref<1024xi8> | ||
memref.assume_alignment %arg1, 32 : memref<1024xi8> | ||
memref.assume_alignment %arg2, 32 : memref<1024xi32> | ||
affine.for %arg3 = 0 to 1024 { | ||
%0 = affine.load %arg0[%arg3] : memref<1024xi8> | ||
%1 = affine.load %arg1[%arg3] : memref<1024xi8> | ||
%2 = arith.extsi %0 : i8 to i32 | ||
%3 = arith.extsi %1 : i8 to i32 | ||
%4 = arith.muli %2, %3 : i32 | ||
affine.store %4, %arg2[%arg3] : memref<1024xi32> | ||
} | ||
return | ||
} | ||
} |
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28 changes: 28 additions & 0 deletions
28
test/unit_tests/aievec_tests/i8xi8_mul_elem_2/i8xi8_mul_elem-llvm-scalar.mlir
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,28 @@ | ||
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | ||
// Copyright (C) 2023, Advanced Micro Devices, Inc. | ||
|
||
// REQUIRES: valid_xchess_license | ||
// REQUIRES: peano | ||
// RUN: mkdir -p %t/data; cd %t | ||
// RUN: aie-opt %s %vector-to-generic-llvmir% -o llvmir.mlir | ||
// RUN: aie-translate llvmir.mlir %llvmir-to-ll% -o dut.ll | ||
// RUN: %PEANO_INSTALL_DIR/bin/clang %clang_aie2_args -c dut.ll -o dut.o | ||
// RUN: xchesscc_wrapper %xchesscc_aie2_args -DTO_LLVM +w work +o work -I%S -I. %S/testbench.cc dut.o | ||
// RUN: xca_udm_dbg --aiearch aie-ml -qf -T -P %aietools/data/aie_ml/lib/ -t "%S/../profiling.tcl ./work/a.out" >& xca_udm_dbg.stdout | ||
// RUN: FileCheck --input-file=./xca_udm_dbg.stdout %s | ||
// CHECK: TEST PASSED | ||
|
||
module { | ||
func.func @dut(%arg0: memref<1024xi8>, %arg1: memref<1024xi8>, %arg2: memref<1024xi8>) { | ||
memref.assume_alignment %arg0, 32 : memref<1024xi8> | ||
memref.assume_alignment %arg1, 32 : memref<1024xi8> | ||
memref.assume_alignment %arg2, 32 : memref<1024xi8> | ||
affine.for %arg3 = 0 to 1024 { | ||
%0 = affine.load %arg0[%arg3] : memref<1024xi8> | ||
%1 = affine.load %arg1[%arg3] : memref<1024xi8> | ||
%2 = arith.muli %0, %1 : i8 | ||
affine.store %2, %arg2[%arg3] : memref<1024xi8> | ||
} | ||
return | ||
} | ||
} |
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