Fix test failures when running with llvm-aie (#1876)

Xilinx · Oct 23, 2024 · 3cfcd24 · 3cfcd24
1 parent f19d9a3
commit 3cfcd24
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Showing 8 changed files with 19 additions and 31 deletions.
diff --git a/test/generate-mmap/allocation_error.mlir b/test/generate-mmap/allocation_error.mlir
@@ -8,7 +8,7 @@
 //
 //===----------------------------------------------------------------------===//
 
-// REQUIRES: peano
+// REQUIRES: peano, aietools_aie
 // RUN: not aiecc.py --basic-alloc-scheme --no-xchesscc --no-xbridge %s 2>&1 | FileCheck %s --check-prefix=PEANO
 // PEANO: ld.lld: error: section '.bss' will not fit in region 'data': overflowed by 4 bytes
 

diff --git a/test/npu-xrt/add_12_i8_using_2d_dma_op_with_padding/run.lit b/test/npu-xrt/add_12_i8_using_2d_dma_op_with_padding/run.lit
@@ -8,5 +8,3 @@
 // RUN: %run_on_npu ./test.exe aie.xclbin | FileCheck %s
 // CHECK: PASS!
 //
-// XFAIL: peano
-
diff --git a/test/npu-xrt/add_21_i8_using_dma_op_with_padding/run.lit b/test/npu-xrt/add_21_i8_using_dma_op_with_padding/run.lit
@@ -7,5 +7,3 @@
 // RUN: clang %S/test.cpp -o test.exe -std=c++11 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags
 // RUN: %run_on_npu ./test.exe aie.xclbin | FileCheck %s
 // CHECK: PASS!
-
-// XFAIL: peano
diff --git a/test/unit_tests/aie2/01_precompiled_core_function/aie.mlir b/test/unit_tests/aie2/01_precompiled_core_function/aie.mlir
@@ -9,11 +9,8 @@
 //===----------------------------------------------------------------------===//
 
 // REQUIRES: peano
-// RUN: %PEANO_INSTALL_DIR/bin/clang --target=aie2 -c %S/kernel.cc
-// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %S/test.cpp -o test.elf
-// RUN: %run_on_board ./test.elf
-
-// CHECK: PASS!
+// RUN: %PEANO_INSTALL_DIR/bin/clang --target=aie2-none-unknown-elf -c %S/kernel.cc
+// RUN: %PYTHON aiecc.py --no-xchesscc --no-xbridge %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %S/test.cpp -o test.elf
 
 module @test_chesss_01_precompiled_core_function {
   aie.device(xcve2802) {

diff --git a/test/unit_tests/aie2/03_cascade_core_functions/aie.mlir b/test/unit_tests/aie2/03_cascade_core_functions/aie.mlir
@@ -9,11 +9,8 @@
 //===----------------------------------------------------------------------===//
 
 // REQUIRES: peano
-// RUN: %PEANO_INSTALL_DIR/bin/clang --target=aie2 -c %S/kernel.cc
-// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %S/test.cpp -o test.elf
-// RUN: %run_on_board ./test.elf
-
-// CHECK: PASS!
+// RUN: %PEANO_INSTALL_DIR/bin/clang --target=aie2-none-unknown-elf -c %S/kernel.cc
+// RUN: %PYTHON aiecc.py --no-xchesscc --no-xbridge %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %S/test.cpp -o test.elf
 
 module {
   aie.device(xcve2802) {

diff --git a/test/unit_tests/aie2/05_shim_dma_core_function/aie.mlir b/test/unit_tests/aie2/05_shim_dma_core_function/aie.mlir
@@ -10,13 +10,8 @@
 //===----------------------------------------------------------------------===//
 
 // REQUIRES: peano
-// RUN: %PEANO_INSTALL_DIR/bin/clang --target=aie2 -c %S/kernel.cc
-// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %S/test.cpp -o test.elf
-// RUN: %run_on_board ./test.elf
-
-// CHECK: AIE2 ISS
-// CHECK: test start.
-// CHECK: PASS!
+// RUN: %PEANO_INSTALL_DIR/bin/clang --target=aie2-none-unknown-elf -c %S/kernel.cc
+// RUN: %PYTHON aiecc.py --no-xchesscc --no-xbridge %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %S/test.cpp -o test.elf
 
 module @test_chess_05_shim_dma_core_function {
   aie.device(xcve2802) {

diff --git a/test/unit_tests/aie2/07_shim_dma_core_function_with_loop/aie.mlir b/test/unit_tests/aie2/07_shim_dma_core_function_with_loop/aie.mlir
@@ -9,9 +9,8 @@
 //===----------------------------------------------------------------------===//
 
 // REQUIRES: peano
-// RUN: %PEANO_INSTALL_DIR/bin/clang --target=aie2 -c %S/kernel.cc
-// RUN: %PYTHON aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %S/test.cpp -o test.elf
-// RUN: %run_on_board ./test.elf
+// RUN: %PEANO_INSTALL_DIR/bin/clang --target=aie2-none-unknown-elf -c %S/kernel.cc
+// RUN: %PYTHON aiecc.py --no-xchesscc --no-xbridge %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% %s %test_lib_flags %S/test.cpp -o test.elf
 
 module @test_chess_04_deprecated_shim_dma_precompiled_kernel{
   aie.device(xcve2802) {

diff --git a/test/unit_tests/chess_compiler_tests_aie2/00_itsalive/aie.mlir b/test/unit_tests/chess_compiler_tests_aie2/00_itsalive/aie.mlir
@@ -8,14 +8,18 @@
 //
 //===----------------------------------------------------------------------===//
 
-// REQUIRES: valid_xchess_license
-// REQUIRES: peano
+// REQUIRES: valid_xchess_license, peano
+
 // RUN: %PYTHON aiecc.py --no-unified --xchesscc    --xbridge %s
 // RUN: %PYTHON aiecc.py --unified    --xchesscc    --xbridge %s
-// RUN: %PYTHON aiecc.py --no-unified --no-xchesscc --xbridge %s
-// RUN: %PYTHON aiecc.py --unified    --no-xchesscc --xbridge %s
-// RUN: %PYTHON aiecc.py --no-unified --xchesscc    --no-xbridge %s
-// RUN: %PYTHON aiecc.py --unified    --xchesscc    --no-xbridge %s
+// RUN: %PYTHON aiecc.py --no-unified --no-xchesscc --no-xbridge %s
+// RUN: %PYTHON aiecc.py --unified    --no-xchesscc --no-xbridge %s
+
+// xchesscc and open source peano do not interact well
+//  UN: %PYTHON aiecc.py --no-unified --no-xchesscc --xbridge %s
+//  UN: %PYTHON aiecc.py --unified    --no-xchesscc --xbridge %s
+//  UN: %PYTHON aiecc.py --no-unified --xchesscc    --no-xbridge %s
+//  UN: %PYTHON aiecc.py --unified    --xchesscc    --no-xbridge %s
 
 module @test00_itsalive {
   aie.device(xcve2802) {