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Rename add one to bias add
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jgmelber committed Apr 9, 2024
1 parent 9a6379f commit 0a36fa1
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2 changes: 1 addition & 1 deletion reference_designs/ipu-xrt/README.md
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These reference designs provide a good starting point to illustrate how to build commonly used compute kernels (both single core and multicore data processing pipelines). They serve to highlight how designs can be described in python and lowered through the mlir-aie tool flow to an executable that runs on the IPU.

* [Add One (with ObjectFIFOs)](./add_one_objFifo) - Single tile performs a very simple `+` operation where the kernel loads data from local memory, increments the value by `1` and stores it back.
* [Vector Bias Add](./vector_bias_add) - Single tile performs a very simple `+` operation where the kernel loads data from local memory, increments the value by `1` and stores it back.
* [Hello World (Log version)](./log_hello_world) - Single tile performs a self-query and `printf` function where printed data is moved from local buffers to external memory to be read by the host processor.
* [Matrix Multiplication](./matrix_multiplication) - Single tile performs a `matrix * matrix` multiply on int16 data type where `MxKxN` is `128x128x128`. The kernel itself computes `64x32x64 (MxKxN)` so it is invoked multiple times to complete the full matmul compute.
* [Vector Scalar](./vector_scalar) - Single tile performs `vector * scalar` of size `4096`. The kernel does a `1024` vector multiply and is invoked multiple times to complete the full vector*scalar compute.
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Expand Up @@ -10,7 +10,7 @@ include ../makefile-common

all: build/final.xclbin

targetname = addOneObjfifo
targetname = vectorBiasAdd

build/aie.mlir: aie2.py
mkdir -p ${@D}
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from aie.extras.context import mlir_mod_ctx


def my_add_one_objFifo():
def my_vector_bias_add():
with mlir_mod_ctx() as ctx:

@device(AIEDevice.ipu)
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print(ctx.module)


my_add_one_objFifo()
my_vector_bias_add()

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