Support for packed MV(A)Us

[mmrahorovic]

1. Adds support for utilizing DSP48s and DSP58s for the HLS-based MVAU layer. For weights and activations that are between 4- and 8-bits wide (with the exception of 9-bits for activations for DSP58), the custom layer packs 2, 3 or 4 elements on the input datapath of the DSP to achieve multiple MACs per cycle per DSP48/DSP58, which depends on the targeted board and quantization.
2. Adds support for utilizing a (naive) LUT-based 'MVAU' layer.

Functionalities to be added for the MVU

• rtllib: RTL implementation for the DSP58-based MVU
  • 4-bit weights x 4-bit activations DSP48 & DSP58: mvu_4sx4u
  • >4-bit weights x >4-bit activations DSP48: mvu_8sx8_dsp48
  • (>)4-bit weights x (>)4-bit activations DSP58: mvu_vvu_8sx9_dsp58
  • Flow control and axi wrapper: mvu_vvu_axi.sv and mvu_vvu_axi_wrapper.v respectively
• Custom-op for the new RTL component: see matrixvectoractivation_rtl.py
  • Code geneneration
  • IP-stitching
  • Resource estimations
  • Cycle estimations
• Transformation to instantiate the newly created custom-op: see specialize_to_rtl_layers.py

Tests

• Test for the MVU custom-op & transformation: test_fpgadataflow_mvau_rtl

Outstanding bugs & features

• PyVerilator bug for simulating array with loop-carried dependency: test_fpgadatflow_mvau_rtl_large_array
• Support for DSP48E1
• 4-bit weights x 4-bit activations DSP48 & DSP58: support for unsigned activations
• Relaxing SIMD constraint (SIMD being a multiple of 3) for DSP58-based implementation