sync with imx8mp_build / imx8mp som support phy interrupts

SolidRun · Nov 5, 2024 · dfd3083 · dfd3083
1 parent 2d1b6cf
commit dfd3083
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diff --git a/...pes-bsp/u-boot/u-boot-imx/0038-board-solidrun-imx8mp-Add-HummingBoard-IIOT-tlv-base.patch b/...pes-bsp/u-boot/u-boot-imx/0038-board-solidrun-imx8mp-Add-HummingBoard-IIOT-tlv-base.patch
@@ -0,0 +1,37 @@
+From fe45745d148dcee3e180c372811759275ed22ad1 Mon Sep 17 00:00:00 2001
+From: Yazan Shhady <[email protected]>
+Date: Tue, 6 Aug 2024 19:08:13 +0300
+Subject: [PATCH] board: solidrun: imx8mp: Add HummingBoard IIOT tlv-based
+ support
+
+---
+ board/solidrun/imx8mp_solidrun/imx8mp_solidrun.c | 6 ++++++
+ 1 file changed, 6 insertions(+)
+
+diff --git a/board/solidrun/imx8mp_solidrun/imx8mp_solidrun.c b/board/solidrun/imx8mp_solidrun/imx8mp_solidrun.c
+index 4c17eea5e4..23317294c5 100644
+--- a/board/solidrun/imx8mp_solidrun/imx8mp_solidrun.c
++++ b/board/solidrun/imx8mp_solidrun/imx8mp_solidrun.c
+@@ -487,6 +487,9 @@ static void board_id_from_tlv_info(void) {
+ 				if (hb_tlv_data.tlv_part_number[i][7] == 'X')
+ 					tmp = "extended";
+ 				break;
++				case 'I': // IIOT
++				tmp = "iiot-main";
++				break;
+ 			    default:
+ 				pr_err("%s: did not recognise board variant '%c' in sku \"%s\"!\n", __func__, hb_tlv_data.tlv_part_number[i][5], hb_tlv_data.tlv_part_number[i]);
+ 				tmp = 0;
+@@ -554,6 +557,9 @@ static void board_id_from_tlv_info(void) {
+ 		    case 'R': // Ripple
+ 			tmp = "hummingboard-ripple";
+ 			break;
++		    case 'I': // IIOT
++			tmp = "hummingboard-iiot-main";
++			break;
+ 		    case 'X': // CuBox
+ 			tmp = "cubox-m";
+ 			break;
+-- 
+2.25.1
+
diff --git a/...pes-bsp/u-boot/u-boot-imx/0039-imx8mp_solidrun-update-SKU-parsing-for-HummingBoard-.patch b/...pes-bsp/u-boot/u-boot-imx/0039-imx8mp_solidrun-update-SKU-parsing-for-HummingBoard-.patch
@@ -0,0 +1,67 @@
+From 8394784abe26478ad397a7748a538c894ce38589 Mon Sep 17 00:00:00 2001
+From: Yazan Shhady <[email protected]>
+Date: Sun, 6 Oct 2024 13:05:37 +0300
+Subject: [PATCH] imx8mp_solidrun: update SKU parsing for HummingBoard variants
+
+- Improved SKU parsing to handle Pulse, Extended, and Pro variants.
+- Treat Extended and Pro SKUs as `hummingboard-pro`.
+- Added documentation for SKU-board mapping.
+
+Signed-off-by: Yazan Shhady <[email protected]>
+---
+ .../imx8mp_solidrun/imx8mp_solidrun.c         | 25 +++++++++++++++----
+ 1 file changed, 20 insertions(+), 5 deletions(-)
+
+diff --git a/board/solidrun/imx8mp_solidrun/imx8mp_solidrun.c b/board/solidrun/imx8mp_solidrun/imx8mp_solidrun.c
+index 23317294c5..ac4d56b6dc 100644
+--- a/board/solidrun/imx8mp_solidrun/imx8mp_solidrun.c
++++ b/board/solidrun/imx8mp_solidrun/imx8mp_solidrun.c
+@@ -474,7 +474,15 @@ static void board_id_from_tlv_info(void) {
+ 	for(int i = 0; i < TLV_MAX_DEVICES; i++) {
+ 		// parse sku - processor or carrier indicated at index 2-6
+ 		if(memcmp(&hb_tlv_data.tlv_part_number[i][2], "HBC", 3) == 0) {
+-			// HummingBoard
++			/*
++			HummingBoard:
++				SKU - Board_Name {xx: board version}:
++				SRHBCUE000CVxx  HB-Pulse
++				SRHBCUEXT0CVxx  HB-Extended
++				SRHBCUPRO0IVxx  HB-Pro
++				SRHBCME000CVxx  HB-Mate
++				SRHBCRE000CVxx  HB-Ripple
++			*/
+ 			switch(hb_tlv_data.tlv_part_number[i][5]) {
+ 			    case 'M': // Mate
+ 				tmp = "mate";
+@@ -482,10 +490,13 @@ static void board_id_from_tlv_info(void) {
+ 			    case 'R': // Ripple
+ 				tmp = "ripple";
+ 				break;
+-			    case 'U': // Pulse or Extended
+-				tmp = "pulse";
+-				if (hb_tlv_data.tlv_part_number[i][7] == 'X')
+-					tmp = "extended";
++			    case 'U': // Pulse, Extended or Pro
++				tmp = "pulse"; // Default to Pulse
++				// Check if it's Extended or Pro, both set to "pro"
++				if (memcmp(&hb_tlv_data.tlv_part_number[i][6], "EXT", 3) == 0 ||
++					memcmp(&hb_tlv_data.tlv_part_number[i][6], "PRO", 3) == 0) {
++					tmp = "pro";
++				}
+ 				break;
+ 				case 'I': // IIOT
+ 				tmp = "iiot-main";
+@@ -557,6 +568,10 @@ static void board_id_from_tlv_info(void) {
+ 		    case 'R': // Ripple
+ 			tmp = "hummingboard-ripple";
+ 			break;
++			case 'P': // Pro
++			case 'T': // Extended (treated as Pro)
++			tmp = "hummingboard-pro";
++			break;
+ 		    case 'I': // IIOT
+ 			tmp = "hummingboard-iiot-main";
+ 			break;
+-- 
+2.25.1
+
diff --git a/...pes-bsp/u-boot/u-boot-imx/0040-board-solidrun-imx8mp-configure-phy-reset-lines-open.patch b/...pes-bsp/u-boot/u-boot-imx/0040-board-solidrun-imx8mp-configure-phy-reset-lines-open.patch
@@ -0,0 +1,70 @@
+From 2bb700a5c5af06e930f76a2a6d7eebdd776cdbc2 Mon Sep 17 00:00:00 2001
+From: Josua Mayer <[email protected]>
+Date: Wed, 23 Oct 2024 14:11:16 +0200
+Subject: [PATCH] board: solidrun: imx8mp: configure phy reset lines open drain
+
+Update pinmux for ethernet phy reset lines to weak io with open drain.
+The SoM has external pull-up on each reset.
+
+Also split off reset signals into their own pinctrl nodes.
+
+Signed-off-by: Josua Mayer <[email protected]>
+---
+ arch/arm/dts/imx8mp-solidrun.dts | 20 ++++++++++++++++----
+ 1 file changed, 16 insertions(+), 4 deletions(-)
+
+diff --git a/arch/arm/dts/imx8mp-solidrun.dts b/arch/arm/dts/imx8mp-solidrun.dts
+index fdcf112c7..9404bc48d 100644
+--- a/arch/arm/dts/imx8mp-solidrun.dts
++++ b/arch/arm/dts/imx8mp-solidrun.dts
+@@ -78,7 +78,7 @@
+
+ &fec {
+ 	pinctrl-names = "default";
+-	pinctrl-0 = <&pinctrl_fec>;
++	pinctrl-0 = <&pinctrl_fec>, <&pinctrl_phy1>;
+ 	phy-mode = "rgmii-id";
+ 	phy-handle = <&ethphy1>;
+ 	fsl,magic-packet;
+@@ -97,7 +97,7 @@
+
+ &eqos {
+ 	pinctrl-names = "default";
+-	pinctrl-0 = <&pinctrl_eqos>;
++	pinctrl-0 = <&pinctrl_eqos>, <&pinctrl_phy0>;
+ 	phy-mode = "rgmii-id";
+ 	phy-handle = <&ethphy0>;
+ 	status = "okay";
+@@ -387,7 +387,13 @@
+ 			MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3	0x1f
+ 			MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL	0x1f
+ 			MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK	0x1f
+-			MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19		0x34
++		>;
++	};
++
++	pinctrl_phy0: phy0grp {
++		fsl,pins = <
++			/* RESET_N: weak i/o, open drain, external 1k pull-up */
++			MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19		0x20
+ 		>;
+ 	};
+
+@@ -407,7 +413,13 @@
+ 			MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3		0x1f
+ 			MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL	0x1f
+ 			MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC		0x1f
+-			MX8MP_IOMUXC_SAI1_RXD0__GPIO4_IO02		0x34
++		>;
++	};
++
++	pinctrl_phy1: phy1grp {
++		fsl,pins = <
++			/* RESET_N: weak i/o, open drain, external 1k pull-up */
++			MX8MP_IOMUXC_SAI1_RXD0__GPIO4_IO02		0x20
+ 		>;
+ 	};
+
+-- 
+2.43.0
+
diff --git a/recipes-bsp/u-boot/u-boot-imx_2022.04.bbappend b/recipes-bsp/u-boot/u-boot-imx_2022.04.bbappend
@@ -37,6 +37,9 @@ SRC_URI += " \
 		file://0034-board-solidrun-imx8mp-enable-second-on-soc-ethernet.patch \
 		file://0036-configs-imx8mp-solidrun-move-environment-to-fit-with.patch \
 		file://0037-net-fec_mxc-add-weak-implementation-of-board_get_mac.patch \
+	file://0038-board-solidrun-imx8mp-Add-HummingBoard-IIOT-tlv-base.patch \
+	file://0039-imx8mp_solidrun-update-SKU-parsing-for-HummingBoard-.patch \
+	file://0040-board-solidrun-imx8mp-configure-phy-reset-lines-open.patch \
 	file://0201-HACK-fastboot-emmc_dev-default-to-0.patch \
 	file://0202-HACK-usb-ci_udc-ignore-ID-pin-value.patch \
 	file://0203-board-solidrun-add-imx8dxl-som.patch \

diff --git a/...es-kernel/linux/linux-imx/0021-arm64-dts-imx8mp-sr-som-add-ethernet-phy-interrupt-s.patch b/...es-kernel/linux/linux-imx/0021-arm64-dts-imx8mp-sr-som-add-ethernet-phy-interrupt-s.patch
@@ -0,0 +1,93 @@
+From c2492933726561d11afceaa1a9603af901eebcdb Mon Sep 17 00:00:00 2001
+From: Josua Mayer <[email protected]>
+Date: Wed, 23 Oct 2024 13:39:58 +0200
+Subject: [PATCH] arm64: dts: imx8mp-sr-som: add ethernet phy interrupt support
+
+Add descriptions for the interrupt lines of both ethernet phys,
+and configure the reset lines as weak open-drain.
+
+Split off the phy signals into their own pinctrl nodes to allow separate
+reference / control.
+
+Signed-off-by: Josua Mayer <[email protected]>
+---
+ .../boot/dts/freescale/imx8mp-sr-som.dtsi     | 28 ++++++++++++++++---
+ 1 file changed, 24 insertions(+), 4 deletions(-)
+
+diff --git a/arch/arm64/boot/dts/freescale/imx8mp-sr-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-sr-som.dtsi
+index f18ba5620..5ab7c33fb 100644
+--- a/arch/arm64/boot/dts/freescale/imx8mp-sr-som.dtsi
++++ b/arch/arm64/boot/dts/freescale/imx8mp-sr-som.dtsi
+@@ -87,7 +87,7 @@ &dsp {
+ /*eth0*/
+ &eqos {
+ 	pinctrl-names = "default";
+-	pinctrl-0 = <&pinctrl_eqos>;
++	pinctrl-0 = <&pinctrl_eqos>, <&pinctrl_phy0>;
+ 	phy-mode = "rgmii-id";
+ 	phy-handle = <&ethphy0>;
+ 	snps,force_thresh_dma_mode;
+@@ -105,6 +105,8 @@ ethphy0: ethernet-phy@0 {
+ 			reg = <0>;
+ 			eee-broken-1000t;
+ 			reset-gpios = <&gpio4 19 GPIO_ACTIVE_LOW>;
++			interrupt-parent = <&gpio4>;
++			interrupts = <18 IRQ_TYPE_LEVEL_LOW>;
+ 		};
+ 	};
+
+@@ -167,7 +169,7 @@ queue4 {
+ /*eth1*/
+ &fec {
+ 	pinctrl-names = "default";
+-	pinctrl-0 = <&pinctrl_fec>;
++	pinctrl-0 = <&pinctrl_fec>, <&pinctrl_phy1>;
+ 	phy-mode = "rgmii-id";
+ 	phy-handle = <&ethphy1>;
+ 	fsl,magic-packet;
+@@ -180,6 +182,8 @@ mdio {
+ 		ethphy1: ethernet-phy@1 {
+ 			reg = <1>;
+ 			reset-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;
++			interrupt-parent = <&gpio4>;
++			interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
+ 		};
+ 	};
+ };
+@@ -538,7 +542,15 @@ MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2       0x1f
+                         MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3       0x1f
+                         MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x1f
+                         MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK       0x1f
+-                        MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19              0x34
++		>;
++	};
++
++	pinctrl_phy0: phy0grp {
++		fsl,pins = <
++			/* INT_N: weak i/o, external 1.5k pull-up */
++			MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18		0x0
++			/* RESET_N: weak i/o, open drain, external 1k pull-up */
++			MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19		0x20
+ 		>;
+ 	};
+
+@@ -558,7 +570,15 @@ MX8MP_IOMUXC_SAI1_TXD2__ENET1_RGMII_TD2         0x1f
+                         MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3         0x1f
+                         MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL      0x1f
+                         MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC         0x1f
+-                        MX8MP_IOMUXC_SAI1_RXD0__GPIO4_IO02              0x34
++		>;
++	};
++
++	pinctrl_phy1: phy1grp {
++		fsl,pins = <
++			/* INT_N: weak i/o, external 1.5k pull-up */
++			MX8MP_IOMUXC_SAI1_RXD1__GPIO4_IO03		0x0
++			/* RESET_N: weak i/o, open drain, external 1k pull-up */
++			MX8MP_IOMUXC_SAI1_RXD0__GPIO4_IO02		0x20
+ 		>;
+ 	};
+
+-- 
+2.43.0
+
diff --git a/recipes-kernel/linux/linux-imx_5.15.bbappend b/recipes-kernel/linux/linux-imx_5.15.bbappend
@@ -22,6 +22,7 @@ SRC_URI += " \
 	file://0018-net-rfkill-gpio-prevent-value-glitch-during-probe.patch \
 	file://0019-net-rfkill-gpio-set-GPIO-direction.patch \
 	file://0020-arm64-dts-imx8mp-hummingboard-pulse-use-upstream-rfk.patch \
+	file://0021-arm64-dts-imx8mp-sr-som-add-ethernet-phy-interrupt-s.patch \
 	file://0100-dt-bindings-net-adin-document-phy-clock-output-prope.patch \
 	file://0101-dt-bindings-net-adin-add-pin-polarity-properties-for.patch \
 	file://0102-net-phy-adin-add-support-for-setting-led-link-status.patch \