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add unit tests
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@Jamiras
Jamiras committed Dec 9, 2023
1 parent 64fcb9e commit 9b2e699
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132 changes: 132 additions & 0 deletions test/rcheevos/test_condset.c
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Original file line number Diff line number Diff line change
Expand Up @@ -1114,6 +1114,136 @@ static void test_resetnextif_andnext_hitchain() {
assert_hit_count(condset, 3, 1);
}

static void test_resetnextif_andnext_chain()
{
uint8_t ram[] = { 0x00, 0x00, 0x00, 0x01, 0x00 };
memory_t memory;
rc_condset_t* condset;
rc_condset_memrefs_t memrefs;
char buffer[2048];

memory.ram = ram;
memory.size = sizeof(ram);

/* ResetNextIf byte(0x0001)!=0
* AndNext byte(0x0002)=0
* ResetNextIf byte(0x0001)=0 (2)
* byte(0x0003)=1 (5)
*/
assert_parse_condset(&condset, &memrefs, buffer, "Z:0xH0001!=0_N:0xH0002=0_Z:0xH0001=0.2._0xH0003=1.5.");

/* first resetnextif not true, conditions 1, 2 and 3 are true */
assert_evaluate_condset(condset, memrefs, &memory, 0);
assert_hit_count(condset, 0, 0);
assert_hit_count(condset, 1, 1);
assert_hit_count(condset, 2, 1);
assert_hit_count(condset, 3, 1);

/* first resetnextif true, conditions 1 and 2 should reset, but not 3 */
ram[1] = 1;
assert_evaluate_condset(condset, memrefs, &memory, 0);
assert_hit_count(condset, 0, 1);
assert_hit_count(condset, 1, 0);
assert_hit_count(condset, 2, 0);
assert_hit_count(condset, 3, 2);

/* first resetnextif not true, condition 1, 2 and 3 are true */
ram[1] = 0;
assert_evaluate_condset(condset, memrefs, &memory, 0);
assert_hit_count(condset, 0, 1);
assert_hit_count(condset, 1, 1);
assert_hit_count(condset, 2, 1);
assert_hit_count(condset, 3, 3);

/* hitcount on condition 2 reached, condition 3 is reset */
assert_evaluate_condset(condset, memrefs, &memory, 0);
assert_hit_count(condset, 0, 1);
assert_hit_count(condset, 1, 2);
assert_hit_count(condset, 2, 2);
assert_hit_count(condset, 3, 0);
}

static void test_resetnextif_addaddress_andnext_chain()
{
uint8_t ram[] = { 0x00, 0x00, 0x00, 0x01, 0x00 };
memory_t memory;
rc_condset_t* condset;
rc_condset_memrefs_t memrefs;
char buffer[2048];

memory.ram = ram;
memory.size = sizeof(ram);

/* AddAddress byte(0x0004)
* ResetNextIf byte(0x0001)!=0
* AndNext byte(0x0002)=0
* AddAddress byte(0x0004)
* ResetNextIf byte(0x0001)=0 (2)
* AddAddress byte(0x0004)
* byte(0x0003)=1 (5)
* Trigger byte(0x0003)=6
*/
assert_parse_condset(&condset, &memrefs, buffer, "A:0xH0004_Z:0xH0001!=0_N:0xH0002=0_A:0xH0004_Z:0xH0001=0.2._A:0xH0004_0xH0003=1.5._T:0xH0003=6");

/* first resetnextif not true, conditions 2, 4 and 6 are true */
assert_evaluate_condset(condset, memrefs, &memory, 0);
assert_hit_count(condset, 1, 0);
assert_hit_count(condset, 2, 1);
assert_hit_count(condset, 4, 1);
assert_hit_count(condset, 6, 1);

/* first resetnextif true, conditions 2 and 4 should reset, but not 6 */
ram[1] = 1;
assert_evaluate_condset(condset, memrefs, &memory, 0);
assert_hit_count(condset, 1, 1);
assert_hit_count(condset, 2, 0);
assert_hit_count(condset, 4, 0);
assert_hit_count(condset, 6, 2);

/* first resetnextif not true, conditions 2, 4 and 6 are true */
ram[1] = 0;
assert_evaluate_condset(condset, memrefs, &memory, 0);
assert_hit_count(condset, 1, 1);
assert_hit_count(condset, 2, 1);
assert_hit_count(condset, 4, 1);
assert_hit_count(condset, 6, 3);

/* hitcount on condition 4 reached, condition 6 is reset */
assert_evaluate_condset(condset, memrefs, &memory, 0);
assert_hit_count(condset, 1, 1);
assert_hit_count(condset, 2, 2);
assert_hit_count(condset, 4, 2);
assert_hit_count(condset, 6, 0);

/* allow last condition to reach hit target */
ram[1] = 1;
assert_evaluate_condset(condset, memrefs, &memory, 0);
assert_evaluate_condset(condset, memrefs, &memory, 0);
assert_evaluate_condset(condset, memrefs, &memory, 0);
assert_evaluate_condset(condset, memrefs, &memory, 0);
assert_evaluate_condset(condset, memrefs, &memory, 0);
assert_hit_count(condset, 1, 6);
assert_hit_count(condset, 2, 0);
assert_hit_count(condset, 4, 0);
assert_hit_count(condset, 6, 5);

/* first resetnextif not true, conditions 2, 4 and 6 are true */
ram[1] = 0;
assert_evaluate_condset(condset, memrefs, &memory, 0);
assert_hit_count(condset, 1, 6);
assert_hit_count(condset, 2, 1);
assert_hit_count(condset, 4, 1);
assert_hit_count(condset, 6, 5);

/* first resetnextif true, conditions 2 and 4 should reset, but not 6 */
ram[1] = 1;
assert_evaluate_condset(condset, memrefs, &memory, 0);
assert_hit_count(condset, 1, 7);
assert_hit_count(condset, 2, 0);
assert_hit_count(condset, 4, 0);
assert_hit_count(condset, 6, 5);
}

static void test_resetnextif_addaddress() {
uint8_t ram[] = {0x00, 0x00, 0x02, 0x03, 0x04};
memory_t memory;
Expand Down Expand Up @@ -4021,8 +4151,10 @@ void test_condset(void) {
TEST(test_resetnextif_addhits_chain_total);
TEST(test_resetnextif_using_andnext);
TEST(test_resetnextif_andnext);
TEST(test_resetnextif_andnext_chain);
TEST(test_resetnextif_andnext_hitchain);
TEST(test_resetnextif_addaddress);
TEST(test_resetnextif_addaddress_andnext_chain);
TEST(test_resetnextif_chain);
TEST(test_resetnextif_chain_andnext);
TEST(test_resetnextif_chain_with_hits);
Expand Down
47 changes: 47 additions & 0 deletions test/rcheevos/test_trigger.c
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Original file line number Diff line number Diff line change
Expand Up @@ -1321,6 +1321,52 @@ static void test_measured_if_while_paused() {
ASSERT_NUM_EQUALS(trigger->measured_value, 2U);
}

static void test_measured_trigger() {
uint8_t ram[] = { 0x00, 0x12, 0x34, 0xAB, 0x56 };
memory_t memory;
rc_trigger_t* trigger;
char buffer[512];

memory.ram = ram;
memory.size = sizeof(ram);

/* never(byte(0) != 0) && trigger_when(measured(repeated(3, byte(2) == 52))) */
assert_parse_trigger(&trigger, buffer, "R:0xH0000!=0SM:0xH0002=52(3)ST:0=1");
ASSERT_NUM_EQUALS(trigger->measured_as_percent, 0);

/* condition is true - hit count should be incremented, and trigger shown */
ASSERT_NUM_EQUALS(evaluate_trigger(trigger, &memory), RC_TRIGGER_STATE_PRIMED);
assert_hit_count(trigger, 1, 0, 1U);
ASSERT_NUM_EQUALS(trigger->measured_value, 1U);
ASSERT_NUM_EQUALS(trigger->measured_target, 3U);

/* core condition is false - trigger should not be shown and hit count reset */
ram[0] = 1;
ASSERT_NUM_EQUALS(evaluate_trigger(trigger, &memory), RC_TRIGGER_STATE_RESET);
assert_hit_count(trigger, 1, 0, 0U);
ASSERT_NUM_EQUALS(trigger->measured_value, 0U);
ASSERT_NUM_EQUALS(trigger->measured_target, 3U);

/* core condition is true again - hit count should be incremented, and trigger shown */
ram[0] = 0;
ASSERT_NUM_EQUALS(evaluate_trigger(trigger, &memory), RC_TRIGGER_STATE_PRIMED);
assert_hit_count(trigger, 1, 0, 1U);
ASSERT_NUM_EQUALS(trigger->measured_value, 1U);
ASSERT_NUM_EQUALS(trigger->measured_target, 3U);

/* increment hit count */
ASSERT_NUM_EQUALS(evaluate_trigger(trigger, &memory), RC_TRIGGER_STATE_PRIMED);
assert_hit_count(trigger, 1, 0, 2U);
ASSERT_NUM_EQUALS(trigger->measured_value, 2U);
ASSERT_NUM_EQUALS(trigger->measured_target, 3U);

/* trigger */
ASSERT_NUM_EQUALS(evaluate_trigger(trigger, &memory), RC_TRIGGER_STATE_TRIGGERED);
assert_hit_count(trigger, 1, 0, 3U);
ASSERT_NUM_EQUALS(trigger->measured_value, 3U);
ASSERT_NUM_EQUALS(trigger->measured_target, 3U);
}

static void test_resetnextif_trigger() {
uint8_t ram[] = {0x00, 0x12, 0x34, 0xAB, 0x56};
memory_t memory;
Expand Down Expand Up @@ -1934,6 +1980,7 @@ void test_trigger(void) {
TEST(test_measured_if_multiple_measured);
TEST(test_measured_if_multiple_measured_if);
TEST(test_measured_if_while_paused);
TEST(test_measured_trigger);

/* trigger */
TEST(test_resetnextif_trigger);
Expand Down

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