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Thumb: Correctly handles base in register list for multiple load/store
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This commit fixes thumb tests 230,231,232.
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AlessioC31 authored and guerinoni committed Jan 3, 2024
1 parent cc126a2 commit 7c39cd6
Showing 1 changed file with 11 additions and 0 deletions.
11 changes: 11 additions & 0 deletions emu/src/cpu/thumb/operations.rs
Original file line number Diff line number Diff line change
Expand Up @@ -500,6 +500,8 @@ impl Arm7tdmi {

match load_store {
LoadStoreKind::Store => {
let mut first_written = false;

for r in 0..=15 {
if register_list.is_bit_on(r) {
let value = self.registers.register_at(r as usize)
Expand All @@ -508,8 +510,17 @@ impl Arm7tdmi {
thumb::operations::SIZE_OF_INSTRUCTION
} else {
0
}
// If we store the base register as second register (or later) we store
// the updated value as if it was already written back.
+ if first_written && r as usize == base_register {
register_count * 4
} else {
0
};

first_written = true;

self.bus.write_word(address as usize, value);

address += 4;
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