fix mistake in u250_gen3x8

Quarky93 · Jun 2, 2023 · 3a819d7 · 3a819d7
1 parent 7631c68
commit 3a819d7
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Showing 6 changed files with 33 additions and 43 deletions.
diff --git a/hw/shells/xilinx_u250/xdma_gen3x8/build.tcl b/hw/shells/xilinx_u250/xdma_gen3x8/build.tcl
@@ -1,6 +1,6 @@
 set script_path [file dirname [file normalize [info script]]]
 
-create_project -part xcu250-figd2104-2-e synth synth
+create_project -part xcu250-figd2104-2L-e synth synth
 set_property source_mgmt_mode All [current_project]
 
 # -- [READ FILES] -------------------------------------------------------------
@@ -38,5 +38,5 @@ phys_opt_design -directive ExploreWithAggressiveHoldFix
 write_checkpoint ./post_route_xilinx_u250_xdma_gen3x8.dcp
 write_bitstream -bin_file -force ./warpshell_xilinx_u250_xdma_gen3x8.bit
 write_abstract_shell -cell user_partition -force ./abstract_warpshell_xilinx_u250_xdma_gen3x8.dcp
-write_cfgmem -force -format mcs -interface spix4 -size 128 -loadbit "up 0x01002000 warpshell_xilinx_u250_xdma_gen3x8.bit" -file "warpshell_xilinx_u250_xdma_gen3x8.mcs"
+write_cfgmem -force -format mcs -interface spix4 -size 256 -loadbit "up 0x01002000 warpshell_xilinx_u250_xdma_gen3x8.bit" -file "warpshell_xilinx_u250_xdma_gen3x8.mcs"
 # -----------------------------------------------------------------------------
diff --git a/hw/shells/xilinx_u250/xdma_gen3x8/edit.tcl b/hw/shells/xilinx_u250/xdma_gen3x8/edit.tcl
@@ -1,6 +1,6 @@
 set script_path [file dirname [file normalize [info script]]]
 
-create_project -in_memory -part xcu250-figd2104-2-e
+create_project -in_memory -part xcu250-figd2104-2L-e
 set_property source_mgmt_mode All [current_project]
 
 proc commit {} {

diff --git a/hw/shells/xilinx_u250/xdma_gen3x8/shell.bd b/hw/shells/xilinx_u250/xdma_gen3x8/shell.bd
@@ -1,12 +1,12 @@
 {
   "design": {
     "design_info": {
-      "boundary_crc": "0x2C264B02CCACC96",
-      "device": "xcu250-figd2104-2-e",
+      "boundary_crc": "0x2C264B07000CB52",
+      "device": "xcu250-figd2104-2L-e",
       "name": "shell",
       "rev_ctrl_bd_flag": "RevCtrlBdOff",
       "synth_flow_mode": "None",
-      "tool_version": "2022.2",
+      "tool_version": "2023.1",
       "validated": "true"
     },
     "design_tree": {
@@ -205,7 +205,7 @@
           },
           "HAS_CACHE": {
             "value": "0",
-            "value_src": "default"
+            "value_src": "ip_prop"
           },
           "HAS_LOCK": {
             "value": "0"
@@ -216,7 +216,7 @@
           },
           "HAS_QOS": {
             "value": "0",
-            "value_src": "default"
+            "value_src": "ip_prop"
           },
           "HAS_REGION": {
             "value": "0",
@@ -276,7 +276,7 @@
             "value_src": "ip_prop"
           },
           "SUPPORTS_NARROW_BURST": {
-            "value": "0",
+            "value": "1",
             "value_src": "default_prop"
           },
           "WUSER_BITS_PER_BYTE": {
@@ -496,7 +496,7 @@
             "value_src": "ip_prop"
           },
           "SUPPORTS_NARROW_BURST": {
-            "value": "0",
+            "value": "1",
             "value_src": "default_prop"
           },
           "WUSER_BITS_PER_BYTE": {
@@ -1336,14 +1336,14 @@
           },
           "m00_couplers_to_axi_interconnect_dma": {
             "interface_ports": [
-              "M00_AXI",
-              "m00_couplers/M_AXI"
+              "m00_couplers/M_AXI",
+              "M00_AXI"
             ]
           },
           "m01_couplers_to_axi_interconnect_dma": {
             "interface_ports": [
-              "M01_AXI",
-              "m01_couplers/M_AXI"
+              "m01_couplers/M_AXI",
+              "M01_AXI"
             ]
           },
           "s00_couplers_to_xbar": {

diff --git a/hw/shells/xilinx_u250/xdma_gen3x8/user.bd b/hw/shells/xilinx_u250/xdma_gen3x8/user.bd
@@ -2,11 +2,11 @@
   "design": {
     "design_info": {
       "boundary_crc": "0x9F0EE1D921DEB20C",
-      "device": "xcu250-figd2104-2-e",
+      "device": "xcu250-figd2104-2L-e",
       "name": "user",
       "rev_ctrl_bd_flag": "RevCtrlBdOff",
       "synth_flow_mode": "None",
-      "tool_version": "2022.2",
+      "tool_version": "2023.1",
       "validated": "true"
     },
     "design_tree": {
@@ -771,8 +771,8 @@
       },
       "smartconnect_dma": {
         "vlnv": "xilinx.com:ip:smartconnect:1.0",
-        "xci_name": "user_smartconnect_0_0",
-        "xci_path": "ip/user_smartconnect_0_0/user_smartconnect_0_0.xci",
+        "xci_name": "user_smartconnect_dma_0",
+        "xci_path": "ip/user_smartconnect_dma_0/user_smartconnect_dma_0.xci",
         "inst_hier_path": "smartconnect_dma",
         "parameters": {
           "NUM_SI": {
@@ -922,7 +922,7 @@
               "SEG_dummy_dma_target_Mem0": {
                 "address_block": "/dummy_dma_target/S_AXI/Mem0",
                 "offset": "0x0000000000000000",
-                "range": "256T"
+                "range": "8K"
               }
             }
           }

diff --git a/hw/shells/xilinx_u55n/xdma_gen3x8/shell.bd b/hw/shells/xilinx_u55n/xdma_gen3x8/shell.bd
@@ -1,12 +1,12 @@
 {
   "design": {
     "design_info": {
-      "boundary_crc": "0x7BC4BA6E561CA014",
+      "boundary_crc": "0x7BC4BA6E0DE2C31A",
       "device": "xcu55n-fsvh2892-2L-e",
       "name": "shell",
       "rev_ctrl_bd_flag": "RevCtrlBdOff",
       "synth_flow_mode": "None",
-      "tool_version": "2022.2",
+      "tool_version": "2023.1",
       "validated": "true"
     },
     "design_tree": {
@@ -237,7 +237,7 @@
             "value_src": "ip_prop"
           },
           "SUPPORTS_NARROW_BURST": {
-            "value": "1",
+            "value": "0",
             "value_src": "default_prop"
           },
           "WUSER_BITS_PER_BYTE": {
@@ -539,7 +539,7 @@
             "value_src": "ip_prop"
           },
           "SUPPORTS_NARROW_BURST": {
-            "value": "1",
+            "value": "0",
             "value_src": "default_prop"
           },
           "WUSER_BITS_PER_BYTE": {
@@ -1898,6 +1898,9 @@
           "pf0_base_class_menu": {
             "value": "Processing_accelerators"
           },
+          "pf0_subsystem_id": {
+            "value": "A001"
+          },
           "pl_link_cap_max_link_speed": {
             "value": "8.0_GT/s"
           },
@@ -2292,14 +2295,14 @@
           },
           "m00_couplers_to_axi_interconnect_dma": {
             "interface_ports": [
-              "M00_AXI",
-              "m00_couplers/M_AXI"
+              "m00_couplers/M_AXI",
+              "M00_AXI"
             ]
           },
           "m01_couplers_to_axi_interconnect_dma": {
             "interface_ports": [
-              "M01_AXI",
-              "m01_couplers/M_AXI"
+              "m01_couplers/M_AXI",
+              "M01_AXI"
             ]
           },
           "s00_couplers_to_xbar": {

diff --git a/hw/shells/xilinx_vck5000/xdma_gen4x8/top.v b/hw/shells/xilinx_vck5000/xdma_gen4x8/top.v
@@ -71,17 +71,7 @@ module top (
     input pcie_ref_clk_clk_p
 );
 
-wire [0:0]shell_to_user_ini_internoc;
-wire user_ref_clk_100;
-wire [0:0]user_to_shell_ini_internoc;
-
-user user_partition (
-    .shell_to_user_ini_internoc(shell_to_user_ini_internoc),
-    .user_ref_clk_100(user_ref_clk_100),
-    .user_to_shell_ini_internoc(user_to_shell_ini_internoc)
-);
-
-shell shell_partition (
+shell shell_i (
     .ddr4_ch_0_act_n(ddr4_ch_0_act_n),
     .ddr4_ch_0_adr(ddr4_ch_0_adr),
     .ddr4_ch_0_ba(ddr4_ch_0_ba),
@@ -151,10 +141,7 @@ shell shell_partition (
     .pcie_mgt_gtx_n(pcie_mgt_gtx_n),
     .pcie_mgt_gtx_p(pcie_mgt_gtx_p),
     .pcie_ref_clk_clk_n(pcie_ref_clk_clk_n),
-    .pcie_ref_clk_clk_p(pcie_ref_clk_clk_p),
-    .shell_to_user_ini_internoc(shell_to_user_ini_internoc),
-    .user_ref_clk_100(user_ref_clk_100),
-    .user_to_shell_ini_internoc(user_to_shell_ini_internoc)
+    .pcie_ref_clk_clk_p(pcie_ref_clk_clk_p)
 );
 
-endmodule
+endmodule