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Update API dev docs (#2472)
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6 changes: 3 additions & 3 deletions docs/api/qiskit-ibm-runtime/dev/fake_provider.mdx
Original file line number Diff line number Diff line change
Expand Up @@ -41,7 +41,7 @@ circuit.measure_all()
circuit.draw('mpl', style="iqp")
```

![\[Circuit diagram output by the previous code.\]](/images/api/qiskit-ibm-runtime/dev/fake_provider-1.png)
![Circuit diagram output by the previous code.](/images/api/qiskit-ibm-runtime/dev/fake_provider-1.png)

```python
# Transpile the ideal circuit to a circuit that can be
Expand All @@ -50,7 +50,7 @@ transpiled_circuit = transpile(circuit, backend)
transpiled_circuit.draw('mpl', style="iqp")
```

![\[Circuit diagram output by the previous code.\]](/images/api/qiskit-ibm-runtime/dev/fake_provider-2.png)
![Circuit diagram output by the previous code.](/images/api/qiskit-ibm-runtime/dev/fake_provider-2.png)

```python
# Run the transpiled circuit using the simulated fake backend
Expand All @@ -61,7 +61,7 @@ counts = pub_result.data.meas.get_counts()
plot_histogram(counts)
```

![\[Histogram output by the previous code.\]](/images/api/qiskit-ibm-runtime/dev/fake_provider-3.png)
![Histogram output by the previous code.](/images/api/qiskit-ibm-runtime/dev/fake_provider-3.png)

<Admonition title="Important" type="danger">
Please note that the simulation is done using a noise model generated from system snapshots obtained in the past (sometimes a few years ago) and the results are not representative of the latest behaviours of the real quantum system which the fake backend is mimicking. If you want to run noisy simulations to compare with the real quantum system, you should use the `qiskit_aer` library. After installation, you can follow the steps below to generate a simulator that mimics a real quantum system with the latest calibration results.
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Original file line number Diff line number Diff line change
Expand Up @@ -45,7 +45,7 @@ python_api_name: qiskit_ibm_runtime.transpiler.passes.scheduling.PadDynamicalDec
circ_dd.draw('mpl', style="iqp")
```

![\[Circuit diagram output by the previous code.\]](/images/api/qiskit-ibm-runtime/dev/qiskit_ibm_runtime-transpiler-passes-scheduling-PadDynamicalDecoupling-1.png)
![Circuit diagram output by the previous code.](/images/api/qiskit-ibm-runtime/dev/qiskit_ibm_runtime-transpiler-passes-scheduling-PadDynamicalDecoupling-1.png)

```python
# Uhrig sequence on qubit 0
Expand All @@ -67,7 +67,7 @@ python_api_name: qiskit_ibm_runtime.transpiler.passes.scheduling.PadDynamicalDec
circ_dd.draw('mpl', style="iqp")
```

![\[Circuit diagram output by the previous code.\]](/images/api/qiskit-ibm-runtime/dev/qiskit_ibm_runtime-transpiler-passes-scheduling-PadDynamicalDecoupling-2.png)
![Circuit diagram output by the previous code.](/images/api/qiskit-ibm-runtime/dev/qiskit_ibm_runtime-transpiler-passes-scheduling-PadDynamicalDecoupling-2.png)

<Admonition title="Note" type="note">
You need to call [`ALAPScheduleAnalysis`](qiskit_ibm_runtime.transpiler.passes.scheduling.ALAPScheduleAnalysis "qiskit_ibm_runtime.transpiler.passes.scheduling.ALAPScheduleAnalysis") before running dynamical decoupling to guarantee your circuit satisfies acquisition alignment constraints for dynamic circuit backends.
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Original file line number Diff line number Diff line change
Expand Up @@ -80,7 +80,7 @@ scheduled_teleport = pm.run(teleport)
scheduled_teleport.draw(output="mpl", style="iqp")
```

![\[Circuit diagram output by the previous code.\]](/images/api/qiskit-ibm-runtime/dev/qiskit_ibm_runtime-transpiler-passes-scheduling-1.png)
![Circuit diagram output by the previous code.](/images/api/qiskit-ibm-runtime/dev/qiskit_ibm_runtime-transpiler-passes-scheduling-1.png)

Instead of padding with delays we may also insert a dynamical decoupling sequence using the [`PadDynamicalDecoupling`](qiskit_ibm_runtime.transpiler.passes.scheduling.PadDynamicalDecoupling "qiskit_ibm_runtime.transpiler.passes.scheduling.PadDynamicalDecoupling") pass as shown below:

Expand All @@ -105,7 +105,7 @@ dd_teleport = pm.run(teleport)
dd_teleport.draw(output="mpl", style="iqp")
```

![\[Circuit diagram output by the previous code.\]](/images/api/qiskit-ibm-runtime/dev/qiskit_ibm_runtime-transpiler-passes-scheduling-2.png)
![Circuit diagram output by the previous code.](/images/api/qiskit-ibm-runtime/dev/qiskit_ibm_runtime-transpiler-passes-scheduling-2.png)

When compiling a circuit with Qiskit, it is more efficient and more robust to perform all the transformations in a single transpilation. This has been done above by extending Qiskit’s preset pass managers. For example, Qiskit’s [`transpile()`](/api/qiskit/compiler#qiskit.compiler.transpile "(in Qiskit v1.3)") function internally builds its pass set by using [`generate_preset_pass_manager()`](/api/qiskit/transpiler_preset#qiskit.transpiler.preset_passmanagers.generate_preset_pass_manager "(in Qiskit v1.3)"). This returns instances of [`StagedPassManager`](/api/qiskit/qiskit.transpiler.StagedPassManager "(in Qiskit v1.3)"), which can be extended.

Expand All @@ -121,7 +121,7 @@ qc_c_if.x(0).c_if(0, 1)
qc_c_if.draw(output="mpl", style="iqp")
```

![\[Circuit diagram output by the previous code.\]](/images/api/qiskit-ibm-runtime/dev/qiskit_ibm_runtime-transpiler-passes-scheduling-3.png)
![Circuit diagram output by the previous code.](/images/api/qiskit-ibm-runtime/dev/qiskit_ibm_runtime-transpiler-passes-scheduling-3.png)

The [`IBMBackend`](qiskit_ibm_runtime.IBMBackend "qiskit_ibm_runtime.IBMBackend") configures a translation plugin `IBMTranslationPlugin` to automatically apply transformations and optimizations for IBM hardware backends when invoking [`transpile()`](/api/qiskit/compiler#qiskit.compiler.transpile "(in Qiskit v1.3)"). This will automatically convert all old style `c_if` conditioned gates to new-style control-flow. We may then schedule the transpiled circuit without further modification.

Expand All @@ -141,7 +141,7 @@ qc_if_dd = pm.run(qc_c_if, backend)
qc_if_dd.draw(output="mpl", style="iqp")
```

![\[Circuit diagram output by the previous code.\]](/images/api/qiskit-ibm-runtime/dev/qiskit_ibm_runtime-transpiler-passes-scheduling-4.png)
![Circuit diagram output by the previous code.](/images/api/qiskit-ibm-runtime/dev/qiskit_ibm_runtime-transpiler-passes-scheduling-4.png)

If you are not using the transpiler plugin stages to work around this please manually run the pass [`qiskit.transpiler.passes.ConvertConditionsToIfOps`](/api/qiskit/qiskit.transpiler.passes.ConvertConditionsToIfOps "(in Qiskit v1.3)") prior to your scheduling pass.

Expand All @@ -161,7 +161,7 @@ qc_if_dd = pm.run(qc_c_if)
qc_if_dd.draw(output="mpl", style="iqp")
```

![\[Circuit diagram output by the previous code.\]](/images/api/qiskit-ibm-runtime/dev/qiskit_ibm_runtime-transpiler-passes-scheduling-5.png)
![Circuit diagram output by the previous code.](/images/api/qiskit-ibm-runtime/dev/qiskit_ibm_runtime-transpiler-passes-scheduling-5.png)

<span id="exploiting-ibm-backend-s-local-parallel-fast-path" />

Expand All @@ -184,7 +184,7 @@ with qc.if_test((1, 1)):
qc.draw(output="mpl", style="iqp")
```

![\[Circuit diagram output by the previous code.\]](/images/api/qiskit-ibm-runtime/dev/qiskit_ibm_runtime-transpiler-passes-scheduling-6.png)
![Circuit diagram output by the previous code.](/images/api/qiskit-ibm-runtime/dev/qiskit_ibm_runtime-transpiler-passes-scheduling-6.png)

The circuit below will not use the fast-path as the conditional gate is on a different qubit than the measurement qubit.

Expand All @@ -197,7 +197,7 @@ with qc.if_test((0, 1)):
qc.draw(output="mpl", style="iqp")
```

![\[Circuit diagram output by the previous code.\]](/images/api/qiskit-ibm-runtime/dev/qiskit_ibm_runtime-transpiler-passes-scheduling-7.png)
![Circuit diagram output by the previous code.](/images/api/qiskit-ibm-runtime/dev/qiskit_ibm_runtime-transpiler-passes-scheduling-7.png)

Similarly, the circuit below contains gates on multiple qubits and will not be performed using the fast-path.

Expand All @@ -211,7 +211,7 @@ with qc.if_test((0, 1)):
qc.draw(output="mpl", style="iqp")
```

![\[Circuit diagram output by the previous code.\]](/images/api/qiskit-ibm-runtime/dev/qiskit_ibm_runtime-transpiler-passes-scheduling-8.png)
![Circuit diagram output by the previous code.](/images/api/qiskit-ibm-runtime/dev/qiskit_ibm_runtime-transpiler-passes-scheduling-8.png)

A fast-path block may contain multiple gates as long as they are on the fast-path qubit. If there are multiple fast-path blocks being performed in parallel each block will be padded out to the duration of the longest block.

Expand All @@ -229,7 +229,7 @@ with qc.if_test((1, 1)):
qc.draw(output="mpl", style="iqp")
```

![\[Circuit diagram output by the previous code.\]](/images/api/qiskit-ibm-runtime/dev/qiskit_ibm_runtime-transpiler-passes-scheduling-9.png)
![Circuit diagram output by the previous code.](/images/api/qiskit-ibm-runtime/dev/qiskit_ibm_runtime-transpiler-passes-scheduling-9.png)

This behavior is also applied to the else condition of a fast-path eligible branch.

Expand All @@ -246,7 +246,7 @@ with else_:
qc.draw(output="mpl", style="iqp")
```

![\[Circuit diagram output by the previous code.\]](/images/api/qiskit-ibm-runtime/dev/qiskit_ibm_runtime-transpiler-passes-scheduling-10.png)
![Circuit diagram output by the previous code.](/images/api/qiskit-ibm-runtime/dev/qiskit_ibm_runtime-transpiler-passes-scheduling-10.png)

If a single measurement result is used with several conditional blocks, if there is a fast-path eligible block it will be applied followed by the non-fast-path blocks which will execute with the standard higher latency conditional branch.

Expand All @@ -264,7 +264,7 @@ with qc.if_test((0, 1)):
qc.draw(output="mpl", style="iqp")
```

![\[Circuit diagram output by the previous code.\]](/images/api/qiskit-ibm-runtime/dev/qiskit_ibm_runtime-transpiler-passes-scheduling-11.png)
![Circuit diagram output by the previous code.](/images/api/qiskit-ibm-runtime/dev/qiskit_ibm_runtime-transpiler-passes-scheduling-11.png)

If you wish to prevent the usage of the fast-path you may insert a barrier between the measurement and the conditional branch.

Expand All @@ -279,7 +279,7 @@ with qc.if_test((0, 1)):
qc.draw(output="mpl", style="iqp")
```

![\[Circuit diagram output by the previous code.\]](/images/api/qiskit-ibm-runtime/dev/qiskit_ibm_runtime-transpiler-passes-scheduling-12.png)
![Circuit diagram output by the previous code.](/images/api/qiskit-ibm-runtime/dev/qiskit_ibm_runtime-transpiler-passes-scheduling-12.png)

Conditional measurements are not eligible for the fast-path.

Expand All @@ -293,7 +293,7 @@ with qc.if_test((0, 1)):
qc.draw(output="mpl", style="iqp")
```

![\[Circuit diagram output by the previous code.\]](/images/api/qiskit-ibm-runtime/dev/qiskit_ibm_runtime-transpiler-passes-scheduling-13.png)
![Circuit diagram output by the previous code.](/images/api/qiskit-ibm-runtime/dev/qiskit_ibm_runtime-transpiler-passes-scheduling-13.png)

Similarly nested control-flow is not eligible.

Expand All @@ -309,7 +309,7 @@ with qc.if_test((0, 1)):
qc.draw(output="mpl", style="iqp")
```

![\[Circuit diagram output by the previous code.\]](/images/api/qiskit-ibm-runtime/dev/qiskit_ibm_runtime-transpiler-passes-scheduling-14.png)
![Circuit diagram output by the previous code.](/images/api/qiskit-ibm-runtime/dev/qiskit_ibm_runtime-transpiler-passes-scheduling-14.png)

The scheduler is aware of the fast-path behavior and will not insert delays on idle qubits in blocks that satisfy the fast-path conditions so as to avoid preventing the backend compiler from performing the necessary optimizations to utilize the fast-path. If there are fast-path blocks that will be performed in parallel they currently *will not* be padded out by the scheduler to ensure they are of the same duration in Qiskit

Expand All @@ -330,7 +330,7 @@ with qc.if_test((1, 1)):
qc.draw(output="mpl", style="iqp")
```

![\[Circuit diagram output by the previous code.\]](/images/api/qiskit-ibm-runtime/dev/qiskit_ibm_runtime-transpiler-passes-scheduling-15.png)
![Circuit diagram output by the previous code.](/images/api/qiskit-ibm-runtime/dev/qiskit_ibm_runtime-transpiler-passes-scheduling-15.png)

```python
dd_sequence = [XGate(), XGate()]
Expand All @@ -346,7 +346,7 @@ qc_dd = pm.run(qc)
qc_dd.draw(output="mpl", style="iqp")
```

![\[Circuit diagram output by the previous code.\]](/images/api/qiskit-ibm-runtime/dev/qiskit_ibm_runtime-transpiler-passes-scheduling-16.png)
![Circuit diagram output by the previous code.](/images/api/qiskit-ibm-runtime/dev/qiskit_ibm_runtime-transpiler-passes-scheduling-16.png)

<Admonition title="Note" type="note">
If there are qubits that are *not* involved in a fast-path decision it is not currently possible to use them in a fast-path branch in parallel with the fast-path qubits resulting from a measurement. This will be revised in the future as we further improve these capabilities.
Expand All @@ -370,6 +370,6 @@ qc_dd.draw(output="mpl", style="iqp")
qc.draw(output="mpl", style="iqp")
```

![\[Circuit diagram output by the previous code.\]](/images/api/qiskit-ibm-runtime/dev/qiskit_ibm_runtime-transpiler-passes-scheduling-17.png)
![Circuit diagram output by the previous code.](/images/api/qiskit-ibm-runtime/dev/qiskit_ibm_runtime-transpiler-passes-scheduling-17.png)
</Admonition>

12 changes: 12 additions & 0 deletions docs/api/qiskit/dev/_toc.json
Original file line number Diff line number Diff line change
Expand Up @@ -1285,6 +1285,10 @@
"title": "FullAdderSynthesisC04",
"url": "/api/qiskit/dev/qiskit.transpiler.passes.synthesis.hls_plugins.FullAdderSynthesisC04"
},
{
"title": "FullAdderSynthesisDefault",
"url": "/api/qiskit/dev/qiskit.transpiler.passes.synthesis.hls_plugins.FullAdderSynthesisDefault"
},
{
"title": "FullAdderSynthesisV95",
"url": "/api/qiskit/dev/qiskit.transpiler.passes.synthesis.hls_plugins.FullAdderSynthesisV95"
Expand Down Expand Up @@ -1313,6 +1317,10 @@
"title": "HalfAdderSynthesisD00",
"url": "/api/qiskit/dev/qiskit.transpiler.passes.synthesis.hls_plugins.HalfAdderSynthesisD00"
},
{
"title": "HalfAdderSynthesisDefault",
"url": "/api/qiskit/dev/qiskit.transpiler.passes.synthesis.hls_plugins.HalfAdderSynthesisDefault"
},
{
"title": "HalfAdderSynthesisV95",
"url": "/api/qiskit/dev/qiskit.transpiler.passes.synthesis.hls_plugins.HalfAdderSynthesisV95"
Expand Down Expand Up @@ -1417,6 +1425,10 @@
"title": "ModularAdderSynthesisD00",
"url": "/api/qiskit/dev/qiskit.transpiler.passes.synthesis.hls_plugins.ModularAdderSynthesisD00"
},
{
"title": "ModularAdderSynthesisDefault",
"url": "/api/qiskit/dev/qiskit.transpiler.passes.synthesis.hls_plugins.ModularAdderSynthesisDefault"
},
{
"title": "ModularAdderSynthesisV95",
"url": "/api/qiskit/dev/qiskit.transpiler.passes.synthesis.hls_plugins.ModularAdderSynthesisV95"
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Original file line number Diff line number Diff line change
Expand Up @@ -8,7 +8,7 @@ python_api_name: qiskit.circuit.library.FullAdderGate

# FullAdderGate

<Class id="qiskit.circuit.library.FullAdderGate" isDedicatedPage={true} github="https://github.com/Qiskit/qiskit/tree/main/qiskit/circuit/library/arithmetic/adders/adder.py#L166-L210" signature="qiskit.circuit.library.FullAdderGate(num_state_qubits, label=None)" modifiers="class">
<Class id="qiskit.circuit.library.FullAdderGate" isDedicatedPage={true} github="https://github.com/Qiskit/qiskit/tree/main/qiskit/circuit/library/arithmetic/adders/adder.py#L184-L235" signature="qiskit.circuit.library.FullAdderGate(num_state_qubits, label=None)" modifiers="class">
Bases: [`Gate`](qiskit.circuit.Gate "qiskit.circuit.gate.Gate")

Compute the sum of two $n$-sized qubit registers, including carry-in and -out bits.
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Original file line number Diff line number Diff line change
Expand Up @@ -8,7 +8,7 @@ python_api_name: qiskit.circuit.library.HalfAdderGate

# HalfAdderGate

<Class id="qiskit.circuit.library.HalfAdderGate" isDedicatedPage={true} github="https://github.com/Qiskit/qiskit/tree/main/qiskit/circuit/library/arithmetic/adders/adder.py#L74-L117" signature="qiskit.circuit.library.HalfAdderGate(num_state_qubits, label=None)" modifiers="class">
<Class id="qiskit.circuit.library.HalfAdderGate" isDedicatedPage={true} github="https://github.com/Qiskit/qiskit/tree/main/qiskit/circuit/library/arithmetic/adders/adder.py#L74-L126" signature="qiskit.circuit.library.HalfAdderGate(num_state_qubits, label=None)" modifiers="class">
Bases: [`Gate`](qiskit.circuit.Gate "qiskit.circuit.gate.Gate")

Compute the sum of two equally-sized qubit registers, including a carry-out bit.
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Original file line number Diff line number Diff line change
Expand Up @@ -8,7 +8,7 @@ python_api_name: qiskit.circuit.library.ModularAdderGate

# ModularAdderGate

<Class id="qiskit.circuit.library.ModularAdderGate" isDedicatedPage={true} github="https://github.com/Qiskit/qiskit/tree/main/qiskit/circuit/library/arithmetic/adders/adder.py#L120-L163" signature="qiskit.circuit.library.ModularAdderGate(num_state_qubits, label=None)" modifiers="class">
<Class id="qiskit.circuit.library.ModularAdderGate" isDedicatedPage={true} github="https://github.com/Qiskit/qiskit/tree/main/qiskit/circuit/library/arithmetic/adders/adder.py#L129-L181" signature="qiskit.circuit.library.ModularAdderGate(num_state_qubits, label=None)" modifiers="class">
Bases: [`Gate`](qiskit.circuit.Gate "qiskit.circuit.gate.Gate")

Compute the sum modulo $2^n$ of two $n$-sized qubit registers.
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -8,7 +8,7 @@ python_api_name: qiskit.circuit.library.MultiplierGate

# MultiplierGate

<Class id="qiskit.circuit.library.MultiplierGate" isDedicatedPage={true} github="https://github.com/Qiskit/qiskit/tree/main/qiskit/circuit/library/arithmetic/multipliers/multiplier.py#L114-L192" signature="qiskit.circuit.library.MultiplierGate(num_state_qubits, num_result_qubits=None, label=None)" modifiers="class">
<Class id="qiskit.circuit.library.MultiplierGate" isDedicatedPage={true} github="https://github.com/Qiskit/qiskit/tree/main/qiskit/circuit/library/arithmetic/multipliers/multiplier.py#L114-L201" signature="qiskit.circuit.library.MultiplierGate(num_state_qubits, num_result_qubits=None, label=None)" modifiers="class">
Bases: [`Gate`](qiskit.circuit.Gate "qiskit.circuit.gate.Gate")

Compute the product of two equally sized qubit registers into a new register.
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -8,7 +8,7 @@ python_api_name: qiskit.transpiler.passes.synthesis.hls_plugins.ACGSynthesisPerm

# ACGSynthesisPermutation

<Class id="qiskit.transpiler.passes.synthesis.hls_plugins.ACGSynthesisPermutation" isDedicatedPage={true} github="https://github.com/Qiskit/qiskit/tree/main/qiskit/transpiler/passes/synthesis/hls_plugins.py#L687-L697" signature="qiskit.transpiler.passes.synthesis.hls_plugins.ACGSynthesisPermutation" modifiers="class">
<Class id="qiskit.transpiler.passes.synthesis.hls_plugins.ACGSynthesisPermutation" isDedicatedPage={true} github="https://github.com/Qiskit/qiskit/tree/main/qiskit/transpiler/passes/synthesis/hls_plugins.py#L702-L712" signature="qiskit.transpiler.passes.synthesis.hls_plugins.ACGSynthesisPermutation" modifiers="class">
Bases: [`HighLevelSynthesisPlugin`](qiskit.transpiler.passes.synthesis.plugin.HighLevelSynthesisPlugin "qiskit.transpiler.passes.synthesis.plugin.HighLevelSynthesisPlugin")

The permutation synthesis plugin based on the Alon, Chung, Graham method.
Expand All @@ -19,7 +19,7 @@ python_api_name: qiskit.transpiler.passes.synthesis.hls_plugins.ACGSynthesisPerm

### run

<Function id="qiskit.transpiler.passes.synthesis.hls_plugins.ACGSynthesisPermutation.run" github="https://github.com/Qiskit/qiskit/tree/main/qiskit/transpiler/passes/synthesis/hls_plugins.py#L694-L697" signature="run(high_level_object, coupling_map=None, target=None, qubits=None, **options)">
<Function id="qiskit.transpiler.passes.synthesis.hls_plugins.ACGSynthesisPermutation.run" github="https://github.com/Qiskit/qiskit/tree/main/qiskit/transpiler/passes/synthesis/hls_plugins.py#L709-L712" signature="run(high_level_object, coupling_map=None, target=None, qubits=None, **options)">
Run synthesis for the given Permutation.
</Function>
</Class>
Expand Down
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