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Interim changes from testing
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AdityaAsGithub committed May 8, 2024
1 parent 2a08618 commit 5f5d272
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Showing 10 changed files with 85 additions and 35 deletions.
13 changes: 7 additions & 6 deletions common/daq/can_config.json
Original file line number Diff line number Diff line change
Expand Up @@ -205,7 +205,8 @@
{"msg_name": "LWS_Standard"},
{"msg_name": "main_module_bl_cmd" , "callback": true},
{"msg_name": "orion_currents_volts"},
{"msg_name": "throttle_vcu"}
{"msg_name": "throttle_vcu"},
{"msg_name": "throttle_vcu_equal"}
]
},
{
Expand Down Expand Up @@ -623,11 +624,11 @@
{ "msg_name":"raw_throttle_brake",
"msg_desc":"Throttle and brake values",
"signals":[
{"sig_name":"throttle","type":"uint16_t","length":12, "scale":0.02442, "unit":"%"},
{"sig_name":"throttle_right","type":"uint16_t","length":12, "scale":0.02442, "unit":"%"},
{"sig_name":"brake", "type":"uint16_t", "length":12, "scale":0.02442, "unit":"%"},
{"sig_name":"brake_right", "type":"uint16_t", "length":12, "scale":0.02442, "unit":"%"},
{"sig_name":"brake_pot", "type":"uint16_t", "length":12, "scale":0.02442, "unit":"%"}
{"sig_name":"throttle","type":"uint16_t","length":12, "unit":"%"},
{"sig_name":"throttle_right","type":"uint16_t","length":12, "unit":"%"},
{"sig_name":"brake", "type":"uint16_t", "length":12, "unit":"%"},
{"sig_name":"brake_right", "type":"uint16_t", "length":12,"unit":"%"},
{"sig_name":"brake_pot", "type":"uint16_t", "length":12, "unit":"%"}
],
"msg_period":15,
"msg_hlp":4,
Expand Down
10 changes: 5 additions & 5 deletions common/daq/per_dbc.dbc
Original file line number Diff line number Diff line change
Expand Up @@ -322,11 +322,11 @@ BO_ 2148059831 fault_sync_torque_vector: 3 torque_vector
SG_ idx : 0|16@1+ (1,0) [0|0] "" Vector__XXX

BO_ 2415919749 raw_throttle_brake: 8 Dashboard
SG_ brake_pot : 48|12@1+ (0.02442,0) [0|0] "%" Vector__XXX
SG_ brake_right : 36|12@1+ (0.02442,0) [0|0] "%" Vector__XXX
SG_ brake : 24|12@1+ (0.02442,0) [0|0] "%" Vector__XXX
SG_ throttle_right : 12|12@1+ (0.02442,0) [0|0] "%" Vector__XXX
SG_ throttle : 0|12@1+ (0.02442,0) [0|0] "%" Vector__XXX
SG_ brake_pot : 48|12@1+ (1,0) [0|0] "%" Vector__XXX
SG_ brake_right : 36|12@1+ (1,0) [0|0] "%" Vector__XXX
SG_ brake : 24|12@1+ (1,0) [0|0] "%" Vector__XXX
SG_ throttle_right : 12|12@1+ (1,0) [0|0] "%" Vector__XXX
SG_ throttle : 0|12@1+ (1,0) [0|0] "%" Vector__XXX

BO_ 2415984069 shock_front: 4 Dashboard
SG_ right_shock : 16|16@1- (1,0) [0|0] "mm" Vector__XXX
Expand Down
3 changes: 3 additions & 0 deletions common/phal_F4_F7/can/can.c
Original file line number Diff line number Diff line change
Expand Up @@ -61,6 +61,9 @@ bool PHAL_initCAN(CAN_TypeDef* bus, bool test_mode, uint32_t bit_rate)
case 24000000:
bus->BTR = PHAL_CAN_24MHz_500k;
break;
case 36000000:
bus->BTR = PHAL_CAN_36MHz_500k;
break;
case 42000000:
bus->BTR = PHAL_CAN_42MHz_500k;
break;
Expand Down
1 change: 1 addition & 0 deletions common/phal_F4_F7/can/can.h
Original file line number Diff line number Diff line change
Expand Up @@ -30,6 +30,7 @@
// Bit timing recovered from http://www.bittiming.can-wiki.info/
#define PHAL_CAN_16MHz_500k (0x033a0001) // sample point = 75%, SJW = 4
#define PHAL_CAN_24MHz_500k (0x033a0002) // sample point = 75%, SJW = 4
#define PHAL_CAN_36MHz_500k (0x03270005)
#define PHAL_CAN_42MHz_500k (0x034e0003) // sample point = 75%, SJW = 4

#define PHAL_CAN_16MHz_250k (0x003a0003) // sample point = 75%
Expand Down
10 changes: 5 additions & 5 deletions source/dashboard/pedals/pedals.c
Original file line number Diff line number Diff line change
Expand Up @@ -7,10 +7,10 @@
pedals_t pedals = {0};
uint16_t thtl_limit = 4096;

pedal_calibration_t pedal_calibration = {.t1max=2022,.t1min=690, // WARNING: DAQ VARIABLE
.t2max=1986,.t2min=610, // IF EEPROM ENABLED,
.b1max=1490,.b1min=420, // VALUE WILL CHANGE
.b2max=1240,.b2min=420, // 1400, 400
pedal_calibration_t pedal_calibration = {.t1max=1640,.t1min=585, // WARNING: DAQ VARIABLE
.t2max=2760,.t2min=1000, // IF EEPROM ENABLED,
.b1max=1490,.b1min=450, // VALUE WILL CHANGE
.b2max=1490,.b2min=450, // 1400, 400
.b3max=124,.b3min=0}; // 910, 812 3312 3436

uint16_t b3_buff[8] = {0};
Expand Down Expand Up @@ -49,7 +49,7 @@ void pedalsPeriodic(void)
}
// Convert to 0 - 10000 for display 0.00 to 100.00
race_page_data.brake_bias_adj = brake_bias * FLT_TO_PERCENTAGE * FLT_TO_DISPLAY_INT_2_DEC;

//uint16_t b3_raw = /*raw_adc_values.b3*/0; //no longer use b3

// b3_buff[b3_idx++] = b3_raw;
Expand Down
27 changes: 19 additions & 8 deletions source/main_module/can/can_parse.c
Original file line number Diff line number Diff line change
Expand Up @@ -85,6 +85,12 @@ void canRxUpdate(void)
can_data.throttle_vcu.stale = 0;
can_data.throttle_vcu.last_rx = sched.os_ticks;
break;
case ID_THROTTLE_VCU_EQUAL:
can_data.throttle_vcu_equal.equal_k_rl = (int16_t) msg_data_a->throttle_vcu_equal.equal_k_rl;
can_data.throttle_vcu_equal.equal_k_rr = (int16_t) msg_data_a->throttle_vcu_equal.equal_k_rr;
can_data.throttle_vcu_equal.stale = 0;
can_data.throttle_vcu_equal.last_rx = sched.os_ticks;
break;
case ID_FAULT_SYNC_PDU:
can_data.fault_sync_pdu.idx = msg_data_a->fault_sync_pdu.idx;
can_data.fault_sync_pdu.latched = msg_data_a->fault_sync_pdu.latched;
Expand Down Expand Up @@ -148,6 +154,9 @@ void canRxUpdate(void)
CHECK_STALE(can_data.throttle_vcu.stale,
sched.os_ticks, can_data.throttle_vcu.last_rx,
UP_THROTTLE_VCU);
CHECK_STALE(can_data.throttle_vcu_equal.stale,
sched.os_ticks, can_data.throttle_vcu_equal.last_rx,
UP_THROTTLE_VCU_EQUAL);
/* END AUTO STALE CHECKS */
}

Expand Down Expand Up @@ -178,17 +187,19 @@ bool initCANFilter()
CAN1->sFilterRegister[3].FR1 = (ID_ORION_CURRENTS_VOLTS << 3) | 4;
CAN1->sFilterRegister[3].FR2 = (ID_THROTTLE_VCU << 3) | 4;
CAN1->FA1R |= (1 << 4); // configure bank 4
CAN1->sFilterRegister[4].FR1 = (ID_FAULT_SYNC_PDU << 3) | 4;
CAN1->sFilterRegister[4].FR2 = (ID_FAULT_SYNC_DASHBOARD << 3) | 4;
CAN1->sFilterRegister[4].FR1 = (ID_THROTTLE_VCU_EQUAL << 3) | 4;
CAN1->sFilterRegister[4].FR2 = (ID_FAULT_SYNC_PDU << 3) | 4;
CAN1->FA1R |= (1 << 5); // configure bank 5
CAN1->sFilterRegister[5].FR1 = (ID_FAULT_SYNC_A_BOX << 3) | 4;
CAN1->sFilterRegister[5].FR2 = (ID_FAULT_SYNC_TORQUE_VECTOR << 3) | 4;
CAN1->sFilterRegister[5].FR1 = (ID_FAULT_SYNC_DASHBOARD << 3) | 4;
CAN1->sFilterRegister[5].FR2 = (ID_FAULT_SYNC_A_BOX << 3) | 4;
CAN1->FA1R |= (1 << 6); // configure bank 6
CAN1->sFilterRegister[6].FR1 = (ID_FAULT_SYNC_TEST_NODE << 3) | 4;
CAN1->sFilterRegister[6].FR2 = (ID_SET_FAULT << 3) | 4;
CAN1->sFilterRegister[6].FR1 = (ID_FAULT_SYNC_TORQUE_VECTOR << 3) | 4;
CAN1->sFilterRegister[6].FR2 = (ID_FAULT_SYNC_TEST_NODE << 3) | 4;
CAN1->FA1R |= (1 << 7); // configure bank 7
CAN1->sFilterRegister[7].FR1 = (ID_RETURN_FAULT_CONTROL << 3) | 4;
CAN1->sFilterRegister[7].FR2 = (ID_DAQ_COMMAND_MAIN_MODULE << 3) | 4;
CAN1->sFilterRegister[7].FR1 = (ID_SET_FAULT << 3) | 4;
CAN1->sFilterRegister[7].FR2 = (ID_RETURN_FAULT_CONTROL << 3) | 4;
CAN1->FA1R |= (1 << 8); // configure bank 8
CAN1->sFilterRegister[8].FR1 = (ID_DAQ_COMMAND_MAIN_MODULE << 3) | 4;
/* END AUTO FILTER */

CAN1->FMR &= ~CAN_FMR_FINIT; // Enable Filters (exit filter init mode)
Expand Down
13 changes: 13 additions & 0 deletions source/main_module/can/can_parse.h
Original file line number Diff line number Diff line change
Expand Up @@ -54,6 +54,7 @@ typedef union {
#define ID_MAIN_MODULE_BL_CMD 0x409c43e
#define ID_ORION_CURRENTS_VOLTS 0x140006f8
#define ID_THROTTLE_VCU 0x40025b7
#define ID_THROTTLE_VCU_EQUAL 0x4002837
#define ID_FAULT_SYNC_PDU 0x8cb1f
#define ID_FAULT_SYNC_DASHBOARD 0x8cac5
#define ID_FAULT_SYNC_A_BOX 0x8ca44
Expand Down Expand Up @@ -90,6 +91,7 @@ typedef union {
#define DLC_MAIN_MODULE_BL_CMD 5
#define DLC_ORION_CURRENTS_VOLTS 4
#define DLC_THROTTLE_VCU 4
#define DLC_THROTTLE_VCU_EQUAL 4
#define DLC_FAULT_SYNC_PDU 3
#define DLC_FAULT_SYNC_DASHBOARD 3
#define DLC_FAULT_SYNC_A_BOX 3
Expand Down Expand Up @@ -251,6 +253,7 @@ typedef union {
#define UP_LWS_STANDARD 15
#define UP_ORION_CURRENTS_VOLTS 32
#define UP_THROTTLE_VCU 20
#define UP_THROTTLE_VCU_EQUAL 20
/* END AUTO UP DEFS */

#define CHECK_STALE(stale, curr, last, period) if(!stale && \
Expand Down Expand Up @@ -449,6 +452,10 @@ typedef union {
uint64_t vcu_k_rl: 16;
uint64_t vcu_k_rr: 16;
} throttle_vcu;
struct {
uint64_t equal_k_rl: 16;
uint64_t equal_k_rr: 16;
} throttle_vcu_equal;
struct {
uint64_t idx: 16;
uint64_t latched: 1;
Expand Down Expand Up @@ -537,6 +544,12 @@ typedef struct {
uint8_t stale;
uint32_t last_rx;
} throttle_vcu;
struct {
int16_t equal_k_rl;
int16_t equal_k_rr;
uint8_t stale;
uint32_t last_rx;
} throttle_vcu_equal;
struct {
uint16_t idx;
uint8_t latched;
Expand Down
20 changes: 11 additions & 9 deletions source/main_module/car/car.c
Original file line number Diff line number Diff line change
Expand Up @@ -36,7 +36,7 @@ bool carInit()
/* Set initial states */
car = (Car_t) {0}; // Everything to zero
car.state = CAR_STATE_IDLE;
car.torque_src = CAR_TORQUE_TV;
car.torque_src = CAR_TORQUE_THROT_MAP;
car.regen_enabled = false;
car.sdc_close = true; // We want to initialize SDC as "good"
PHAL_writeGPIO(SDC_CTRL_GPIO_Port, SDC_CTRL_Pin, car.sdc_close);
Expand Down Expand Up @@ -260,14 +260,16 @@ void carPeriodic()
t_req_pedal_l = (float) CLAMP(can_data.throttle_vcu.vcu_k_rl, 0, 4095);
if (!can_data.throttle_vcu.stale)
t_req_pedal_r = (float) CLAMP(can_data.throttle_vcu.vcu_k_rr, 0, 4095);
// if (!can_data.throttle_vcu.stale)
// t_req_pedal_l = (float) CLAMP(can_data.throttle_vcu.equal_k_rl, 0, 4095);
// if (!can_data.throttle_vcu.stale)
// t_req_pedal_r = (float) CLAMP(can_data.throttle_vcu.equal_k_rr, 0, 4095);
if (!can_data.throttle_vcu_equal.stale)
t_req_equal_l = (float) CLAMP(can_data.throttle_vcu_equal.equal_k_rl, 0, 4095);
if (!can_data.throttle_vcu_equal.stale)
t_req_equal_r = (float) CLAMP(can_data.throttle_vcu_equal.equal_k_rr, 0, 4095);

t_req_pedal = t_req_pedal * 100.0f / 4095.0f;
t_req_pedal_l = t_req_pedal_l * 100.0f / 4095.0f;
t_req_pedal_r = t_req_pedal_r * 100.0f / 4095.0f;
t_req_equal_l = t_req_equal_l * 100.0f / 4095.0f;
t_req_equal_r = t_req_equal_r * 100.0f / 4095.0f;
// if (t_req_pedal > 10.0f)
// t_req_pedal = 10.0f;

Expand All @@ -292,7 +294,7 @@ void carPeriodic()
{
setFault(ID_REMAP_UNRELIABLE_FAULT, 0);
}
if (checkFault(ID_TV_DISABLED_FAULT))
if (checkFault(ID_TV_ENABLED_FAULT))
{
temp_t_req.torque_left = t_req_pedal_l;
temp_t_req.torque_right = t_req_pedal_r;
Expand All @@ -309,7 +311,7 @@ void carPeriodic()
temp_t_req.torque_right = t_req_equal_r;
}
}
else if (!checkFault(ID_REMAP_UNRELIABLE_FAULT))
else if (!checkFault(ID_REMAP_UNRELIABLE_FAULT) || (checkFault(ID_MM_ENABLED_FAULT)))
{
temp_t_req.torque_left = t_req_equal_l;
temp_t_req.torque_right = t_req_equal_r;
Expand All @@ -326,8 +328,8 @@ void carPeriodic()
}
break;
case CAR_TORQUE_THROT_MAP:
temp_t_req.torque_left = t_req_pedal_l;
temp_t_req.torque_right = t_req_pedal_r;
temp_t_req.torque_left = t_req_equal_l;
temp_t_req.torque_right = t_req_equal_r;
// EV.4.2.3 - Torque algorithm
// Any algorithm or electronic control unit that can adjust the
// requested wheel torque may only lower the total driver
Expand Down
20 changes: 18 additions & 2 deletions source/main_module/main.c
Original file line number Diff line number Diff line change
Expand Up @@ -182,16 +182,32 @@ dma_init_t adc_dma_config = ADC1_DMA_CONT_CONFIG((uint32_t) &adc_readings,



// extern uint32_t APB1ClockRateHz;
// extern uint32_t APB2ClockRateHz;
// extern uint32_t AHBClockRateHz;
// extern uint32_t PLLClockRateHz;

// #define TargetCoreClockrateHz 96000000
// ClockRateConfig_t clock_config = {
// .system_source =SYSTEM_CLOCK_SRC_PLL,
// .pll_src =PLL_SRC_HSI16,
// .vco_output_rate_target_hz =192000000,
// .system_clock_target_hz =TargetCoreClockrateHz,
// .ahb_clock_target_hz =(TargetCoreClockrateHz / 1),
// .apb1_clock_target_hz =(TargetCoreClockrateHz / 4),
// .apb2_clock_target_hz =(TargetCoreClockrateHz / 4),
// };

extern uint32_t APB1ClockRateHz;
extern uint32_t APB2ClockRateHz;
extern uint32_t AHBClockRateHz;
extern uint32_t PLLClockRateHz;

#define TargetCoreClockrateHz 96000000
#define TargetCoreClockrateHz 144000000
ClockRateConfig_t clock_config = {
.system_source =SYSTEM_CLOCK_SRC_PLL,
.pll_src =PLL_SRC_HSI16,
.vco_output_rate_target_hz =192000000,
.vco_output_rate_target_hz =288000000,
.system_clock_target_hz =TargetCoreClockrateHz,
.ahb_clock_target_hz =(TargetCoreClockrateHz / 1),
.apb1_clock_target_hz =(TargetCoreClockrateHz / 4),
Expand Down
3 changes: 3 additions & 0 deletions source/pdu/main.c
Original file line number Diff line number Diff line change
Expand Up @@ -332,6 +332,9 @@ void send_flowrates()
void heatBeatLED()
{
PHAL_toggleGPIO(HEARTBEAT_GPIO_Port, HEARTBEAT_Pin);
if ((sched.os_ticks - last_can_rx_time_ms) >= CONN_LED_MS_THRESH)
PHAL_writeGPIO(CONN_LED_GPIO_Port, CONN_LED_Pin, 0);
else PHAL_writeGPIO(CONN_LED_GPIO_Port, CONN_LED_Pin, 1);

static uint8_t trig;
if (trig) SEND_PDU_CAN_STATS(can_stats.tx_of, can_stats.tx_fail,
Expand Down

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