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Setting up Component Connections
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pbrazzle committed Feb 6, 2024
1 parent d335591 commit 388842e
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Showing 8 changed files with 79 additions and 5 deletions.
12 changes: 12 additions & 0 deletions src/MemoryTypes/Component/Bank.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -13,3 +13,15 @@ void NVM::ComponentType::Bank::cycle() {}
NVM::Stats::StatBlock NVM::ComponentType::Bank::getStats() {
return Stats::StatBlock();
}

void NVM::ComponentType::Bank::setResponseConnection(
Connection<BankResponse>* connection) {
responseConnection = connection;
}

void NVM::ComponentType::Bank::setCommandConnection(
Connection<MemoryCommand>* connection) {
commandConnection = connection;
}

bool NVM::ComponentType::Bank::busy() const { return false; }
6 changes: 6 additions & 0 deletions src/MemoryTypes/Component/Bank.h
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Expand Up @@ -26,6 +26,12 @@ class Bank : public Component {
*/
Stats::StatBlock getStats();

void setResponseConnection(Connection<BankResponse>* connection);

void setCommandConnection(Connection<MemoryCommand>* connection);

bool busy() const;

private:
Connection<BankResponse>* responseConnection;
Connection<MemoryCommand>* commandConnection;
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12 changes: 12 additions & 0 deletions src/MemoryTypes/Component/Bus.cpp
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Expand Up @@ -2,6 +2,8 @@

#include "Stats/StatBlock.h"

using namespace NVM::ComponentType;

NVM::ComponentType::Bus::Bus() {}

void NVM::ComponentType::Bus::process() {}
Expand All @@ -11,3 +13,13 @@ void NVM::ComponentType::Bus::cycle() {}
NVM::Stats::StatBlock NVM::ComponentType::Bus::getStats() {
return Stats::StatBlock();
}

bool NVM::ComponentType::Bus::busy() const { return false; }

Connection<BankResponse>* NVM::ComponentType::Bus::getResponseConnection() {
return &bankConnection;
}

Connection<MemoryCommand>* NVM::ComponentType::Bus::getCommandConnection() {
return &commandConnection;
}
5 changes: 5 additions & 0 deletions src/MemoryTypes/Component/Bus.h
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Expand Up @@ -26,6 +26,11 @@ class Bus : public Component {
*/
Stats::StatBlock getStats();

bool busy() const;

Connection<BankResponse>* getResponseConnection();
Connection<MemoryCommand>* getCommandConnection();

private:
Connection<BankResponse> bankConnection;
Connection<MemoryCommand> commandConnection;
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26 changes: 22 additions & 4 deletions src/MemoryTypes/Component/ComponentSystem.cpp
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Expand Up @@ -2,9 +2,23 @@

#include "Stats/StatBlock.h"

void NVM::ComponentType::ComponentSystem::process() {}
NVM::ComponentType::ComponentSystem::ComponentSystem() {
bank.setCommandConnection(bus.getCommandConnection());
bank.setResponseConnection(bus.getResponseConnection());
controller.setCommandConnection(bus.getCommandConnection());
}

void NVM::ComponentType::ComponentSystem::process() {
bank.process();
bus.process();
controller.process();
}

void NVM::ComponentType::ComponentSystem::cycle() {}
void NVM::ComponentType::ComponentSystem::cycle() {
bank.cycle();
bus.cycle();
controller.cycle();
}

NVM::Stats::StatBlock NVM::ComponentType::ComponentSystem::getStats() {
return Stats::StatBlock();
Expand Down Expand Up @@ -32,9 +46,13 @@ bool NVM::ComponentType::ComponentSystem::pim(std::vector<Address> operands,
return true;
}

bool NVM::ComponentType::ComponentSystem::isEmpty() const { return true; }
bool NVM::ComponentType::ComponentSystem::isEmpty() const {
return !(bank.busy() || bus.busy() || controller.busy());
}

void NVM::ComponentType::ComponentSystem::cycle(unsigned int cycles) {}
void NVM::ComponentType::ComponentSystem::cycle(unsigned int cycles) {
for (int i = 0; i < cycles; i++) cycle();
}

void NVM::ComponentType::ComponentSystem::printStats(std::ostream& statStream) {

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12 changes: 11 additions & 1 deletion src/MemoryTypes/Component/ComponentSystem.h
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@@ -1,12 +1,17 @@
#pragma once

#include "Memory/MemorySystem.h"
#include "MemoryTypes/Component/Bank.h"
#include "MemoryTypes/Component/Bus.h"
#include "MemoryTypes/Component/Component.h"
#include "MemoryTypes/Component/MemoryController.h"

namespace NVM::ComponentType {

class ComponentSystem : public NVM::Memory::MemorySystem, Component {
public:
ComponentSystem();

/*
* Processes incoming commands from upstream Components
*/
Expand Down Expand Up @@ -34,9 +39,14 @@ class ComponentSystem : public NVM::Memory::MemorySystem, Component {

bool isEmpty() const;

void cycle(unsigned int cycles = 1);
void cycle(unsigned int cycles);

void printStats(std::ostream& statStream);

private:
Bank bank;
MemoryController controller;
Bus bus;
};

} // namespace NVM::ComponentType
7 changes: 7 additions & 0 deletions src/MemoryTypes/Component/MemoryController.cpp
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Expand Up @@ -12,3 +12,10 @@ void NVM::ComponentType::MemoryController::cycle() {}
NVM::Stats::StatBlock NVM::ComponentType::MemoryController::getStats() {
return Stats::StatBlock();
}

void NVM::ComponentType::MemoryController::setCommandConnection(
Connection<MemoryCommand>* connection) {
commandConnection = connection;
}

bool NVM::ComponentType::MemoryController::busy() const { return false; }
4 changes: 4 additions & 0 deletions src/MemoryTypes/Component/MemoryController.h
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Expand Up @@ -25,6 +25,10 @@ class MemoryController : public Component {
*/
Stats::StatBlock getStats();

void setCommandConnection(Connection<MemoryCommand>* connection);

bool busy() const;

private:
Connection<MemoryCommand>* commandConnection;
};
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