vout: mipi: update dphy config

for history reason , the dphy bitrate always be 750M need fixup. Signed-off-by: keith.zhao <[email protected]> Rebase note: Resolved internal conflict with a previous commit, missing in the commit history, and: starfive-tech@651b960 Signed-off-by: MichaIng <[email protected]>
MichaIng · Apr 13, 2024 · 63c72e8 · 63c72e8
1 parent b4f605c
commit 63c72e8
Showing 1 changed file with 2 additions and 5 deletions.
diff --git a/drivers/phy/m31/phy-m31-dphy-tx0.c b/drivers/phy/m31/phy-m31-dphy-tx0.c
@@ -224,12 +224,9 @@ static int sys_m31_dphy_tx_configure(struct phy *phy, union phy_configure_opts *
 	const struct m31_dphy_config *p;
 	const uint32_t AON_POWER_READY_N_active = 0;
 	dphy = phy_get_drvdata(phy);	
-	//bitrate = 680000000;//1228M 60fps
-	//bitrate = 750000000;//1188M 60fps
-	//  bitrate = 490000000;//1188M 60fps
-	bitrate = opts->mipi_dphy.hs_clk_rate;//1188M 60fps
-	printk("sys_m31_dphy_tx_configure opts->mipi_dphy.hs_clk_rate = %ld\n",opts->mipi_dphy.hs_clk_rate);
 
+	bitrate = opts->mipi_dphy.hs_clk_rate;//1188M 60fps
+	dev_info(dphy->dev, "%s bitrate = %ld\n", __func__, bitrate);
 
 	sf_dphy_set_reg(dphy->topsys + 0x8, 0x10, 
 					RG_CDTX_L0N_HSTX_RES_SHIFT, RG_CDTX_L0N_HSTX_RES_MASK);