Reverse shifting order of the CIA shift register.

[Rhialto]

Also double-buffer it. See issue #537.

[lydon42]

Could you please retarget your pull request to the development branch? There will be no direct changes to master.

[Rhialto]

Done. You may have seen some intermediate state with lots of commits. It seems that that was before I told github that there was a different base branch.

[gurcei]

Ok, I'm interested in getting familiar with this PR. I tried getting my bearing with the c64 schematic, are we talking about the
output on these two SP pins?

So if I was curious to assess if the behaviour works, would I need to rig up a user-port for the MEGA65 and try use the kernal serial routines to try pump some serial data in and out?

As an aside, I tried switching to Rhialto:cia-shifter branch and building it, but ran into errors:

ERROR: [Synth 8-2778] type error near reg_sdr_filled ; expected type boolean [/home/ubuntu/mega65-core/src/vhdl/cia6526.vhdl:566]
ERROR: [Synth 8-944] 0 definitions of operator "=" match here [/home/ubuntu/mega65-core/src/vhdl/cia6526.vhdl:773]
INFO: [Synth 8-2810] unit behavioural ignored due to previous errors [/home/ubuntu/mega65-core/src/vhdl/cia6526.vhdl:61]

I don't have much time to debug further tonight, so just putting it on your radar :)

[Rhialto]

@gurcei Yes those should be the pins.
If the 65 was supposed to have the serial bus burst-mode capability (to communicate faster with a 1571 disk drive), you could theoretically also test it with that. If you have one on hand. And if the result of my changes is accurate enough (which I doubt; CIA internal timings are weird and I made no attempt to get them cycle-accurate).

As I mentioned in issue #537, I just came across this (what I think is a bug) while searching for CIA and VIA compatible implementations; I have been (trying to) improve their implementations in VICE and was searching for the kind of information that isn't in the data sheets. Now for this purpose, this CIA implementation offered no insights, but I could not restrain myself from trying to correct at least the shifting direction.

So I'm definitely no VHDL expert. I only tried a couple of VIA implementations in GHDL, and I never built this code. So if there is an error in it, it would not surprise me. Feel free to adjust as you see fit.

[gurcei]

@Rhialto Alas, no 1571 on my end. But back in my C64 days, I did have an old user-port project I made once with a max232 chip, where I was hooking up a serial connection between my PC and C64 to swap data across via the kernal serial routines, so in the back of my mind, I'm thinking if I could make use of that again as a means to test this out on hardware.

Yep, I tried having a read of #537 and the VICE posts you shared, though it's probably a bit overwhelming to grasp all of the details there as yet.

But I thought, hey, if I could just try it on the hardware in some modest way and confirm success or failure, that might give us some comfort prior to merging it in.

I'm no vhdl expert myself, but I gave it a shot tonight with a few tweaks to try quell those few errors, I'll try merge them in with your PR soon.

[gardners]

Sorry this has ben languishing so long. Can someone confirm that we did indeed have the bit order reversed vs real hardware?

[lydon42]

I was actually looking at this, a few month ago, but then I got distracted by release prep.
Where was I at? I was trying to get all those test into a unit tests for regression testing, so it can be verified what should be happening and what is happening...

[Rhialto]

In the mean time, the 8521 CIA has been dissected in great detail: http://forum.6502.org/viewtopic.php?f=4&t=7418