Update ASTC version

[jherico]

Description

• Update the astcenc library version to the most recent release.
  • Detect SIMD support and build the corresponding atscenc variant
  • Fixes a number of potential memory leaks caused by the non-thread-safe code in the previous version of astcenc
• Update the mipmap generation code to allocate the required memory for all mips at once instead of mip by mip (less fragmentation, and should be faster)

Performance

Ran the command_buffer_usage sample 5 times against this branch and against the current main branch, recording the Time spent loading images log line for each run. The target machine is a Ryzen Threadripper 1950X with 32 logical processor and for which the AVX2 ISA was detected and used.

branch	average load time	standard deviation
main	5.6638216	0.07
astc	3.3971104	0.06

This represents a 40% increase in ASTC image decompression performance.

Note that the only caveat for this is that the modules being used to detect the SIMD instruction set were only found under the license embedded in the added CMake files, which is a slight variant of the BSD-3 license. Hopefully this shouldn't be a problem.

General Checklist:

Please ensure the following points are checked:

• My code follows the coding style
• I have reviewed file licenses
• I have commented any added functions (in line with Doxygen)
• I have commented any code that could be hard to understand
• My changes do not add any new compiler warnings
  • Strictly speaking there may be new or different compiler warnings inside the ASTC build, but that seems out of scope.
• My changes do not add any new validation layer errors or warnings
• I have used existing framework/helper functions where possible
• My changes do not add any regressions
• I have tested every sample to ensure everything runs correctly
• This PR describes the scope and expected impact of the changes I am making

Note: The Samples CI runs a number of checks including:

• I have updated the header Copyright to reflect the current year (CI build will fail if Copyright is out of date)
• My changes build on Windows, Linux, macOS and Android. Otherwise I have documented any exceptions

[gary-sweet]

Is this PR also suffering from the CRLF issue? Whole files appear different.

[tomadamatkinson]

Good improvement. Thanks for performance testing!

[SaschaWillems]

Note that the only caveat for this is that the modules being used to detect the SIMD instruction set were only found under the license embedded in the added CMake files, which is a slight variant of the BSD-3 license. Hopefully this shouldn't be a problem.

We probably need to check this internally. @marty-johnson59: Maybe something to put on next calls agenda? Or forward to Legal at Khronos. It's a different license, so we need to make sure that we can use it and that we don't block any current user from using our samples by that new license.

[SaschaWillems]

LGTM aside from the legal stuff. I only have some minor remarks regarding some comments.

[SaschaWillems]

Code LGTM.

We still need to check on licenses before merging.

[tomadamatkinson]

@marty-johnson59 is a licence check needed on this?

[marty-johnson59]

ATSC is under Apache 2 license, so we're OK with that. Merging with 3..

[SaschaWillems]

Looks like this broke builds on recent Apple devices (e.g. M1), see #965

[kanavin]

@jherico @SaschaWillems there's another issue here: the newly added cmake modules check whether the compiler can produce the instructions, by trying various command line flags, and then forcibly enable them if so.

This doesn't work when the build is intended for a machine that doesn't actually support those instructions; the checks should either try only the default compiler settings (e.g. no additional options), or have a switch to forcibly override ASTC_ARCH from cmake command line.

This was exposed by trying to build for 32 bit x86 (yes, it's still a valid architecture in 2024) - the checks happily enable AVX2 because 32bit x86 compiler can do it if you ask, even though the overall build is configured for a mid 2000s x86 CPU model that can't possibly have that.

[jherico]

@kanavin is it critical that this be automatic, or would it be sufficient if you could force the ISA from the command line, like for instance cmake -Bbuild -DASTC_ARCH=NONE?

If the latter is sufficient, then I have a PR up that should allow you to build: #978

[kanavin]

@kanavin is it critical that this be automatic, or would it be sufficient if you could force the ISA from the command line, like for instance cmake -Bbuild -DASTC_ARCH=NONE?

If the latter is sufficient, then I have a PR up that should allow you to build: #978

Something like this should work, yes. I've tested a local patch that does something similar, and was going to open a pull request:

kanavin@41090ff

While you're at it, SSE41 should become sse4.1 (with a dot), when lowercased, as that's how astc defines the target.

[jherico]

Ugh, you're right... 🤦

I'm just going to exclude it for now. It's a relatively narrow window of processors that support SSE 4.1 and NOT AVX2.