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Building and modeling approximate accelerator blocks in a RISC-V architecture environment

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IoannouKon/Kostis-Thesis

 
 

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Here’s a template for your thesis repository README, based on Chipyard version 1.9.1.


Thesis Repository

This repository contains the code and documentation for my thesis project, which is based on Chipyard version 1.9.1.

Project Overview

The project aims to achieve the following key goals (listed below). Progress is tracked using the following status indicators:

  • DONE – Completed task
  • FAILED – Task could not be completed
  • 🚧 TODO – Task pending (on going)

Goals

Here are the key goals for the project, with their progress tracking:

  1. Encoder C: [First implementation of encoder in C]
  2. 🚧 Linear RoCC Accelerator: [Adding a Custom RoCC Acc for linear transform]

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Building and modeling approximate accelerator blocks in a RISC-V architecture environment

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License

BSD-3-Clause, Apache-2.0 licenses found

Licenses found

BSD-3-Clause
LICENSE
Apache-2.0
LICENSE.SiFive

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  • C 47.7%
  • Scala 32.5%
  • Makefile 6.7%
  • Python 4.3%
  • C++ 3.9%
  • Shell 2.3%
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