Fix blx lr instruction

* lr was overriden beforehand
Grarak · Nov 14, 2024 · f4be5f4 · f4be5f4
1 parent 3dc4574
commit f4be5f4
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Showing 2 changed files with 12 additions and 3 deletions.
diff --git a/src/jit/emitter/emit_branch.rs b/src/jit/emitter/emit_branch.rs
@@ -158,10 +158,15 @@ impl<const CPU: CpuType> JitAsm<'_, CPU> {
 
     pub fn emit_blx(&mut self, block_asm: &mut BlockAsm) {
         let inst_info = self.jit_buf.current_inst();
-        let target_pc_reg = *inst_info.operands()[0].as_reg_no_shift().unwrap();
+        let op0 = *inst_info.operands()[0].as_reg_no_shift().unwrap();
+
+        let target_pc_reg = block_asm.new_reg();
+        block_asm.mov(target_pc_reg, op0);
 
         block_asm.mov(Reg::LR, self.jit_buf.current_pc + 4);
-        self.emit_branch_reg_common(block_asm, target_pc_reg.into(), true);
+        self.emit_branch_reg_common(block_asm, target_pc_reg, true);
+
+        block_asm.free_reg(target_pc_reg);
     }
 
     pub fn emit_branch_reg_common(&mut self, block_asm: &mut BlockAsm, target_pc_reg: BlockReg, has_lr_return: bool) {

diff --git a/src/jit/emitter/thumb/emit_branch_thumb.rs b/src/jit/emitter/thumb/emit_branch_thumb.rs
@@ -80,8 +80,12 @@ impl<'a, const CPU: CpuType> JitAsm<'a, CPU> {
         let inst_info = self.jit_buf.current_inst();
 
         let op0 = *inst_info.operands()[0].as_reg_no_shift().unwrap();
+        let target_pc_reg = block_asm.new_reg();
+        block_asm.mov(target_pc_reg, op0);
 
         block_asm.mov(Reg::LR, self.jit_buf.current_pc + 3);
-        self.emit_branch_reg_common(block_asm, op0.into(), true);
+        self.emit_branch_reg_common(block_asm, target_pc_reg, true);
+
+        block_asm.free_reg(target_pc_reg);
     }
 }