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Merge branch 'main' of https://github.com/FaresAtef1/5-stage-pipeline…
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…-processor
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@FaresAtef1
FaresAtef1 committed Dec 4, 2023
2 parents bff28ce + 7c04663 commit a190d32
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110 changes: 56 additions & 54 deletions ControlUnit.vhd
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Original file line number Diff line number Diff line change
Expand Up @@ -25,68 +25,70 @@ ENTITY ControlUnit IS
Call : OUT STD_LOGIC;
Mem_2PC : OUT STD_LOGIC;
Swap : OUT STD_LOGIC;
RTI : OUT STD_LOGIC
RTI : OUT STD_LOGIC;
Push_INT_PC : OUT STD_LOGIC
);
END ENTITY ControlUnit;

ARCHITECTURE ArchControlUnit OF ControlUnit IS
SIGNAL CU_Signals : STD_LOGIC_VECTOR(16 DOWNTO 0);
SIGNAL CU_Signals : STD_LOGIC_VECTOR(17 DOWNTO 0);
BEGIN

Register_Write <= CU_Signals(16);
Branch <= CU_Signals(15);
Immediate <= CU_Signals(14);
Mem_Read <= CU_Signals(13);
Mem_Write <= CU_Signals(12);
Mem_2Reg <= CU_Signals(11);
Port_Write <= CU_Signals(10);
Port_Read <= CU_Signals(9);
Protect_Write <= CU_Signals(8);
Protect_Val <= CU_Signals(7);
Write_Flag <= CU_Signals(6);
Stack <= CU_Signals(5);
Push <= CU_Signals(4);
Call <= CU_Signals(3);
Mem_2PC <= CU_Signals(2);
Swap <= CU_Signals(1);
RTI <= CU_Signals(0);
Register_Write <= CU_Signals(17);
Branch <= CU_Signals(16);
Immediate <= CU_Signals(15);
Mem_Read <= CU_Signals(14);
Mem_Write <= CU_Signals(13);
Mem_2Reg <= CU_Signals(12);
Port_Write <= CU_Signals(11);
Port_Read <= CU_Signals(10);
Protect_Write <= CU_Signals(9);
Protect_Val <= CU_Signals(8);
Write_Flag <= CU_Signals(7);
Stack <= CU_Signals(6);
Push <= CU_Signals(5);
Call <= CU_Signals(4);
Mem_2PC <= CU_Signals(3);
Swap <= CU_Signals(2);
RTI <= CU_Signals(1);
Push_INT_PC <= CU_Signals(0);

CU_Signals <=

"10000000000000000" WHEN Swap_Loopback = '1' ELSE --SWAP LOOPBACK SIGNAL FROM EXECUTE STAGE
"00010000000000100" WHEN Reset_Exec = '1' ELSE --RESET COMING FROM EXECUTE STAGE
"00010000000000100" WHEN INT_Exec = '1' ELSE --INTERRUPT COMING FROM EXECUTE STAGE
"00001000000110000" WHEN INT_Mem = '1' ELSE
"00001000000110000" WHEN INT_WB = '1' ELSE --STILL NEEDS SOME WORK ASSOCIATED WITH (CALL) SIGNAL
"00000000000000000" WHEN Op_Code = "00000" ELSE --NOP
"10000000001000000" WHEN Op_Code = "10000" ELSE --NOT
"10000000001000000" WHEN Op_Code = "10001" ELSE --NEG
"10000000001000000" WHEN Op_Code = "10010" ELSE --INC
"10000000001000000" WHEN Op_Code = "10011" ELSE --DEC
"00000010000000000" WHEN Op_Code = "10100" ELSE --OUT
"10000001000000000" WHEN Op_Code = "00001" ELSE --IN
"10000000000000010" WHEN Op_Code = "00010" ELSE --Swap
"10000000001000000" WHEN Op_Code = "00011" ELSE --ADD
"10100000001000000" WHEN Op_Code = "00100" ELSE --ADDI
"10000000001000000" WHEN Op_Code = "00101" ELSE --SUB
"10000000001000000" WHEN Op_Code = "00110" ELSE --AND
"10000000001000000" WHEN Op_Code = "00111" ELSE --OR
"10000000001000000" WHEN Op_Code = "01000" ELSE --XOR
"00000000001000000" WHEN Op_Code = "10101" ELSE --CMP
"10100000001000000" WHEN Op_Code = "10110" ELSE --BITSET
"10100000001000000" WHEN Op_Code = "10111" ELSE --RCL
"10100000001000000" WHEN Op_Code = "11000" ELSE --RCR
"00001000000110000" WHEN Op_Code = "11001" ELSE --PUSH
"10010100000100000" WHEN Op_Code = "01001" ELSE --POP
"10100000001000000" WHEN Op_Code = "01010" ELSE --LDM
"10110100000000000" WHEN Op_Code = "01011" ELSE --LDD --EA HAS TO BE 20 BITS!
"00101000000000000" WHEN Op_Code = "11010" ELSE --STD
"00000000110000000" WHEN Op_Code = "11011" ELSE --PROTECT
"00000000100000000" WHEN Op_Code = "11100" ELSE --FREE
"01000000000000000" WHEN Op_Code = "11101" ELSE --JZ - NOT FULLY IMPLEMENTED
"01000000000000000" WHEN Op_Code = "11110" ELSE --JMP
"00001000000100000" WHEN Op_Code = "11111" ELSE --CALL --NOT FINISHED (2 Cycles to push)
"10000000000000010" WHEN Op_Code = "01100" ELSE --RET --NOT FINISHED (2 Cycles to pop)
"10000000000000010" WHEN Op_Code = "01101"; --RTI --NOT FINISHED (2 Cycles to pop)
"100000000000000000" WHEN Swap_Loopback = '1' ELSE --SWAP LOOPBACK SIGNAL FROM EXECUTE STAGE
"000100000000001000" WHEN Reset_Exec = '1' ELSE --RESET COMING FROM EXECUTE STAGE
"000100000000001000" WHEN INT_Exec = '1' ELSE --INTERRUPT COMING FROM EXECUTE STAGE
"000010000001100001" WHEN INT_Mem = '1' ELSE
"000010000001100000" WHEN INT_WB = '1' ELSE --STILL NEEDS SOME WORK ASSOCIATED WITH (CALL) SIGNAL
"000000000000000000" WHEN Op_Code = "00000" ELSE --NOP
"100000000010000000" WHEN Op_Code = "10000" ELSE --NOT
"100000000010000000" WHEN Op_Code = "10001" ELSE --NEG
"100000000010000000" WHEN Op_Code = "10010" ELSE --INC
"100000000010000000" WHEN Op_Code = "10011" ELSE --DEC
"000000100000000000" WHEN Op_Code = "10100" ELSE --OUT
"100000010000000000" WHEN Op_Code = "00001" ELSE --IN
"100000000000000100" WHEN Op_Code = "00010" ELSE --Swap
"100000000010000000" WHEN Op_Code = "00011" ELSE --ADD
"101000000010000000" WHEN Op_Code = "00100" ELSE --ADDI
"100000000010000000" WHEN Op_Code = "00101" ELSE --SUB
"100000000010000000" WHEN Op_Code = "00110" ELSE --AND
"100000000010000000" WHEN Op_Code = "00111" ELSE --OR
"100000000010000000" WHEN Op_Code = "01000" ELSE --XOR
"000000000010000000" WHEN Op_Code = "10101" ELSE --CMP
"101000000010000000" WHEN Op_Code = "10110" ELSE --BITSET
"101000000010000000" WHEN Op_Code = "10111" ELSE --RCL
"101000000010000000" WHEN Op_Code = "11000" ELSE --RCR
"000010000001100000" WHEN Op_Code = "11001" ELSE --PUSH
"100101000001000000" WHEN Op_Code = "01001" ELSE --POP
"101000000010000000" WHEN Op_Code = "01010" ELSE --LDM
"101101000000000000" WHEN Op_Code = "01011" ELSE --LDD --EA HAS TO BE 20 BITS!
"001010000000000000" WHEN Op_Code = "11010" ELSE --STD
"000000001100000000" WHEN Op_Code = "11011" ELSE --PROTECT
"000000001000000000" WHEN Op_Code = "11100" ELSE --FREE
"010000000000000000" WHEN Op_Code = "11101" ELSE --JZ - NOT FULLY IMPLEMENTED
"010000000000000000" WHEN Op_Code = "11110" ELSE --JMP
"000010000001000000" WHEN Op_Code = "11111" ELSE --CALL --NOT FINISHED (2 Cycles to push)
"100000000000000100" WHEN Op_Code = "01100" ELSE --RET --NOT FINISHED (2 Cycles to pop)
"100000000000000100" WHEN Op_Code = "01101"; --RTI --NOT FINISHED (2 Cycles to pop)

END ArchControlUnit;
3 changes: 2 additions & 1 deletion DecodeStage.vhd
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Original file line number Diff line number Diff line change
Expand Up @@ -64,7 +64,8 @@ ARCHITECTURE ArchDecodeStage OF DecodeStage IS
Call : OUT STD_LOGIC;
Mem_2PC : OUT STD_LOGIC;
Swap : OUT STD_LOGIC;
RTI : OUT STD_LOGIC
RTI : OUT STD_LOGIC;
Push_INT_PC : OUT STD_LOGIC
);
END COMPONENT ControlUnit;
COMPONENT RegFile IS
Expand Down
113 changes: 113 additions & 0 deletions EXMEMRegister.vhd
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Original file line number Diff line number Diff line change
@@ -0,0 +1,113 @@
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
ENTITY EXMEMRegister IS
PORT (
Clk : IN STD_LOGIC;
RST_Reg : IN STD_LOGIC;
RTI : IN STD_LOGIC;
Register_Write : IN STD_LOGIC;
Mem_2PC : IN STD_LOGIC;
Mem_2Reg : IN STD_LOGIC;
Push : IN STD_LOGIC;
Stack : IN STD_LOGIC;
Push_INT_PC : IN STD_LOGIC;
Call : IN STD_LOGIC;
Mem_Write : IN STD_LOGIC;
Mem_Read : IN STD_LOGIC;
Branch : IN STD_LOGIC;
Port_Write : IN STD_LOGIC;
Port_Read : IN STD_LOGIC;
RST : IN STD_LOGIC;
INT : IN STD_LOGIC;
Stack_Pointer : IN STD_LOGIC_VECTOR(31 DOWNTO 0);
INC_PC : IN STD_LOGIC_VECTOR(31 DOWNTO 0);
ALU_Result : IN STD_LOGIC_VECTOR(31 DOWNTO 0);
Memory_Data : IN STD_LOGIC_VECTOR(31 DOWNTO 0);
Flags : IN STD_LOGIC_VECTOR(2 DOWNTO 0);
Rdst, Rsrc1, Rsrc2 : IN STD_LOGIC_VECTOR(2 DOWNTO 0);
Protect_State : IN STD_LOGIC;
-- output ports
RTI_Out : OUT STD_LOGIC;
Register_Write_Out : OUT STD_LOGIC;
Mem_2PC_Out : OUT STD_LOGIC;
Mem_2Reg_Out : OUT STD_LOGIC;
Push_Out : OUT STD_LOGIC;
Stack_Out : OUT STD_LOGIC;
Push_INT_PC_Out : OUT STD_LOGIC;
Call_Out : OUT STD_LOGIC;
Mem_Write_Out : OUT STD_LOGIC;
Mem_Read_Out : OUT STD_LOGIC;
Branch_Out : OUT STD_LOGIC;
Port_Write_Out : OUT STD_LOGIC;
Port_Read_Out : OUT STD_LOGIC;
RST_Out : OUT STD_LOGIC;
INT_Out : OUT STD_LOGIC;
Stack_Pointer_Out : OUT STD_LOGIC_VECTOR(31 DOWNTO 0);
INC_PC_Out : OUT STD_LOGIC_VECTOR(31 DOWNTO 0);
ALU_Result_Out : OUT STD_LOGIC_VECTOR(31 DOWNTO 0);
Memory_Data_Out : OUT STD_LOGIC_VECTOR(31 DOWNTO 0);
Flags_Out : OUT STD_LOGIC_VECTOR(2 DOWNTO 0);
Rdst_Out, Rsrc1_Out, Rsrc2_Out : OUT STD_LOGIC_VECTOR(2 DOWNTO 0);
Protect_State_Out : OUT STD_LOGIC
);
END ENTITY EXMEMRegister;

ARCHITECTURE ArchEXMEMRegister OF EXMEMRegister IS
BEGIN
PROCESS (Clk, RST_Reg)
BEGIN

IF RST_Reg = '1' THEN
RTI_Out <= '0';
Register_Write_Out <= '0';
Mem_2PC_Out <= '0';
Mem_2Reg_Out <= '0';
Push_Out <= '0';
Stack_Out <= '0';
Push_INT_PC_Out<='0';
Call_Out <= '0';
Mem_Write_Out <= '0';
Mem_Read_Out <= '0';
Branch_Out <= '0';
Port_Write_Out <= '0';
Port_Read_Out <= '0';
RST_Out <= '0';
INT_Out <= '0';
Stack_Pointer_Out<= (OTHERS=>'0');
INC_PC_Out <= (OTHERS => '0');
ALU_Result_Out <= (OTHERS=>'0');
Memory_Data_Out <= (OTHERS=>'0');
Flags_Out <= (OTHERS=>'0');
Rdst_Out <= (OTHERS => '0');
Rsrc1_Out <= (OTHERS => '0');
Rsrc2_Out <= (OTHERS => '0');
Protect_State_Out<='0';
ELSIF RISING_EDGE(Clk) THEN
RTI_Out <= RTI;
Register_Write_Out <= Register_Write;
Mem_2PC_Out <= Mem_2PC;
Mem_2Reg_Out <= Mem_2Reg;
Push_Out <= Push;
Stack_Out <= Stack;
Push_INT_PC_Out<=Push_INT_PC;
Call_Out <= Call;
Mem_Write_Out <= Mem_Write;
Mem_Read_Out <= Mem_Read;
Branch_Out <= Branch;
Port_Write_Out <= Port_Write;
Port_Read_Out <= Port_Read;
RST_Out <= RST;
INT_Out <= INT;
Stack_Pointer_Out<= Stack_Pointer;
INC_PC_Out <= INC_PC;
ALU_Result_Out <= ALU_Result;
Memory_Data_Out <= Memory_Data;
Flags_Out <= Flags;
Rdst_Out <= Rdst;
Rsrc1_Out <= Rsrc1;
Rsrc2_Out <= Rsrc2;
Protect_State_Out<=Protect_State;
END IF;
END PROCESS;

END ArchEXMEMRegister;
86 changes: 86 additions & 0 deletions EXMEMRegisterToDo.do
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Original file line number Diff line number Diff line change
@@ -0,0 +1,86 @@
add wave -position insertpoint \
sim:/exmemregister/Clk \
sim:/exmemregister/RST_Reg \
sim:/exmemregister/RTI \
sim:/exmemregister/Register_Write \
sim:/exmemregister/Mem_2PC \
sim:/exmemregister/Mem_2Reg \
sim:/exmemregister/Push \
sim:/exmemregister/Stack \
sim:/exmemregister/Push_INT_PC \
sim:/exmemregister/Call \
sim:/exmemregister/Mem_Write \
sim:/exmemregister/Mem_Read \
sim:/exmemregister/Branch \
sim:/exmemregister/Port_Write \
sim:/exmemregister/Port_Read \
sim:/exmemregister/RST \
sim:/exmemregister/INT \
sim:/exmemregister/Stack_Pointer \
sim:/exmemregister/INC_PC \
sim:/exmemregister/ALU_Result \
sim:/exmemregister/Memory_Data \
sim:/exmemregister/Flags \
sim:/exmemregister/Rdst \
sim:/exmemregister/Rsrc1 \
sim:/exmemregister/Rsrc2 \
sim:/exmemregister/Protect_State \
sim:/exmemregister/RTI_Out \
sim:/exmemregister/Register_Write_Out \
sim:/exmemregister/Mem_2PC_Out \
sim:/exmemregister/Mem_2Reg_Out \
sim:/exmemregister/Push_Out \
sim:/exmemregister/Stack_Out \
sim:/exmemregister/Push_INT_PC_Out \
sim:/exmemregister/Call_Out \
sim:/exmemregister/Mem_Write_Out \
sim:/exmemregister/Mem_Read_Out \
sim:/exmemregister/Branch_Out \
sim:/exmemregister/Port_Write_Out \
sim:/exmemregister/Port_Read_Out \
sim:/exmemregister/RST_Out \
sim:/exmemregister/INT_Out \
sim:/exmemregister/Stack_Pointer_Out \
sim:/exmemregister/INC_PC_Out \
sim:/exmemregister/ALU_Result_Out \
sim:/exmemregister/Memory_Data_Out \
sim:/exmemregister/Flags_Out \
sim:/exmemregister/Rdst_Out \
sim:/exmemregister/Rsrc1_Out \
sim:/exmemregister/Rsrc2_Out \
sim:/exmemregister/Protect_State_Out
force -freeze sim:/exmemregister/Clk 1 0, 0 {100 ps} -r 200
force -freeze sim:/exmemregister/RST_Reg 1 0
run
force -freeze sim:/exmemregister/RST_Reg 0 0
force -freeze sim:/exmemregister/RTI 1 0
force -freeze sim:/exmemregister/Register_Write 1 0
force -freeze sim:/exmemregister/Mem_2PC 1 0
force -freeze sim:/exmemregister/Mem_2Reg 1 0
force -freeze sim:/exmemregister/Push 1 0
force -freeze sim:/exmemregister/Stack 1 0
force -freeze sim:/exmemregister/Push_INT_PC 1 0
force -freeze sim:/exmemregister/Call 1 0
force -freeze sim:/exmemregister/Mem_Write 1 0
force -freeze sim:/exmemregister/Mem_Read 1 0
force -freeze sim:/exmemregister/Branch 1 0
force -freeze sim:/exmemregister/Port_Write 1 0
force -freeze sim:/exmemregister/Port_Read 1 0
force -freeze sim:/exmemregister/RST 1 0
force -freeze sim:/exmemregister/INT 1 0
force -freeze sim:/exmemregister/Stack_Pointer 10#25 0
force -freeze sim:/exmemregister/INC_PC 10#35 0
force -freeze sim:/exmemregister/ALU_Result 10#45 0
force -freeze sim:/exmemregister/Memory_Data 10#55 0
force -freeze sim:/exmemregister/Flags 110 0
force -freeze sim:/exmemregister/Rdst 10#1 0
force -freeze sim:/exmemregister/Rsrc1 10#2 0
force -freeze sim:/exmemregister/Rsrc2 10#3 0
force -freeze sim:/exmemregister/Protect_State 1 0
run
run
run
force -freeze sim:/exmemregister/Stack_Pointer 10#65 0
run
run
run

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