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Move conditions for prefetching into the prefetch() function
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conNULL committed Sep 27, 2024
1 parent 8c71e1a commit 7109abb
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Showing 4 changed files with 20 additions and 16 deletions.
4 changes: 2 additions & 2 deletions clients/drcachesim/simulator/caching_device.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -240,8 +240,8 @@ caching_device_t::request(const memref_t &memref_in)

// Issue a hardware prefetch, if any, before we remember the last tag,
// so we remember this line and not the prefetched line.
if (missed && !type_is_prefetch(memref.data.type) && prefetcher_ != nullptr)
prefetcher_->prefetch(this, memref);
if (prefetcher_ != nullptr)
prefetcher_->prefetch(this, memref, missed);

if (tag + 1 <= final_tag) {
addr_t next_addr = (tag + 1) << block_size_bits_;
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12 changes: 7 additions & 5 deletions clients/drcachesim/simulator/prefetcher.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -48,13 +48,15 @@ prefetcher_t::prefetcher_t(int block_size)
}

void
prefetcher_t::prefetch(caching_device_t *cache, const memref_t &memref_in)
prefetcher_t::prefetch(caching_device_t *cache, const memref_t &memref_in, const bool missed)
{
// We implement a simple next-line prefetcher.
memref_t memref = memref_in;
memref.data.addr += block_size_;
memref.data.type = TRACE_TYPE_HARDWARE_PREFETCH;
cache->request(memref);
if (missed && !type_is_prefetch(memref_in.data.type)) {
memref_t memref = memref_in;
memref.data.addr += block_size_;
memref.data.type = TRACE_TYPE_HARDWARE_PREFETCH;
cache->request(memref);
}
}
} // namespace drmemtrace
} // namespace dynamorio
2 changes: 1 addition & 1 deletion clients/drcachesim/simulator/prefetcher.h
Original file line number Diff line number Diff line change
Expand Up @@ -51,7 +51,7 @@ class prefetcher_t {
{
}
virtual void
prefetch(caching_device_t *cache, const memref_t &memref);
prefetch(caching_device_t *cache, const memref_t &memref, bool missed);

protected:
int block_size_;
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18 changes: 10 additions & 8 deletions clients/drcachesim/tests/drcachesim_unit_tests.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -327,15 +327,17 @@ class next2line_prefetcher_factory_t : public prefetcher_factory_t {
{
}
void
prefetch(caching_device_t *cache, const memref_t &memref_in)
prefetch(caching_device_t *cache, const memref_t &memref_in, const bool missed)
{
// We implement a simple 2 next-line prefetcher.
memref_t memref = memref_in;
memref.data.addr += block_size_;
memref.data.type = TRACE_TYPE_HARDWARE_PREFETCH;
cache->request(memref);
memref.data.addr += block_size_;
cache->request(memref);
// We implement a simple 2 next-line prefetcher.i
if (missed && !type_is_prefetch(memref_in.data.type)) {
memref_t memref = memref_in;
memref.data.addr += block_size_;
memref.data.type = TRACE_TYPE_HARDWARE_PREFETCH;
cache->request(memref);
memref.data.addr += block_size_;
cache->request(memref);
}
}
};
};
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