=Upgrade to Version 1.8

Assembler/Cargo.toml

@@ -9,7 +9,7 @@ license = "MIT AND Apache-2.0"
 # See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html
 
 [dependencies]
-annotate-snippets = { git = "https://github.com/rust-lang/annotate-snippets-rs.git", features = ["ansi_term"] }
+annotate-snippets = { git = "https://github.com/rust-lang/annotate-snippets-rs.git", features = ["ansi_term"], commit = "80ea580da000c3a356bb6960cd7b41e2f073ea74" }
 pretty_assertions = "0.6.1"
 v_htmlescape = "0.4.5"
 # waitign for https://github.com/Manishearth/elsa/pull/8 to get merged

Assembler/src/asm/parser.rs

@@ -6,6 +6,7 @@ use crate::{errors, Compiler};
 use std::collections::HashMap;
 use std::convert::{TryFrom, TryInto};
 use std::num::NonZeroU16;
+use std::iter;
 
 impl<'a> Statement<'a> {
     pub fn parse(cx: &'a Compiler, lex: &Lexical<'a>) -> Self {
@@ -43,7 +44,7 @@ impl<'a> Statement<'a> {
                 Instruction::Nop
             }
             "" => Instruction::Nop,
-            "ldsi" | "ldi" | "ldint" | "movs" | "movc" | "movint" | "movsint" | "ldsint" => {
+            "ldsi" | "ldi" | "ldint" | "movs" | "movc" | "movint" | "movsint" | "ldsint" | "ldsbit" => {
                 Instruction::Assign {
                     destination: args.index_or_err(cx, 0).require(cx),
                     value: args.index_or_err(cx, 1),
@@ -257,7 +258,7 @@ impl<'a> Statement<'a> {
                 arg: args.index_or_err(cx, 0).require(cx),
             },
             "print_reg" | "print_char_regint" | "print_char4_regint" | "print_int"
-            | "print_fix_plain" => Instruction::PrintR {
+            | "print_fix_plain" | "print_ieee_float" => Instruction::PrintR {
                 instruction,
                 arg: args.index_or_err(cx, 0).require(cx),
             },
@@ -364,6 +365,7 @@ impl<'a> Statement<'a> {
 
             "gc" => Instruction::GarbledCircuit(args.index_or_err(cx, 0).require(cx)),
             "lf" => Instruction::LocalFunction(args.index_or_err(cx, 0).require(cx)),
+            "nop" => Instruction::Nop,
             _ => {
                 cx.report(errors::UnknownInstruction {
                     span: args.span,
@@ -531,6 +533,7 @@ impl<'a> Body<'a> {
         // A map converting block ids into the original source order to make sure
         // we can roundtrip asm files. Otherwise we'd be changing block orders by
         // fairly arbitrary rules.
+        trace!(num_blocks = block_starts.len());
         let block_map: HashMap<usize, usize> = block_starts
             .iter()
             .enumerate()
@@ -553,7 +556,7 @@ impl<'a> Body<'a> {
 
         let mut blocks = Vec::new();
         let mut stmts = Vec::new();
-        for (i, lexical) in lexicals.iter().enumerate() {
+        for (i, lexical) in lexicals.iter().chain(iter::once(&Lexical::nop())).enumerate() {
             trace!("{}: {}", i, lexical);
             // finalize the current block when we encounter a new one
             if let Some((next_block_id, _)) = block_starts.remove(&i) {

Assembler/src/asm/relexer.rs

@@ -15,14 +15,14 @@ impl<'a> Body<'a> {
         let mut lexicals = Vec::new();
         let mut block_starts: Vec<i32> = Vec::new();
         let mut forward_jumps = BTreeMap::new();
+        debug!(num_blocks = self.blocks.len());
         for (i, block) in self.blocks.iter().enumerate() {
-            //println!("#{:?} {:?}", lexicals.len(), block.terminator.elem);
+            trace!(num_blocks = block_starts.len(), num_lexicals = lexicals.len(), ?block.terminator.elem);
             block_starts.push(lexicals.len().try_into().unwrap());
             for statement in &block.stmts {
                 lexicals.push(statement.relex(cx));
             }
             match &block.terminator.elem {
-                // FIXME: generate a jump to the end in case this is not the final block
                 Terminator::Done => assert_eq!(i, self.blocks.len() - 1),
                 Terminator::Restart { comment } => lexicals.push(Lexical {
                     instruction: "restart",
@@ -143,6 +143,7 @@ impl<'a> Statement<'a> {
                     (Register::Regint(_), Operand::Register(_)) => "movint",
                     (Register::Secret(_), Operand::Register(_)) => "movs",
                     (Register::SecretRegint(_), Operand::Register(_)) => "movsint",
+                    (Register::SecretBit(_), Operand::Value(_)) => "ldsbit",
                     (Register::SecretBit(_), _) => unimplemented!(),
                 },
                 vec![destination.clone().map(Into::into), *value],

Assembler/src/bin/scale_repo_helper.rs

@@ -3,7 +3,7 @@
 #![deny(rust_2018_idioms)]
 
 use std::path::PathBuf;
-use std::process::Stdio;
+use std::io::Write;
 use structopt::StructOpt;
 
 #[derive(StructOpt)]
@@ -53,12 +53,13 @@ fn main(args: Args) -> std::io::Result<()> {
                 cmd.arg(&file);
                 cmd.arg(file.with_extension("bc"));
                 cmd.args(&args.rest);
-                if !args.verbose {
-                    cmd.stdout(Stdio::null());
-                    cmd.stderr(Stdio::null());
-                }
-                if !cmd.status()?.success() {
+                let output = cmd.output()?;
+                if !output.status.success() {
                     println!("Failed to compile {}", file.display());
+                    std::io::stdout().write_all(&output.stdout)?;
+                    std::io::stdout().flush()?;
+                    std::io::stderr().write_all(&output.stderr)?;
+                    std::io::stderr().flush()?;
                     std::process::exit(1);
                 }
                 if args.show_optimization {
@@ -71,14 +72,16 @@ fn main(args: Args) -> std::io::Result<()> {
                         .command();
                     cmd.arg(file.with_extension("bc"));
                     cmd.arg(file.with_extension("asm-opt"));
+                    cmd.arg("--output-format=assembly");
                     // Just convert between bc and asm file
                     cmd.arg("--optimization-level=0");
-                    if !args.verbose {
-                        cmd.stdout(Stdio::null());
-                        cmd.stderr(Stdio::null());
-                    }
-                    if !cmd.status()?.success() {
+                    let output = cmd.output()?;
+                    if !output.status.success() {
                         println!("Failed to compile {}", file.display());
+                        std::io::stdout().write_all(&output.stdout)?;
+                        std::io::stdout().flush()?;
+                        std::io::stderr().write_all(&output.stderr)?;
+                        std::io::stderr().flush()?;
                         std::process::exit(1);
                     }
                 }

Assembler/src/binary/instructions.rs

@@ -73,7 +73,7 @@ impl std::fmt::Display for ArgTy {
             ArgTy::Register(RegisterKind::SecretBit, RegisterMode::Write) => write!(fmt, "sbw"),
             ArgTy::Register(RegisterKind::Secret, RegisterMode::Read) => write!(fmt, "s"),
             ArgTy::Register(RegisterKind::Regint, RegisterMode::Read) => write!(fmt, "r"),
-            ArgTy::Register(RegisterKind::SecretRegint, RegisterMode::Read) => write!(fmt, "s"),
+            ArgTy::Register(RegisterKind::SecretRegint, RegisterMode::Read) => write!(fmt, "sr"),
             ArgTy::Register(RegisterKind::Clear, RegisterMode::Read) => write!(fmt, "c"),
             ArgTy::Register(RegisterKind::SecretBit, RegisterMode::Read) => write!(fmt, "sb"),
         }
@@ -219,13 +219,13 @@ instructions! {
  INPUT_CLEAR & 0x41 & (dest: cw, channel: i) & vectorizable barrier thread_0_only & r##"INPUT\_CLEAR ci n \newline
 					    Gets clear public input ci from the IO class on channel n.
                                             Public inputs need to be the same for all players running the protocol, otherwise a crash will occur. "## & ""
-  OUTPUT_SHARES & 0x42 &  (n + 1: int, channel: ch, shares: [s; n]) & barrier thread_0_only & r##"OUTPUT\_SHARES n+1 ch si1 ... sin \newline
+  OUTPUT_SHARES & 0x42 &  (n + 1: int, channel: ch, shares: [s; n]) & vectorizable barrier thread_0_only & r##"OUTPUT\_SHARES n+1 ch si1 ... sin \newline
            Write shares sij for j=1..n to the IO class channel ch.  "## & ""
-  INPUT_SHARES & 0x43 & (n + 1: int, channel: i, shares: [sw; n]) & barrier thread_0_only & r##"INPUT\_SHARES n+1 ch si1 ... sin \newline
+  INPUT_SHARES & 0x43 & (n + 1: int, channel: i, shares: [sw; n]) & vectorizable barrier thread_0_only & r##"INPUT\_SHARES n+1 ch si1 ... sin \newline
           Read shares sij for j=1..n from the IO class channel ch.  "## & ""
-  PRIVATE_INPUT & 0x44 & (dest: sw, player: p, channel: int) & barrier thread_0_only & r##"PRIVATE\_INPUT si p m \newline
+  PRIVATE_INPUT & 0x44 & (dest: sw, player: p, channel: int) & vectorizable barrier thread_0_only & r##"PRIVATE\_INPUT si p m \newline
                                   Private input from player p on channel m assign result to secret si. "## & r##"c1"##
-  PRIVATE_OUTPUT & 0x46  & (value: s, player: p, channel: int) & barrier thread_0_only & r##"PRIVATE\_OUTPUT si p m \newline
+  PRIVATE_OUTPUT & 0x46  & (value: s, player: p, channel: int) & vectorizable barrier thread_0_only & r##"PRIVATE\_OUTPUT si p m \newline
                                   Private output to player p on channel m of secret si. "## & r##"c1"##
   OUTPUT_INT & 0x48 & (value: r, channel: i) & vectorizable barrier thread_0_only & r##" OUTPUT\_INT ri n \newline
                                             Public output of regint register ri to IO class on channel n. "## & ""
@@ -280,6 +280,8 @@ instructions! {
                                    Assigns secure register si the value in the secure register sj."## & ""
   LDSINT & 0x65 & (dest: srw, value: i) & vectorizable & r##"LDSINT si n \newline
                                     Assigns sregint register si a share of the value n."## & ""
+  LDSBIT & 0x7D & (dest: sbw, value: i) & vectorizable & r##"LDSBIT si n \newline
+                                    Assigns sbit register si a share of the value n."## & ""
   ADDSINT & 0x66 & (dest: srw, left: sr, right: sr) & vectorizable & r##"ADDSINT si sj sk \newline
                                             Adds secret regint registers si=sj+sk."## & ""
   ADDSINTC & 0x67 & (dest: srw, left: sr, right: r) & vectorizable & r##"ADDSINTC si sj rk \newline
@@ -423,6 +425,9 @@ instructions! {
   PRINT_INT & 0xB9 & (value: r) & vectorizable barrier thread_0_only & r##"PRINT\_INT ri \newline
                                Prints the value of register ri to debug IO channel.
                                "## & ""
+  PRINT_IEEE_FLOAT & 0xBA & (value: r) & vectorizable barrier thread_0_only & r##"PRINT\_IEEE\_FLOAT ri \newline
+                               Prints the value of register ri to debug IO channel as a double
+                               "## & ""
   },
   "Comparison of sregints" {
   EQZSINT  & 0xD0 & (dest: sbw, value: sr) & vectorizable & r##"EQZSINT sbi, sj \newline

Assembler/src/compiler.rs

@@ -2,7 +2,6 @@ use crate::errors::SkippedErrors;
 use crate::lexer::Lexical;
 use annotate_snippets::{
     display_list::DisplayList,
-    formatter::DisplayListFormatter,
     snippet::{AnnotationType, Slice, Snippet, SourceAnnotation},
 };
 use std::path::{Path, PathBuf};
@@ -15,7 +14,7 @@ use std::sync::{Arc, Mutex};
 
 pub struct Compiler {
     destination: Option<RefCell<Box<dyn std::io::Write>>>,
-    colors: bool,
+    pub colors: bool,
     error_count: Cell<usize>,
     pub files: elsa::FrozenMap<PathBuf, String>,
     pub binary_files: elsa::FrozenMap<PathBuf, Vec<u8>>,
@@ -113,11 +112,10 @@ impl Compiler {
             return span;
         }
         let dl = DisplayList::from(err.print(self));
-        let dlf = DisplayListFormatter::new(self.colors, false);
         writeln!(
             self.destination.as_ref().unwrap().borrow_mut(),
             "{}",
-            dlf.format(&dl)
+            dl,
         )
         .unwrap();
         span.with_error()

Assembler/src/errors.rs

@@ -4,6 +4,7 @@ use crate::span::{Span, Spanned};
 use crate::Compiler;
 
 use annotate_snippets::snippet::{Annotation, AnnotationType, Slice, Snippet, SourceAnnotation};
+use annotate_snippets::display_list::FormatOptions;
 
 pub struct InvalidVectorSize<'a> {
     pub n: Spanned<'a, i32>,
@@ -25,6 +26,10 @@ impl<'a> Error<'a> for InvalidVectorSize<'a> {
             }),
             footer: vec![],
             slices: self.slices(cx, "for vector length here", AnnotationType::Error),
+            opt: FormatOptions {
+                color: cx.colors,
+                .. Default::default()
+            },
         }
     }
 }
@@ -62,6 +67,10 @@ impl<'a, T: std::fmt::Display, E: std::fmt::Display> Error<'a> for ExpectedGot<'
             }),
             footer: vec![],
             slices: self.slices(cx, "for operand here", AnnotationType::Error),
+            opt: FormatOptions {
+                color: cx.colors,
+                .. Default::default()
+            },
         }
     }
 }
@@ -83,6 +92,10 @@ impl<'a> Error<'a> for ExpectedOperand<'a> {
             }),
             footer: vec![],
             slices: self.slices(cx, "in argument list here", AnnotationType::Error),
+            opt: FormatOptions {
+                color: cx.colors,
+                .. Default::default()
+            },
         }
     }
 }
@@ -105,6 +118,10 @@ impl<'a> Error<'a> for ArgNotFound<'a> {
             }),
             footer: vec![],
             slices: self.slices(cx, "", AnnotationType::Error),
+            opt: FormatOptions {
+                color: cx.colors,
+                .. Default::default()
+            },
         }
     }
 }
@@ -144,6 +161,10 @@ impl<'a> Error<'a> for JumpOutOfBounds<'a> {
                     }
                 })
                 .collect(),
+            opt: FormatOptions {
+                color: cx.colors,
+                .. Default::default()
+            },
         }
     }
 }
@@ -169,6 +190,10 @@ impl<'a> Error<'a> for UnknownInstruction<'a> {
             }),
             footer: vec![],
             slices: self.slices(cx, "", AnnotationType::Error),
+            opt: FormatOptions {
+                color: cx.colors,
+                .. Default::default()
+            },
         }
     }
 }
@@ -191,6 +216,10 @@ impl<'a> Error<'a> for InvalidRegisterId<'a> {
             }),
             footer: vec![],
             slices: self.slices(cx, self.err.to_string(), AnnotationType::Error),
+            opt: FormatOptions {
+                color: cx.colors,
+                .. Default::default()
+            },
         }
     }
 }
@@ -203,7 +232,7 @@ impl<'a> Error<'a> for Io {
     fn spans(&self) -> &[Span<'a>] {
         std::slice::from_ref(&Span::DUMMY)
     }
-    fn print(self, _cx: &Compiler) -> Snippet {
+    fn print(self, cx: &Compiler) -> Snippet {
         Snippet {
             title: Some(Annotation {
                 label: Some(self.err.to_string()),
@@ -212,6 +241,10 @@ impl<'a> Error<'a> for Io {
             }),
             footer: vec![],
             slices: vec![],
+            opt: FormatOptions {
+                color: cx.colors,
+                .. Default::default()
+            },
         }
     }
 }
@@ -238,6 +271,10 @@ impl<'a> Error<'a> for UnimplementedInstruction<'a> {
                 "cranelift backend does not yet support this instruction",
                 AnnotationType::Error,
             ),
+            opt: FormatOptions {
+                color: cx.colors,
+                .. Default::default()
+            },
         }
     }
 }
@@ -265,6 +302,10 @@ impl<'a> Error<'a> for UninitializedRead<'a> {
                 format!("register {} was never written to", self.reg),
                 AnnotationType::Error,
             ),
+            opt: FormatOptions {
+                color: cx.colors,
+                .. Default::default()
+            },
         }
     }
 }
@@ -298,6 +339,10 @@ impl<'a> Error<'a> for DeadWrite<'a> {
                 ),
                 AnnotationType::Warning,
             ),
+            opt: FormatOptions {
+                color: cx.colors,
+                .. Default::default()
+            },
         }
     }
 }
@@ -311,7 +356,7 @@ impl<'a> Error<'a> for NotVectorizable {
     fn spans(&self) -> &[Span<'a>] {
         std::slice::from_ref(&Span::DUMMY)
     }
-    fn print(self, _: &Compiler) -> Snippet {
+    fn print(self, cx: &Compiler) -> Snippet {
         Snippet {
             title: Some(Annotation {
                 label: Some(format!(
@@ -323,6 +368,10 @@ impl<'a> Error<'a> for NotVectorizable {
             }),
             footer: vec![],
             slices: vec![],
+            opt: FormatOptions {
+                color: cx.colors,
+                .. Default::default()
+            },
         }
     }
 }
@@ -335,7 +384,7 @@ impl<'a> Error<'a> for SkippedErrors {
     fn spans(&self) -> &[Span<'a>] {
         std::slice::from_ref(&Span::DUMMY)
     }
-    fn print(self, _: &Compiler) -> Snippet {
+    fn print(self, cx: &Compiler) -> Snippet {
         Snippet {
             title: Some(Annotation {
                 label: Some(format!(
@@ -348,6 +397,10 @@ impl<'a> Error<'a> for SkippedErrors {
             }),
             footer: vec![],
             slices: vec![],
+            opt: FormatOptions {
+                color: cx.colors,
+                .. Default::default()
+            },
         }
     }
 }