converted registers to relocatable cells and bug fixes #66
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converted registers to relocatable cells and bug fixes
Time spent on this PR: 2 hours
Pull request type
Please check the type of change your PR introduces:
What is the current behavior?
Currently, registers are seen as felts which poses problem to relocate (since we need to add a +1 offset to all addresses for relocatables).
What is the new behavior?
Now all registers are considered as relocatables (=cells in google sheets).
This implied to change certain formulas for addition in GS (hence the enhancement of the segment element addition functions which are also now more reliable as they can work with columns like "AA" and cells like "Program!AD32").
The VM works fine with signed integers everywhere except for builtins for which the output is different depending on wether the inputs are signed or not. So builtin inputs are internally converted to unsigned ints (as felts would be >0 and <PRIME) and the ouputs are converted to signed ints since the rest of the VM works with signed ints. Like so assert_eqs between instructions and builtin outputs don't fail.