release 0.62.0 (#441)

* update changelog * fix typo in changelog * fix mypy
CQCL · Dec 18, 2024 · da9f6b1 · da9f6b1
1 parent f4e18c3
commit da9f6b1
Show file tree

Hide file tree

Showing 3 changed files with 4 additions and 4 deletions.
diff --git a/docs/changelog.md b/docs/changelog.md
@@ -4,9 +4,9 @@
 
 # Changelog
 
-## unreleased
+## 0.62.0 (December 2024)
 
-- AerBackend now reject circuits with too many qubits
+- AerBackend now rejects circuits with too many qubits
 - Update pytket version requirement to 1.37.0.
 - Update qiskit version requirement to 1.3.1.
 - Fix conversion of circuits containing multiple operations conditioned on the

diff --git a/pytket/extensions/qiskit/qiskit_convert.py b/pytket/extensions/qiskit/qiskit_convert.py
@@ -663,7 +663,7 @@ def append_tk_command_to_qiskit(
         qb = qregmap[qubit.reg_name][qubit.index[0]]
         b = cregmap[bit.reg_name][bit.index[0]]
         # If the bit is storing a range predicate it should be invalidated:
-        range_preds.pop(bit, None)
+        range_preds.pop(bit, None)  # type: ignore
         return qcirc.measure(qb, b)
 
     if optype == OpType.Reset:

diff --git a/tests/qiskit_convert_test.py b/tests/qiskit_convert_test.py
@@ -1193,7 +1193,7 @@ def test_nonregister_bits() -> None:
         tk_to_qiskit(c)
 
 
-def test_range_preds_with_conditionals():
+def test_range_preds_with_conditionals() -> None:
     # https://github.com/CQCL/pytket-qiskit/issues/375
     c = Circuit(1, 1)
     treg = c.add_c_register(_TEMP_BIT_NAME, 1)