ppc/svp64: support svstep instructions

https://libre-soc.org/openpower/sv/ https://libre-soc.org/openpower/sv/svstep/ https://libre-soc.org/openpower/isa/simplev/
AthenaCPU · Aug 11, 2022 · 4c388a8 · 4c388a8
1 parent 5eafd6d
commit 4c388a8
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diff --git a/gas/testsuite/gas/ppc/ppc.exp b/gas/testsuite/gas/ppc/ppc.exp
@@ -156,3 +156,4 @@ run_dump_test "pr27676"
 run_dump_test "raw"
 
 run_dump_test "setvl"
+run_dump_test "svstep"
diff --git a/gas/testsuite/gas/ppc/svstep.d b/gas/testsuite/gas/ppc/svstep.d
@@ -0,0 +1,13 @@
+#as: -mlibresoc
+#objdump: -dr -Mlibresoc
+
+.*:     file format .*
+
+
+Disassembly of section \.text:
+0+ <\.text>:
+.*:	(27 00 00 58|58 00 00 27) 	svstep. r0,1,0
+.*:	(26 00 00 58|58 00 00 26) 	svstep  r0,1,0
+.*:	(26 00 e0 5b|5b e0 00 26) 	svstep  r31,1,0
+.*:	(26 7e 00 58|58 00 7e 26) 	svstep  r0,64,0
+.*:	(66 00 00 58|58 00 00 66) 	svstep  r0,1,1
diff --git a/gas/testsuite/gas/ppc/svstep.s b/gas/testsuite/gas/ppc/svstep.s
@@ -0,0 +1,5 @@
+svstep. 0,1,0
+svstep 0,1,0
+svstep 31,1,0
+svstep 0,64,0
+svstep 0,1,1
diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c
@@ -6788,6 +6788,9 @@ const struct powerpc_opcode powerpc_opcodes[] = {
 {"rlmi",	M(22,0),	M_MASK,	     M601,	PPCVLE,		{RA, RS, RB, MBE, ME}},
 {"rlmi.",	M(22,1),	M_MASK,	     M601,	PPCVLE,		{RA, RS, RB, MBE, ME}},
 
+{"svstep",	SVL(22,19,0),	SVL_MASK,	SVP64,	PPCVLE,	{RT, SVi, vf}},
+{"svstep.",	SVL(22,19,1),	SVL_MASK,	SVP64,	PPCVLE,	{RT, SVi, vf}},
+
 {"setvl",	SVL(22,27,0),	SVL_MASK,	SVP64,	PPCVLE,	{RT, RA, SVi, vf, vs, ms}},
 {"setvl.",	SVL(22,27,1),	SVL_MASK,	SVP64,	PPCVLE,	{RT, RA, SVi, vf, vs, ms}},
Original file line number	Diff line number	Diff line change
Expand Up		@@ -156,3 +156,4 @@ run_dump_test "pr27676"
		run_dump_test "raw"

		run_dump_test "setvl"
		run_dump_test "svstep"