Examples: Update examples

Use recent packs: - ARM::SDS - ARM::CMSIS@>=6.0.0 - ARM::CMSIS-RTX@>=5.8.0 - ARM::CMSIS-Compiler@>=2.0.0 - Keil::[email protected]
ARM-software · Feb 14, 2024 · 68a6e05 · 68a6e05
1 parent c266e53
commit 68a6e05
Show file tree

Hide file tree

Showing 60 changed files with 3,353 additions and 2,360 deletions.
diff --git a/examples/sds_buffer/RTE/CMSIS/RTX_Config.c b/examples/sds_buffer/RTE/CMSIS/RTX_Config.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2013-2021 Arm Limited. All rights reserved.
+ * Copyright (c) 2013-2023 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -17,7 +17,7 @@
  *
  * -----------------------------------------------------------------------------
  *
- * $Revision:   V5.1.1
+ * $Revision:   V5.2.0
  *
  * Project:     CMSIS-RTOS RTX
  * Title:       RTX Configuration
@@ -55,6 +55,9 @@ __WEAK uint32_t osRtxErrorNotify (uint32_t code, void *object_id) {
     case osRtxErrorClibMutex:
       // Standard C/C++ library mutex initialization failed
       break;
+    case osRtxErrorSVC:
+      // Invalid SVC function called (function=object_id)
+      break;
     default:
       // Reserved
       break;

diff --git a/..._buffer/RTE/CMSIS/[email protected] → ..._buffer/RTE/CMSIS/[email protected] b/..._buffer/RTE/CMSIS/[email protected] → ..._buffer/RTE/CMSIS/[email protected]
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2013-2021 Arm Limited. All rights reserved.
+ * Copyright (c) 2013-2023 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -17,7 +17,7 @@
  *
  * -----------------------------------------------------------------------------
  *
- * $Revision:   V5.1.1
+ * $Revision:   V5.2.0
  *
  * Project:     CMSIS-RTOS RTX
  * Title:       RTX Configuration
@@ -55,6 +55,9 @@ __WEAK uint32_t osRtxErrorNotify (uint32_t code, void *object_id) {
     case osRtxErrorClibMutex:
       // Standard C/C++ library mutex initialization failed
       break;
+    case osRtxErrorSVC:
+      // Invalid SVC function called (function=object_id)
+      break;
     default:
       // Reserved
       break;

diff --git a/examples/sds_buffer/RTE/CMSIS/RTX_Config.h b/examples/sds_buffer/RTE/CMSIS/RTX_Config.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2013-2021 Arm Limited. All rights reserved.
+ * Copyright (c) 2013-2023 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -17,7 +17,7 @@
  *
  * -----------------------------------------------------------------------------
  *
- * $Revision:   V5.5.2
+ * $Revision:   V5.6.0
  *
  * Project:     CMSIS-RTOS RTX
  * Title:       RTX Configuration definitions
@@ -69,6 +69,61 @@
 
 //   </e>
 
+//   <e>Safety features (Source variant only)
+//   <i> Enables FuSa related features.
+//   <i> Requires RTX Source variant.
+//   <i> Enables:
+//   <i>  - selected features from this group
+//   <i>  - Thread functions: osThreadProtectPrivileged
+#ifndef OS_SAFETY_FEATURES
+#define OS_SAFETY_FEATURES          0
+#endif
+
+//     <q>Safety Class
+//     <i> Threads assigned to lower classes cannot modify higher class threads.
+//     <i> Enables:
+//     <i>  - Object attributes: osSafetyClass
+//     <i>  - Kernel functions: osKernelProtect, osKernelDestroyClass
+//     <i>  - Thread functions: osThreadGetClass, osThreadSuspendClass, osThreadResumeClass
+#ifndef OS_SAFETY_CLASS
+#define OS_SAFETY_CLASS             1
+#endif
+
+//     <q>MPU Protected Zone
+//     <i> Access protection via MPU (Spatial isolation).
+//     <i> Enables:
+//     <i>  - Thread attributes: osThreadZone
+//     <i>  - Thread functions: osThreadGetZone, osThreadTerminateZone
+//     <i>  - Zone Management: osZoneSetup_Callback
+#ifndef OS_EXECUTION_ZONE
+#define OS_EXECUTION_ZONE           1
+#endif
+
+//     <q>Thread Watchdog
+//     <i> Watchdog alerts ensure timing for critical threads (Temporal isolation).
+//     <i> Enables:
+//     <i>  - Thread functions: osThreadFeedWatchdog
+//     <i>  - Handler functions: osWatchdogAlarm_Handler
+#ifndef OS_THREAD_WATCHDOG
+#define OS_THREAD_WATCHDOG          1
+#endif
+
+//     <q>Object Pointer checking
+//     <i> Check object pointer alignment and memory region.
+#ifndef OS_OBJ_PTR_CHECK
+#define OS_OBJ_PTR_CHECK            0
+#endif
+
+//     <q>SVC Function Pointer checking
+//     <i> Check SVC function pointer alignment and memory region.
+//     <i> User needs to define a linker execution region RTX_SVC_VENEERS
+//     <i> containing input sections: rtx_*.o (.text.os.svc.veneer.*)
+#ifndef OS_SVC_PTR_CHECK
+#define OS_SVC_PTR_CHECK            0
+#endif
+
+//   </e>
+
 //   <o>ISR FIFO Queue
 //      <4=>  4 entries    <8=>   8 entries   <12=>  12 entries   <16=>  16 entries
 //     <24=> 24 entries   <32=>  32 entries   <48=>  48 entries   <64=>  64 entries
@@ -142,6 +197,20 @@
 #define OS_IDLE_THREAD_TZ_MOD_ID    0
 #endif
 
+//   <o>Idle Thread Safety Class <0-15>
+//   <i> Defines the Safety Class number.
+//   <i> Default: 0
+#ifndef OS_IDLE_THREAD_CLASS
+#define OS_IDLE_THREAD_CLASS        0
+#endif
+
+//   <o>Idle Thread Zone <0-127>
+//   <i> Defines Thread Zone.
+//   <i> Default: 0
+#ifndef OS_IDLE_THREAD_ZONE
+#define OS_IDLE_THREAD_ZONE         0
+#endif
+
 //   <q>Stack overrun checking
 //   <i> Enables stack overrun check at thread switch (requires RTX source variant).
 //   <i> Enabling this option increases slightly the execution time of a thread switch.
@@ -156,10 +225,10 @@
 #define OS_STACK_WATERMARK          0
 #endif
 
-//   <o>Processor mode for Thread execution
+//   <o>Default Processor mode for Thread execution
 //     <0=> Unprivileged mode
 //     <1=> Privileged mode
-//   <i> Default: Privileged mode
+//   <i> Default: Unprivileged mode
 #ifndef OS_PRIVILEGE_MODE
 #define OS_PRIVILEGE_MODE           1
 #endif
@@ -211,6 +280,20 @@
 #define OS_TIMER_THREAD_TZ_MOD_ID   0
 #endif
 
+//   <o>Timer Thread Safety Class <0-15>
+//   <i> Defines the Safety Class number.
+//   <i> Default: 0
+#ifndef OS_TIMER_THREAD_CLASS
+#define OS_TIMER_THREAD_CLASS       0
+#endif
+
+//   <o>Timer Thread Zone <0-127>
+//   <i> Defines Thread Zone.
+//   <i> Default: 0
+#ifndef OS_TIMER_THREAD_ZONE
+#define OS_TIMER_THREAD_ZONE        0
+#endif
+
 //   <o>Timer Callback Queue entries <0-256>
 //   <i> Number of concurrent active timer callback functions.
 //   <i> May be set to 0 when timers are not used.

diff --git a/.../fs/mdk/RTE/CMSIS/[email protected] → ..._buffer/RTE/CMSIS/[email protected] b/.../fs/mdk/RTE/CMSIS/[email protected] → ..._buffer/RTE/CMSIS/[email protected]
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2013-2021 Arm Limited. All rights reserved.
+ * Copyright (c) 2013-2023 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -17,7 +17,7 @@
  *
  * -----------------------------------------------------------------------------
  *
- * $Revision:   V5.5.2
+ * $Revision:   V5.6.0
  *
  * Project:     CMSIS-RTOS RTX
  * Title:       RTX Configuration definitions
@@ -69,6 +69,61 @@
 
 //   </e>
 
+//   <e>Safety features (Source variant only)
+//   <i> Enables FuSa related features.
+//   <i> Requires RTX Source variant.
+//   <i> Enables:
+//   <i>  - selected features from this group
+//   <i>  - Thread functions: osThreadProtectPrivileged
+#ifndef OS_SAFETY_FEATURES
+#define OS_SAFETY_FEATURES          0
+#endif
+
+//     <q>Safety Class
+//     <i> Threads assigned to lower classes cannot modify higher class threads.
+//     <i> Enables:
+//     <i>  - Object attributes: osSafetyClass
+//     <i>  - Kernel functions: osKernelProtect, osKernelDestroyClass
+//     <i>  - Thread functions: osThreadGetClass, osThreadSuspendClass, osThreadResumeClass
+#ifndef OS_SAFETY_CLASS
+#define OS_SAFETY_CLASS             1
+#endif
+
+//     <q>MPU Protected Zone
+//     <i> Access protection via MPU (Spatial isolation).
+//     <i> Enables:
+//     <i>  - Thread attributes: osThreadZone
+//     <i>  - Thread functions: osThreadGetZone, osThreadTerminateZone
+//     <i>  - Zone Management: osZoneSetup_Callback
+#ifndef OS_EXECUTION_ZONE
+#define OS_EXECUTION_ZONE           1
+#endif
+
+//     <q>Thread Watchdog
+//     <i> Watchdog alerts ensure timing for critical threads (Temporal isolation).
+//     <i> Enables:
+//     <i>  - Thread functions: osThreadFeedWatchdog
+//     <i>  - Handler functions: osWatchdogAlarm_Handler
+#ifndef OS_THREAD_WATCHDOG
+#define OS_THREAD_WATCHDOG          1
+#endif
+
+//     <q>Object Pointer checking
+//     <i> Check object pointer alignment and memory region.
+#ifndef OS_OBJ_PTR_CHECK
+#define OS_OBJ_PTR_CHECK            0
+#endif
+
+//     <q>SVC Function Pointer checking
+//     <i> Check SVC function pointer alignment and memory region.
+//     <i> User needs to define a linker execution region RTX_SVC_VENEERS
+//     <i> containing input sections: rtx_*.o (.text.os.svc.veneer.*)
+#ifndef OS_SVC_PTR_CHECK
+#define OS_SVC_PTR_CHECK            0
+#endif
+
+//   </e>
+
 //   <o>ISR FIFO Queue
 //      <4=>  4 entries    <8=>   8 entries   <12=>  12 entries   <16=>  16 entries
 //     <24=> 24 entries   <32=>  32 entries   <48=>  48 entries   <64=>  64 entries
@@ -142,11 +197,25 @@
 #define OS_IDLE_THREAD_TZ_MOD_ID    0
 #endif
 
+//   <o>Idle Thread Safety Class <0-15>
+//   <i> Defines the Safety Class number.
+//   <i> Default: 0
+#ifndef OS_IDLE_THREAD_CLASS
+#define OS_IDLE_THREAD_CLASS        0
+#endif
+
+//   <o>Idle Thread Zone <0-127>
+//   <i> Defines Thread Zone.
+//   <i> Default: 0
+#ifndef OS_IDLE_THREAD_ZONE
+#define OS_IDLE_THREAD_ZONE         0
+#endif
+
 //   <q>Stack overrun checking
 //   <i> Enables stack overrun check at thread switch (requires RTX source variant).
 //   <i> Enabling this option increases slightly the execution time of a thread switch.
 #ifndef OS_STACK_CHECK
-#define OS_STACK_CHECK              0
+#define OS_STACK_CHECK              1
 #endif
 
 //   <q>Stack usage watermark
@@ -156,12 +225,12 @@
 #define OS_STACK_WATERMARK          0
 #endif
 
-//   <o>Processor mode for Thread execution
+//   <o>Default Processor mode for Thread execution
 //     <0=> Unprivileged mode
 //     <1=> Privileged mode
-//   <i> Default: Privileged mode
+//   <i> Default: Unprivileged mode
 #ifndef OS_PRIVILEGE_MODE
-#define OS_PRIVILEGE_MODE           1
+#define OS_PRIVILEGE_MODE           0
 #endif
 
 // </h>
@@ -211,6 +280,20 @@
 #define OS_TIMER_THREAD_TZ_MOD_ID   0
 #endif
 
+//   <o>Timer Thread Safety Class <0-15>
+//   <i> Defines the Safety Class number.
+//   <i> Default: 0
+#ifndef OS_TIMER_THREAD_CLASS
+#define OS_TIMER_THREAD_CLASS       0
+#endif
+
+//   <o>Timer Thread Zone <0-127>
+//   <i> Defines Thread Zone.
+//   <i> Default: 0
+#ifndef OS_TIMER_THREAD_ZONE
+#define OS_TIMER_THREAD_ZONE        0
+#endif
+
 //   <o>Timer Callback Queue entries <0-256>
 //   <i> Number of concurrent active timer callback functions.
 //   <i> May be set to 0 when timers are not used.

diff --git a/examples/sds_buffer/SDS_Buffer.cproject.yml b/examples/sds_buffer/SDS_Buffer.cproject.yml
@@ -1,6 +1,8 @@
 project:
   packs:
    - pack: ARM::SDS
+   - pack: ARM::CMSIS@>=6.0.0
+   - pack: ARM::CMSIS-RTX@>=5.8.0
 
   connections:
     - connect: Demo Application
@@ -14,6 +16,7 @@ project:
 
   components:
     - component: ARM::CMSIS:RTOS2:Keil RTX5&Source
+    - component: ARM::CMSIS:OS Tick
     - component: ARM::SDS:Buffer
 
   groups:

diff --git a/examples/sds_player/RTE/CMSIS/RTX_Config.c b/examples/sds_player/RTE/CMSIS/RTX_Config.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2013-2021 Arm Limited. All rights reserved.
+ * Copyright (c) 2013-2023 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -17,7 +17,7 @@
  *
  * -----------------------------------------------------------------------------
  *
- * $Revision:   V5.1.1
+ * $Revision:   V5.2.0
  *
  * Project:     CMSIS-RTOS RTX
  * Title:       RTX Configuration
@@ -55,6 +55,9 @@ __WEAK uint32_t osRtxErrorNotify (uint32_t code, void *object_id) {
     case osRtxErrorClibMutex:
       // Standard C/C++ library mutex initialization failed
       break;
+    case osRtxErrorSVC:
+      // Invalid SVC function called (function=object_id)
+      break;
     default:
       // Reserved
       break;

diff --git a/...hosting/RTE/CMSIS/[email protected] → ..._player/RTE/CMSIS/[email protected] b/...hosting/RTE/CMSIS/[email protected] → ..._player/RTE/CMSIS/[email protected]
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2013-2021 Arm Limited. All rights reserved.
+ * Copyright (c) 2013-2023 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -17,7 +17,7 @@
  *
  * -----------------------------------------------------------------------------
  *
- * $Revision:   V5.1.1
+ * $Revision:   V5.2.0
  *
  * Project:     CMSIS-RTOS RTX
  * Title:       RTX Configuration
@@ -55,6 +55,9 @@ __WEAK uint32_t osRtxErrorNotify (uint32_t code, void *object_id) {
     case osRtxErrorClibMutex:
       // Standard C/C++ library mutex initialization failed
       break;
+    case osRtxErrorSVC:
+      // Invalid SVC function called (function=object_id)
+      break;
     default:
       // Reserved
       break;