From 4ee670410c7a09d84b891a988bffdc05eeb6cf7a Mon Sep 17 00:00:00 2001
From: Jonny Gellhaar <jonny.gellhaar@prevas.se>
Date: Tue, 26 Nov 2024 20:41:25 +0100
Subject: [PATCH] soc: stm32wb: fix ble low-power

Release HSI CLK48 semaphore when going to sleep to allow C2 (M0)
core to start and stop clock as needed while C1 core is not running.

CLK48 is shared between RNG and USB. RNG is needed by M0 during BLE
advertisement. If semaphore is locked, C2 core can start it when it
needs to but not stop it.

Fixes zephyrproject-rtos#69955.

Signed-off-by: Jonny Gellhaar <jonny.gellhaar@prevas.se>
---
 soc/st/stm32/stm32wbx/power.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/soc/st/stm32/stm32wbx/power.c b/soc/st/stm32/stm32wbx/power.c
index 33864decd82076..9bba7874b89b4c 100644
--- a/soc/st/stm32/stm32wbx/power.c
+++ b/soc/st/stm32/stm32wbx/power.c
@@ -7,6 +7,7 @@
 #include <zephyr/pm/pm.h>
 #include <soc.h>
 #include <zephyr/init.h>
+#include <zephyr/drivers/clock_control/stm32_clock_control.h>
 
 #include <stm32wbxx_ll_utils.h>
 #include <stm32wbxx_ll_bus.h>
@@ -85,6 +86,17 @@ void pm_state_set(enum pm_state state, uint8_t substate_id)
 			return;
 		}
 
+#if defined(STM32_HSI48_ENABLED)
+		if (IS_ENABLED(STM32_HSI48_ENABLED)) {
+			/* Release CLK48 semaphore to make sure M0 core can enable/disable
+			   it as needed (shared between RNG and USB peripheral, M0 uses RNG
+			   during BLE advertisement phase). It seems like if left locked M0
+			   can enable the clock if needed but is not able (allowed) to stop
+			   it, with increased power consumption as a result. */
+			z_stm32_hsem_unlock(CFG_HW_CLK48_CONFIG_SEMID);
+		}
+#endif /* STM32_HSI48_ENABLED */
+
 		/* Release RCC semaphore */
 		z_stm32_hsem_unlock(CFG_HW_RCC_SEMID);