From 0dd4c8a01a0e9cac820a2f47eaa47a9925f8b3ae Mon Sep 17 00:00:00 2001 From: Carles Cufi Date: Tue, 19 Nov 2024 18:51:24 +0100 Subject: [PATCH 1/8] manifest: hal_nordic: Update to nrfx 3.9.0 See https://github.com/zephyrproject-rtos/hal_nordic/pull/257. Signed-off-by: Carles Cufi --- drivers/counter/counter_nrfx_timer.c | 2 +- west.yml | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/counter/counter_nrfx_timer.c b/drivers/counter/counter_nrfx_timer.c index a9f0ed1d0bf026..333a436c80e46e 100644 --- a/drivers/counter/counter_nrfx_timer.c +++ b/drivers/counter/counter_nrfx_timer.c @@ -70,7 +70,7 @@ static int stop(const struct device *dev) { const struct counter_nrfx_config *config = dev->config; - nrf_timer_task_trigger(config->timer, NRF_TIMER_TASK_SHUTDOWN); + nrf_timer_task_trigger(config->timer, NRF_TIMER_TASK_STOP); return 0; } diff --git a/west.yml b/west.yml index 87287fb39ac7cc..d13fe29d5a2fa7 100644 --- a/west.yml +++ b/west.yml @@ -188,7 +188,7 @@ manifest: groups: - hal - name: hal_nordic - revision: 2dbb2ed6cf461062bbac59a65b6e9d4576656350 + revision: 54bde38c6f6ffb3780b26ae728cf79426184384e path: modules/hal/nordic groups: - hal From 2e1516f5ac7cac9a0638556ebc6b0a0483779020 Mon Sep 17 00:00:00 2001 From: Alberto Escolar Piedras Date: Mon, 18 Nov 2024 17:57:59 +0100 Subject: [PATCH 2/8] manifest: Update nRF hw models to latest Update the HW models module to: 42737c8ec8485987c7c9b0262b136de623e1ded2 Including the following: 42737c8 TIMER: Support devices without TASK_SHUTDOWN nrfx3.9 MDK 8.68 5fe6873 54 UARTE: Add frametimeout functionality dc086d7 UARTE: Add basic 54 support b046745 UARTE: Support better not having UART functionality 1c5f58c README: Mention the nRF54L15 models cover the L10 and L05 597c7d0 TEMP: Also build hal replacement for 54 and define NRF_TEMP_NS/S fb2ca83 Makefile: Let's build libraries (specially HAL) as pic 200a1e3 Makefiles: move some common options to common snippet Signed-off-by: Alberto Escolar Piedras --- west.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/west.yml b/west.yml index d13fe29d5a2fa7..ecf79269735550 100644 --- a/west.yml +++ b/west.yml @@ -300,7 +300,7 @@ manifest: groups: - tools - name: nrf_hw_models - revision: aeef3db9fa9e4b9d12b3bbec44f9cedc8fcb7d9c + revision: 42737c8ec8485987c7c9b0262b136de623e1ded2 path: modules/bsim_hw_models/nrf_hw_models - name: open-amp revision: b735edbc739ad59156eb55bb8ce2583d74537719 From dd80d2f8c0632038e40e73ce99532b689f57ccd3 Mon Sep 17 00:00:00 2001 From: Alberto Escolar Piedras Date: Wed, 20 Nov 2024 14:13:22 +0100 Subject: [PATCH 3/8] manifest: Update nRF hw models to version compatible with nrfx3.9 Update the HW models module to: 3cfca0192ff84da919e9bc7978bcc2239cd6a395 This includes 2 changes: * 3cfca01 UART: Model more accurately TASKS_FLUSH behaviour * 25cbd28: 54L15: Change CLOKPOWER IRQ line (MDK 8.68, nrfx 3.9.0) WARNING! This change breaks backwards compatibility with SW which expected this line to be 270 for 54L15 devices, and therefore with MDKs < 8.68 & nrfx < 3.9.0. This change requires updating to the MDK >=8.68 and nrfx >=3.9.0 if building using the 54L15 models. 52 and 53 models are not affected. Change the CLOCK_POWER interrupt line from 270 to 261. This has changed in the latest MDK (8.68) and the new value is used in the latest nrfx (3.9.0) drivers. Signed-off-by: Alberto Escolar Piedras --- west.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/west.yml b/west.yml index ecf79269735550..8f691d40f74cd6 100644 --- a/west.yml +++ b/west.yml @@ -300,7 +300,7 @@ manifest: groups: - tools - name: nrf_hw_models - revision: 42737c8ec8485987c7c9b0262b136de623e1ded2 + revision: 3cfca0192ff84da919e9bc7978bcc2239cd6a395 path: modules/bsim_hw_models/nrf_hw_models - name: open-amp revision: b735edbc739ad59156eb55bb8ce2583d74537719 From 0d24e48a62d4eded1e4d76d894fd6b1e093a0d62 Mon Sep 17 00:00:00 2001 From: Alberto Escolar Piedras Date: Wed, 20 Nov 2024 10:23:20 +0100 Subject: [PATCH 4/8] Bluetooth: Controller: nRF: Support MDK 8.68 TASK_SHUTDOWN was deprecated in newer SOCs and now removed in MDK 8.68 (nrfx 3.9.0) Signed-off-by: Alberto Escolar Piedras Signed-off-by: Vinayak Kariappa Chettimada --- .../bluetooth/controller/ll_sw/nordic/hal/nrf5/radio/radio.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/radio/radio.c b/subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/radio/radio.c index f372ef667d0a06..d9ecba277aaed9 100644 --- a/subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/radio/radio.c +++ b/subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/radio/radio.c @@ -1724,11 +1724,15 @@ uint32_t radio_tmr_start_get(void) void radio_tmr_stop(void) { nrf_timer_task_trigger(EVENT_TIMER, NRF_TIMER_TASK_STOP); +#if defined(TIMER_TASKS_SHUTDOWN_TASKS_SHUTDOWN_Msk) nrf_timer_task_trigger(EVENT_TIMER, NRF_TIMER_TASK_SHUTDOWN); +#endif #if !defined(CONFIG_BT_CTLR_TIFS_HW) nrf_timer_task_trigger(SW_SWITCH_TIMER, NRF_TIMER_TASK_STOP); +#if defined(TIMER_TASKS_SHUTDOWN_TASKS_SHUTDOWN_Msk) nrf_timer_task_trigger(SW_SWITCH_TIMER, NRF_TIMER_TASK_SHUTDOWN); +#endif #endif /* !CONFIG_BT_CTLR_TIFS_HW */ #if defined(CONFIG_SOC_COMPATIBLE_NRF54LX) From 2119b8850ada5f29e31aebe8910332faa60218f6 Mon Sep 17 00:00:00 2001 From: Carles Cufi Date: Wed, 16 Oct 2024 21:42:12 +0200 Subject: [PATCH 5/8] soc: nordic: nRF54L: Consolidate common Kconfig options There are many common options to all ICs of the 54L series. Consolidate them in a single entry so that they do not need to be re-typed for each SoC series member. Signed-off-by: Carles Cufi --- soc/nordic/nrf54l/Kconfig | 16 ++++++---------- 1 file changed, 6 insertions(+), 10 deletions(-) diff --git a/soc/nordic/nrf54l/Kconfig b/soc/nordic/nrf54l/Kconfig index 4f204c91fdb32e..bdebe3a7a3dd23 100644 --- a/soc/nordic/nrf54l/Kconfig +++ b/soc/nordic/nrf54l/Kconfig @@ -9,7 +9,8 @@ config SOC_SERIES_NRF54LX select HAS_NORDIC_DRIVERS select HAS_SEGGER_RTT if ZEPHYR_SEGGER_MODULE -config SOC_NRF54L15_CPUAPP +config SOC_NRF54L_CPUAPP_COMMON + bool select ARM select ARMV8_M_DSP select CPU_CORTEX_M33 @@ -20,16 +21,11 @@ config SOC_NRF54L15_CPUAPP select HAS_HW_NRF_RADIO_IEEE802154 select HAS_POWEROFF +config SOC_NRF54L15_CPUAPP + select SOC_NRF54L_CPUAPP_COMMON + config SOC_NRF54L20_ENGA_CPUAPP - select ARM - select ARMV8_M_DSP - select CPU_CORTEX_M33 - select CPU_HAS_ARM_MPU - select CPU_HAS_ICACHE - select CPU_HAS_ARM_SAU - select CPU_HAS_FPU - select HAS_HW_NRF_RADIO_IEEE802154 - select HAS_POWEROFF + select SOC_NRF54L_CPUAPP_COMMON config SOC_NRF54L15_CPUFLPR depends on RISCV_CORE_NORDIC_VPR From da71ff86e8f2c98da21d71acc7b6265d86779df0 Mon Sep 17 00:00:00 2001 From: Carles Cufi Date: Mon, 4 Nov 2024 17:48:40 +0100 Subject: [PATCH 6/8] soc: nordic: Introduce the nRF54L05 and nRF54L10 These two new ICs are variants of the nRF54L15 with different memory sizes: - nRF54L05: 500KB RRAM, 96KB RAM - nRF54L10: 1022KB RRAM, 192KB RAM - nRF54L15: 1524KB RRAM, 256KB RAM Signed-off-by: Carles Cufi --- drivers/adc/adc_nrfx_saadc.c | 4 +- drivers/comparator/comparator_nrf_comp.c | 2 +- drivers/comparator/comparator_nrf_lpcomp.c | 2 +- .../nordic_vpr_launcher/nordic_vpr_launcher.c | 4 +- dts/arm/nordic/nrf54l05_cpuapp.dtsi | 8 + dts/arm/nordic/nrf54l10_cpuapp.dtsi | 8 + dts/arm/nordic/nrf54l15_cpuapp.dtsi | 82 +- dts/arm/nordic/nrf54l_05_10_15_cpuapp.dtsi | 86 + dts/common/nordic/nrf54l05.dtsi | 39 + dts/common/nordic/nrf54l10.dtsi | 39 + dts/common/nordic/nrf54l15.dtsi | 750 +------ dts/common/nordic/nrf54l_05_10_15.dtsi | 734 +++++++ dts/riscv/nordic/nrf54l05_cpuflpr.dtsi | 8 + dts/riscv/nordic/nrf54l10_cpuflpr.dtsi | 8 + dts/riscv/nordic/nrf54l15_cpuflpr.dtsi | 61 +- dts/riscv/nordic/nrf54l_05_10_15_cpuflpr.dtsi | 65 + modules/hal_nordic/nrfx/CMakeLists.txt | 12 +- modules/hal_nordic/nrfx/nrfx_config.h | 8 + .../nrfx/nrfx_config_nrf54l05_application.h | 1775 ++++++++++++++++ .../nrfx/nrfx_config_nrf54l05_flpr.h | 1784 +++++++++++++++++ .../nrfx/nrfx_config_nrf54l10_application.h | 1775 ++++++++++++++++ .../nrfx/nrfx_config_nrf54l10_flpr.h | 1784 +++++++++++++++++ .../nrfx/nrfx_config_nrf54l15_application.h | 170 +- .../nrfx/nrfx_config_nrf54l15_flpr.h | 172 +- soc/nordic/nrf54l/Kconfig | 16 +- .../nrf54l/Kconfig.defconfig.nrf54l15_cpuapp | 11 - .../Kconfig.defconfig.nrf54l_05_10_15_cpuapp | 11 + ...Kconfig.defconfig.nrf54l_05_10_15_cpuflpr} | 6 +- soc/nordic/nrf54l/Kconfig.soc | 38 + soc/nordic/soc.yml | 26 + soc/nordic/validate_base_addresses.c | 2 +- tests/drivers/flash/negative_tests/src/main.c | 2 +- .../drivers/mbox/mbox_error_cases/src/main.c | 3 +- .../watchdog/wdt_error_cases/src/main.c | 3 +- tests/kernel/interrupt/src/nested_irq.c | 2 +- 35 files changed, 8561 insertions(+), 939 deletions(-) create mode 100644 dts/arm/nordic/nrf54l05_cpuapp.dtsi create mode 100644 dts/arm/nordic/nrf54l10_cpuapp.dtsi create mode 100644 dts/arm/nordic/nrf54l_05_10_15_cpuapp.dtsi create mode 100644 dts/common/nordic/nrf54l05.dtsi create mode 100644 dts/common/nordic/nrf54l10.dtsi create mode 100644 dts/common/nordic/nrf54l_05_10_15.dtsi create mode 100644 dts/riscv/nordic/nrf54l05_cpuflpr.dtsi create mode 100644 dts/riscv/nordic/nrf54l10_cpuflpr.dtsi create mode 100644 dts/riscv/nordic/nrf54l_05_10_15_cpuflpr.dtsi create mode 100644 modules/hal_nordic/nrfx/nrfx_config_nrf54l05_application.h create mode 100644 modules/hal_nordic/nrfx/nrfx_config_nrf54l05_flpr.h create mode 100644 modules/hal_nordic/nrfx/nrfx_config_nrf54l10_application.h create mode 100644 modules/hal_nordic/nrfx/nrfx_config_nrf54l10_flpr.h delete mode 100644 soc/nordic/nrf54l/Kconfig.defconfig.nrf54l15_cpuapp create mode 100644 soc/nordic/nrf54l/Kconfig.defconfig.nrf54l_05_10_15_cpuapp rename soc/nordic/nrf54l/{Kconfig.defconfig.nrf54l15_cpuflpr => Kconfig.defconfig.nrf54l_05_10_15_cpuflpr} (52%) diff --git a/drivers/adc/adc_nrfx_saadc.c b/drivers/adc/adc_nrfx_saadc.c index b8782d02454838..c5b68f564a8255 100644 --- a/drivers/adc/adc_nrfx_saadc.c +++ b/drivers/adc/adc_nrfx_saadc.c @@ -31,7 +31,7 @@ static const uint8_t saadc_psels[NRF_SAADC_AIN7 + 1] = { [NRF_SAADC_AIN6] = NRF_PIN_PORT_TO_PIN_NUMBER(6U, 1), [NRF_SAADC_AIN7] = NRF_PIN_PORT_TO_PIN_NUMBER(7U, 1), }; -#elif defined(CONFIG_SOC_NRF54L15) +#elif defined(CONFIG_SOC_NRF54L05) || defined(CONFIG_SOC_NRF54L10) || defined(CONFIG_SOC_NRF54L15) static const uint32_t saadc_psels[NRF_SAADC_DVDD + 1] = { [NRF_SAADC_AIN0] = NRF_PIN_PORT_TO_PIN_NUMBER(4U, 1), [NRF_SAADC_AIN1] = NRF_PIN_PORT_TO_PIN_NUMBER(5U, 1), @@ -667,7 +667,7 @@ static const struct adc_driver_api adc_nrfx_driver_api = { #ifdef CONFIG_ADC_ASYNC .read_async = adc_nrfx_read_async, #endif -#if defined(CONFIG_SOC_NRF54L15) +#if defined(CONFIG_SOC_NRF54L05) || defined(CONFIG_SOC_NRF54L10) || defined(CONFIG_SOC_NRF54L15) .ref_internal = 900, #elif defined(CONFIG_NRF_PLATFORM_HALTIUM) .ref_internal = 1024, diff --git a/drivers/comparator/comparator_nrf_comp.c b/drivers/comparator/comparator_nrf_comp.c index 339d24f8dcdab5..383b852fc33fa9 100644 --- a/drivers/comparator/comparator_nrf_comp.c +++ b/drivers/comparator/comparator_nrf_comp.c @@ -78,7 +78,7 @@ static const uint32_t shim_nrf_comp_ain_map[] = { NRF_PIN_PORT_TO_PIN_NUMBER(5U, 1), NRF_PIN_PORT_TO_PIN_NUMBER(6U, 1), NRF_PIN_PORT_TO_PIN_NUMBER(7U, 1), -#elif defined(CONFIG_SOC_NRF54L15) +#elif defined(CONFIG_SOC_NRF54L05) || defined(CONFIG_SOC_NRF54L10) || defined(CONFIG_SOC_NRF54L15) NRF_PIN_PORT_TO_PIN_NUMBER(4U, 1), NRF_PIN_PORT_TO_PIN_NUMBER(5U, 1), NRF_PIN_PORT_TO_PIN_NUMBER(6U, 1), diff --git a/drivers/comparator/comparator_nrf_lpcomp.c b/drivers/comparator/comparator_nrf_lpcomp.c index 6c6710d337d868..cfb64bccf2754a 100644 --- a/drivers/comparator/comparator_nrf_lpcomp.c +++ b/drivers/comparator/comparator_nrf_lpcomp.c @@ -49,7 +49,7 @@ static const uint32_t shim_nrf_lpcomp_ain_map[] = { NRF_PIN_PORT_TO_PIN_NUMBER(5U, 1), NRF_PIN_PORT_TO_PIN_NUMBER(6U, 1), NRF_PIN_PORT_TO_PIN_NUMBER(7U, 1), -#elif defined(CONFIG_SOC_NRF54L15) +#elif defined(CONFIG_SOC_NRF54L05) || defined(CONFIG_SOC_NRF54L10) || defined(CONFIG_SOC_NRF54L15) NRF_PIN_PORT_TO_PIN_NUMBER(4U, 1), NRF_PIN_PORT_TO_PIN_NUMBER(5U, 1), NRF_PIN_PORT_TO_PIN_NUMBER(6U, 1), diff --git a/drivers/misc/nordic_vpr_launcher/nordic_vpr_launcher.c b/drivers/misc/nordic_vpr_launcher/nordic_vpr_launcher.c index c688a97f65458e..2c2915a7984384 100644 --- a/drivers/misc/nordic_vpr_launcher/nordic_vpr_launcher.c +++ b/drivers/misc/nordic_vpr_launcher/nordic_vpr_launcher.c @@ -14,7 +14,7 @@ #include #include -#if defined(CONFIG_SOC_NRF54L15_CPUAPP) && !defined(CONFIG_TRUSTED_EXECUTION_NONSECURE) +#if defined(CONFIG_SOC_NRF54L_CPUAPP_COMMON) && !defined(CONFIG_TRUSTED_EXECUTION_NONSECURE) #include #endif @@ -41,7 +41,7 @@ static int nordic_vpr_launcher_init(const struct device *dev) } #endif -#if defined(CONFIG_SOC_NRF54L15_CPUAPP) && !defined(CONFIG_TRUSTED_EXECUTION_NONSECURE) +#if defined(CONFIG_SOC_NRF54L_CPUAPP_COMMON) && !defined(CONFIG_TRUSTED_EXECUTION_NONSECURE) nrf_spu_periph_perm_secattr_set(NRF_SPU00, nrf_address_slave_get((uint32_t)config->vpr), true); #endif diff --git a/dts/arm/nordic/nrf54l05_cpuapp.dtsi b/dts/arm/nordic/nrf54l05_cpuapp.dtsi new file mode 100644 index 00000000000000..45bdfea1f9c662 --- /dev/null +++ b/dts/arm/nordic/nrf54l05_cpuapp.dtsi @@ -0,0 +1,8 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include "nrf54l_05_10_15_cpuapp.dtsi" diff --git a/dts/arm/nordic/nrf54l10_cpuapp.dtsi b/dts/arm/nordic/nrf54l10_cpuapp.dtsi new file mode 100644 index 00000000000000..cf8bc6ab5ea029 --- /dev/null +++ b/dts/arm/nordic/nrf54l10_cpuapp.dtsi @@ -0,0 +1,8 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include "nrf54l_05_10_15_cpuapp.dtsi" diff --git a/dts/arm/nordic/nrf54l15_cpuapp.dtsi b/dts/arm/nordic/nrf54l15_cpuapp.dtsi index 458d5a2e12acb0..59ffca714dd65f 100644 --- a/dts/arm/nordic/nrf54l15_cpuapp.dtsi +++ b/dts/arm/nordic/nrf54l15_cpuapp.dtsi @@ -5,84 +5,4 @@ */ #include - -cpu: &cpuapp {}; -systick: &cpuapp_systick {}; -nvic: &cpuapp_nvic {}; - -/delete-node/ &cpuflpr; -/delete-node/ &cpuflpr_rram; -/delete-node/ &cpuflpr_sram; -/delete-node/ &cpuflpr_clic; - -/ { - chosen { - zephyr,bt-hci = &bt_hci_controller; - }; - - soc { - compatible = "simple-bus"; - interrupt-parent = <&cpuapp_nvic>; - ranges; - }; - - psa_rng: psa-rng { - compatible = "zephyr,psa-crypto-rng"; - status = "disabled"; - }; -}; - -&bt_hci_controller { - status = "okay"; -}; - -&cpuflpr_vpr { - cpuapp_vevif_rx: mailbox@1 { - compatible = "nordic,nrf-vevif-event-rx"; - reg = <0x0 0x1000>; - status = "disabled"; - interrupts = <76 NRF_DEFAULT_IRQ_PRIORITY>; - #mbox-cells = <1>; - nordic,events = <1>; - nordic,events-mask = <0x00100000>; - }; - - cpuapp_vevif_tx: mailbox@0 { - compatible = "nordic,nrf-vevif-task-tx"; - reg = <0x0 0x1000>; - #mbox-cells = <1>; - nordic,tasks = <7>; - nordic,tasks-mask = <0x007f0000>; - status = "disabled"; - }; -}; - -&cpuapp_ppb { - compatible = "simple-bus"; - ranges; -}; - -&grtc { -#ifdef USE_NON_SECURE_ADDRESS_MAP - interrupts = <227 NRF_DEFAULT_IRQ_PRIORITY>, -#else - interrupts = <228 NRF_DEFAULT_IRQ_PRIORITY>, -#endif - <229 NRF_DEFAULT_IRQ_PRIORITY>; /* reserved for Zero Latency IRQs */ -}; - -&gpiote20 { -#ifdef USE_NON_SECURE_ADDRESS_MAP - interrupts = <218 NRF_DEFAULT_IRQ_PRIORITY>; -#else - interrupts = <219 NRF_DEFAULT_IRQ_PRIORITY>; -#endif -}; - -&gpiote30 { -#ifdef USE_NON_SECURE_ADDRESS_MAP - interrupts = <268 NRF_DEFAULT_IRQ_PRIORITY>; -#else - interrupts = <269 NRF_DEFAULT_IRQ_PRIORITY>; -#endif -}; +#include "nrf54l_05_10_15_cpuapp.dtsi" diff --git a/dts/arm/nordic/nrf54l_05_10_15_cpuapp.dtsi b/dts/arm/nordic/nrf54l_05_10_15_cpuapp.dtsi new file mode 100644 index 00000000000000..33b0d2cd4536a6 --- /dev/null +++ b/dts/arm/nordic/nrf54l_05_10_15_cpuapp.dtsi @@ -0,0 +1,86 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +cpu: &cpuapp {}; +systick: &cpuapp_systick {}; +nvic: &cpuapp_nvic {}; + +/delete-node/ &cpuflpr; +/delete-node/ &cpuflpr_rram; +/delete-node/ &cpuflpr_sram; +/delete-node/ &cpuflpr_clic; + +/ { + chosen { + zephyr,bt-hci = &bt_hci_controller; + }; + + soc { + compatible = "simple-bus"; + interrupt-parent = <&cpuapp_nvic>; + ranges; + }; + + psa_rng: psa-rng { + compatible = "zephyr,psa-crypto-rng"; + status = "disabled"; + }; +}; + +&bt_hci_controller { + status = "okay"; +}; + +&cpuflpr_vpr { + cpuapp_vevif_rx: mailbox@1 { + compatible = "nordic,nrf-vevif-event-rx"; + reg = <0x0 0x1000>; + status = "disabled"; + interrupts = <76 NRF_DEFAULT_IRQ_PRIORITY>; + #mbox-cells = <1>; + nordic,events = <1>; + nordic,events-mask = <0x00100000>; + }; + + cpuapp_vevif_tx: mailbox@0 { + compatible = "nordic,nrf-vevif-task-tx"; + reg = <0x0 0x1000>; + #mbox-cells = <1>; + nordic,tasks = <7>; + nordic,tasks-mask = <0x007f0000>; + status = "disabled"; + }; +}; + +&cpuapp_ppb { + compatible = "simple-bus"; + ranges; +}; + +&grtc { +#ifdef USE_NON_SECURE_ADDRESS_MAP + interrupts = <227 NRF_DEFAULT_IRQ_PRIORITY>, +#else + interrupts = <228 NRF_DEFAULT_IRQ_PRIORITY>, +#endif + <229 NRF_DEFAULT_IRQ_PRIORITY>; /* reserved for Zero Latency IRQs */ +}; + +&gpiote20 { +#ifdef USE_NON_SECURE_ADDRESS_MAP + interrupts = <218 NRF_DEFAULT_IRQ_PRIORITY>; +#else + interrupts = <219 NRF_DEFAULT_IRQ_PRIORITY>; +#endif +}; + +&gpiote30 { +#ifdef USE_NON_SECURE_ADDRESS_MAP + interrupts = <268 NRF_DEFAULT_IRQ_PRIORITY>; +#else + interrupts = <269 NRF_DEFAULT_IRQ_PRIORITY>; +#endif +}; diff --git a/dts/common/nordic/nrf54l05.dtsi b/dts/common/nordic/nrf54l05.dtsi new file mode 100644 index 00000000000000..747fea0c549839 --- /dev/null +++ b/dts/common/nordic/nrf54l05.dtsi @@ -0,0 +1,39 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "nrf54l_05_10_15.dtsi" + +&cpuapp_sram { + reg = <0x20000000 DT_SIZE_K(72)>; + ranges = <0x0 0x20000000 DT_SIZE_K(72)>; +}; + +/* 72 + 24 = 96KB */ +/ { + soc { + cpuflpr_sram: memory@20012000 { + compatible = "mmio-sram"; + reg = <0x20012000 DT_SIZE_K(24)>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x20012000 DT_SIZE_K(24)>; + }; + }; +}; + +&cpuapp_rram { + reg = <0x0 DT_SIZE_K(470)>; +}; + +/* 470 + 30 = 500KB */ +&rram_controller { + cpuflpr_rram: rram@75800 { + compatible = "soc-nv-flash"; + reg = <0x75800 DT_SIZE_K(30)>; + erase-block-size = <4096>; + write-block-size = <16>; + }; +}; diff --git a/dts/common/nordic/nrf54l10.dtsi b/dts/common/nordic/nrf54l10.dtsi new file mode 100644 index 00000000000000..a515fbb42f5317 --- /dev/null +++ b/dts/common/nordic/nrf54l10.dtsi @@ -0,0 +1,39 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "nrf54l_05_10_15.dtsi" + +&cpuapp_sram { + reg = <0x20000000 DT_SIZE_K(144)>; + ranges = <0x0 0x20000000 DT_SIZE_K(144)>; +}; + +/* 144 + 48 = 192KB */ +/ { + soc { + cpuflpr_sram: memory@20024000 { + compatible = "mmio-sram"; + reg = <0x20024000 DT_SIZE_K(48)>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x20024000 DT_SIZE_K(48)>; + }; + }; +}; + +&cpuapp_rram { + reg = <0x0 DT_SIZE_K(960)>; +}; + +/* 960 + 62 = 1022KB */ +&rram_controller { + cpuflpr_rram: rram@f0000 { + compatible = "soc-nv-flash"; + reg = <0xf0000 DT_SIZE_K(62)>; + erase-block-size = <4096>; + write-block-size = <16>; + }; +}; diff --git a/dts/common/nordic/nrf54l15.dtsi b/dts/common/nordic/nrf54l15.dtsi index 5a49efd468d336..56c97ae87acfc4 100644 --- a/dts/common/nordic/nrf54l15.dtsi +++ b/dts/common/nordic/nrf54l15.dtsi @@ -4,748 +4,36 @@ * SPDX-License-Identifier: Apache-2.0 */ -#include -#include -#include -#include +#include "nrf54l_05_10_15.dtsi" -/delete-node/ &sw_pwm; - -/* Domain IDs. Can be used to specify channel links in IPCT nodes. */ -#define NRF_DOMAIN_ID_APPLICATION 0 -#define NRF_DOMAIN_ID_FLPR 1 +&cpuapp_sram { + reg = <0x20000000 DT_SIZE_K(188)>; + ranges = <0x0 0x20000000 DT_SIZE_K(188)>; +}; +/* 188 + 68 = 256KB */ / { - #address-cells = <1>; - #size-cells = <1>; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpuapp: cpu@0 { - compatible = "arm,cortex-m33f"; - reg = <0>; - device_type = "cpu"; - clock-frequency = ; - #address-cells = <1>; - #size-cells = <1>; - itm: itm@e0000000 { - compatible = "arm,armv8m-itm"; - reg = <0xe0000000 0x1000>; - swo-ref-frequency = ; - }; - }; - - cpuflpr: cpu@1 { - compatible = "nordic,vpr"; - reg = <1>; - device_type = "cpu"; - clock-frequency = ; - riscv,isa = "rv32emc"; - nordic,bus-width = <32>; - }; - }; - - clocks { - lfxo: lfxo { - compatible = "nordic,nrf-lfxo"; - #clock-cells = <0>; - clock-frequency = <32768>; - }; - - hfxo: hfxo { - compatible = "nordic,nrf-hfxo"; - #clock-cells = <0>; - clock-frequency = ; - }; - }; - soc { - #address-cells = <1>; - #size-cells = <1>; - -#ifdef USE_NON_SECURE_ADDRESS_MAP - /* intentionally empty because UICR is hardware fixed to Secure */ -#else - uicr: uicr@ffd000 { - compatible = "nordic,nrf-uicr"; - reg = <0xffd000 0x1000>; - }; -#endif - ficr: ficr@ffc000 { - compatible = "nordic,nrf-ficr"; - reg = <0xffc000 0x1000>; - #nordic,ficr-cells = <1>; - }; - - cpuapp_sram: memory@20000000 { - compatible = "mmio-sram"; - reg = <0x20000000 DT_SIZE_K(188)>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x20000000 0x2f000>; - }; - cpuflpr_sram: memory@2002f000 { compatible = "mmio-sram"; reg = <0x2002f000 DT_SIZE_K(68)>; #address-cells = <1>; #size-cells = <1>; - ranges = <0x0 0x2002f000 0x11000>; + ranges = <0x0 0x2002f000 DT_SIZE_K(68)>; }; + }; +}; -#ifdef USE_NON_SECURE_ADDRESS_MAP - global_peripherals: peripheral@40000000 { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x40000000 0x10000000>; -#else - global_peripherals: peripheral@50000000 { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x50000000 0x10000000>; -#endif - - dppic00: dppic@42000 { - compatible = "nordic,nrf-dppic"; - reg = <0x42000 0x808>; - status = "disabled"; - }; - - ppib00: ppib@43000 { - compatible = "nordic,nrf-ppib"; - reg = <0x43000 0x1000>; - status = "disabled"; - }; - - ppib01: ppib@44000 { - compatible = "nordic,nrf-ppib"; - reg = <0x44000 0x1000>; - status = "disabled"; - }; - - spi00: spi@4a000 { - /* - * This spi node can be either SPIM or SPIS, - * for the user to pick: - * compatible = "nordic,nrf-spim" or - * "nordic,nrf-spis". - */ - compatible = "nordic,nrf-spim"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x4a000 0x1000>; - interrupts = <74 NRF_DEFAULT_IRQ_PRIORITY>; - max-frequency = ; - easydma-maxcnt-bits = <16>; - rx-delay-supported; - rx-delay = <1>; - status = "disabled"; - }; - - uart00: uart@4a000 { - compatible = "nordic,nrf-uarte"; - reg = <0x4a000 0x1000>; - interrupts = <74 NRF_DEFAULT_IRQ_PRIORITY>; - status = "disabled"; - endtx-stoptx-supported; - frame-timeout-supported; - }; - - cpuflpr_vpr: vpr@4c000 { - compatible = "nordic,nrf-vpr-coprocessor"; - reg = <0x4c000 0x1000>; - ranges = <0x0 0x4c000 0x1000>; - #address-cells = <1>; - #size-cells = <1>; - status = "disabled"; - - cpuflpr_clic: interrupt-controller@f0000000 { - compatible = "nordic,nrf-clic"; - reg = <0xf0000000 0x1780>; - interrupt-controller; - #interrupt-cells = <2>; - #address-cells = <1>; - status = "disabled"; - }; - }; - - gpio2: gpio@50400 { - compatible = "nordic,nrf-gpio"; - gpio-controller; - reg = <0x50400 0x300>; - #gpio-cells = <2>; - ngpios = <11>; - status = "disabled"; - port = <2>; - }; - - timer00: timer@55000 { - compatible = "nordic,nrf-timer"; - status = "disabled"; - reg = <0x55000 0x1000>; - cc-num = <6>; - max-bit-width = <32>; - interrupts = <85 NRF_DEFAULT_IRQ_PRIORITY>; - max-frequency = ; - prescaler = <0>; - }; - - dppic10: dppic@82000 { - compatible = "nordic,nrf-dppic"; - reg = <0x82000 0x808>; - status = "disabled"; - }; - - ppib10: ppib@83000 { - compatible = "nordic,nrf-ppib"; - reg = <0x83000 0x1000>; - status = "disabled"; - }; - - ppib11: ppib@84000 { - compatible = "nordic,nrf-ppib"; - reg = <0x84000 0x1000>; - status = "disabled"; - }; - - timer10: timer@85000 { - compatible = "nordic,nrf-timer"; - status = "disabled"; - reg = <0x85000 0x1000>; - cc-num = <8>; - max-bit-width = <32>; - interrupts = <133 NRF_DEFAULT_IRQ_PRIORITY>; - max-frequency = ; - prescaler = <0>; - }; - - egu10: egu@87000 { - compatible = "nordic,nrf-egu"; - reg = <0x87000 0x1000>; - interrupts = <135 NRF_DEFAULT_IRQ_PRIORITY>; - status = "disabled"; - }; - - radio: radio@8a000 { - compatible = "nordic,nrf-radio"; - reg = <0x8a000 0x1000>; - interrupts = <138 NRF_DEFAULT_IRQ_PRIORITY>; - status = "disabled"; - dfe-supported; - ieee802154-supported; - ble-2mbps-supported; - ble-coded-phy-supported; - cs-supported; - - ieee802154: ieee802154 { - compatible = "nordic,nrf-ieee802154"; - status = "disabled"; - }; - - /* Note: In the nRF Connect SDK the SoftDevice Controller - * is added and set as the default Bluetooth Controller. - */ - bt_hci_controller: bt_hci_controller { - compatible = "zephyr,bt-hci-ll-sw-split"; - status = "disabled"; - }; - }; - - dppic20: dppic@c2000 { - compatible = "nordic,nrf-dppic"; - reg = <0xc2000 0x808>; - status = "disabled"; - }; - - ppib20: ppib@c3000 { - compatible = "nordic,nrf-ppib"; - reg = <0xc3000 0x1000>; - status = "disabled"; - }; - - ppib21: ppib@c4000 { - compatible = "nordic,nrf-ppib"; - reg = <0xc4000 0x1000>; - status = "disabled"; - }; - - ppib22: ppib@c5000 { - compatible = "nordic,nrf-ppib"; - reg = <0xc5000 0x1000>; - status = "disabled"; - }; - - i2c20: i2c@c6000 { - compatible = "nordic,nrf-twim"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0xc6000 0x1000>; - interrupts = <198 NRF_DEFAULT_IRQ_PRIORITY>; - easydma-maxcnt-bits = <16>; - status = "disabled"; - zephyr,pm-device-runtime-auto; - }; - - spi20: spi@c6000 { - /* - * This spi node can be either SPIM or SPIS, - * for the user to pick: - * compatible = "nordic,nrf-spim" or - * "nordic,nrf-spis". - */ - compatible = "nordic,nrf-spim"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0xc6000 0x1000>; - interrupts = <198 NRF_DEFAULT_IRQ_PRIORITY>; - max-frequency = ; - easydma-maxcnt-bits = <16>; - rx-delay-supported; - rx-delay = <1>; - status = "disabled"; - }; - - uart20: uart@c6000 { - compatible = "nordic,nrf-uarte"; - reg = <0xc6000 0x1000>; - interrupts = <198 NRF_DEFAULT_IRQ_PRIORITY>; - status = "disabled"; - endtx-stoptx-supported; - frame-timeout-supported; - }; - - i2c21: i2c@c7000 { - compatible = "nordic,nrf-twim"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0xc7000 0x1000>; - interrupts = <199 NRF_DEFAULT_IRQ_PRIORITY>; - easydma-maxcnt-bits = <16>; - status = "disabled"; - zephyr,pm-device-runtime-auto; - }; - - spi21: spi@c7000 { - /* - * This spi node can be either SPIM or SPIS, - * for the user to pick: - * compatible = "nordic,nrf-spim" or - * "nordic,nrf-spis". - */ - compatible = "nordic,nrf-spim"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0xc7000 0x1000>; - interrupts = <199 NRF_DEFAULT_IRQ_PRIORITY>; - max-frequency = ; - easydma-maxcnt-bits = <16>; - rx-delay-supported; - rx-delay = <1>; - status = "disabled"; - }; - - uart21: uart@c7000 { - compatible = "nordic,nrf-uarte"; - reg = <0xc7000 0x1000>; - interrupts = <199 NRF_DEFAULT_IRQ_PRIORITY>; - status = "disabled"; - endtx-stoptx-supported; - frame-timeout-supported; - }; - - i2c22: i2c@c8000 { - compatible = "nordic,nrf-twim"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0xc8000 0x1000>; - interrupts = <200 NRF_DEFAULT_IRQ_PRIORITY>; - easydma-maxcnt-bits = <16>; - status = "disabled"; - zephyr,pm-device-runtime-auto; - }; - - spi22: spi@c8000 { - /* - * This spi node can be either SPIM or SPIS, - * for the user to pick: - * compatible = "nordic,nrf-spim" or - * "nordic,nrf-spis". - */ - compatible = "nordic,nrf-spim"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0xc8000 0x1000>; - interrupts = <200 NRF_DEFAULT_IRQ_PRIORITY>; - max-frequency = ; - easydma-maxcnt-bits = <16>; - rx-delay-supported; - rx-delay = <1>; - status = "disabled"; - }; - - uart22: uart@c8000 { - compatible = "nordic,nrf-uarte"; - reg = <0xc8000 0x1000>; - interrupts = <200 NRF_DEFAULT_IRQ_PRIORITY>; - status = "disabled"; - endtx-stoptx-supported; - frame-timeout-supported; - }; - - egu20: egu@c9000 { - compatible = "nordic,nrf-egu"; - reg = <0xc9000 0x1000>; - interrupts = <201 NRF_DEFAULT_IRQ_PRIORITY>; - status = "disabled"; - }; - - timer20: timer@ca000 { - compatible = "nordic,nrf-timer"; - status = "disabled"; - reg = <0xca000 0x1000>; - cc-num = <6>; - max-bit-width = <32>; - interrupts = <202 NRF_DEFAULT_IRQ_PRIORITY>; - prescaler = <0>; - }; - - timer21: timer@cb000 { - compatible = "nordic,nrf-timer"; - status = "disabled"; - reg = <0xcb000 0x1000>; - cc-num = <6>; - max-bit-width = <32>; - interrupts = <203 NRF_DEFAULT_IRQ_PRIORITY>; - prescaler = <0>; - }; - - timer22: timer@cc000 { - compatible = "nordic,nrf-timer"; - status = "disabled"; - reg = <0xcc000 0x1000>; - cc-num = <6>; - max-bit-width = <32>; - interrupts = <204 NRF_DEFAULT_IRQ_PRIORITY>; - prescaler = <0>; - }; - - timer23: timer@cd000 { - compatible = "nordic,nrf-timer"; - status = "disabled"; - reg = <0xcd000 0x1000>; - cc-num = <6>; - max-bit-width = <32>; - interrupts = <205 NRF_DEFAULT_IRQ_PRIORITY>; - prescaler = <0>; - }; - - timer24: timer@ce000 { - compatible = "nordic,nrf-timer"; - status = "disabled"; - reg = <0xce000 0x1000>; - cc-num = <6>; - max-bit-width = <32>; - interrupts = <206 NRF_DEFAULT_IRQ_PRIORITY>; - prescaler = <0>; - }; - - pdm20: pdm@d0000 { - compatible = "nordic,nrf-pdm"; - status = "disabled"; - reg = <0xd0000 0x1000>; - interrupts = <208 NRF_DEFAULT_IRQ_PRIORITY>; - }; - - pdm21: pdm@d1000 { - compatible = "nordic,nrf-pdm"; - status = "disabled"; - reg = <0xd1000 0x1000>; - interrupts = <209 NRF_DEFAULT_IRQ_PRIORITY>; - }; - - pwm20: pwm@d2000 { - compatible = "nordic,nrf-pwm"; - status = "disabled"; - reg = <0xd2000 0x1000>; - interrupts = <210 NRF_DEFAULT_IRQ_PRIORITY>; - #pwm-cells = <3>; - }; - - pwm21: pwm@d3000 { - compatible = "nordic,nrf-pwm"; - status = "disabled"; - reg = <0xd3000 0x1000>; - interrupts = <211 NRF_DEFAULT_IRQ_PRIORITY>; - #pwm-cells = <3>; - }; - - pwm22: pwm@d4000 { - compatible = "nordic,nrf-pwm"; - status = "disabled"; - reg = <0xd4000 0x1000>; - interrupts = <212 NRF_DEFAULT_IRQ_PRIORITY>; - #pwm-cells = <3>; - }; - - adc: adc@d5000 { - compatible = "nordic,nrf-saadc"; - reg = <0xd5000 0x1000>; - interrupts = <213 NRF_DEFAULT_IRQ_PRIORITY>; - status = "disabled"; - #io-channel-cells = <1>; - }; - - nfct: nfct@d6000 { - compatible = "nordic,nrf-nfct"; - reg = <0xd6000 0x1000>; - interrupts = <214 NRF_DEFAULT_IRQ_PRIORITY>; - status = "disabled"; - }; - - temp: temp@d7000 { - compatible = "nordic,nrf-temp"; - reg = <0xd7000 0x1000>; - interrupts = <215 NRF_DEFAULT_IRQ_PRIORITY>; - status = "disabled"; - }; - - gpio1: gpio@d8200 { - compatible = "nordic,nrf-gpio"; - gpio-controller; - reg = <0xd8200 0x300>; - #gpio-cells = <2>; - ngpios = <16>; - status = "disabled"; - port = <1>; - gpiote-instance = <&gpiote20>; - }; - - gpiote20: gpiote@da000 { - compatible = "nordic,nrf-gpiote"; - reg = <0xda000 0x1000>; - status = "disabled"; - instance = <20>; - }; - - i2s20: i2s@dd000 { - compatible = "nordic,nrf-i2s"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0xdd000 0x1000>; - interrupts = <221 NRF_DEFAULT_IRQ_PRIORITY>; - status = "disabled"; - }; - - qdec20: qdec@e0000 { - compatible = "nordic,nrf-qdec"; - reg = <0xe0000 0x1000>; - interrupts = <224 NRF_DEFAULT_IRQ_PRIORITY>; - status = "disabled"; - }; - - qdec21: qdec@e1000 { - compatible = "nordic,nrf-qdec"; - reg = <0xe1000 0x1000>; - interrupts = <225 NRF_DEFAULT_IRQ_PRIORITY>; - status = "disabled"; - }; - - grtc: grtc@e2000 { - compatible = "nordic,nrf-grtc"; - reg = <0xe2000 0x1000>; - cc-num = <12>; - status = "disabled"; - }; - - dppic30: dppic@102000 { - compatible = "nordic,nrf-dppic"; - reg = <0x102000 0x808>; - status = "disabled"; - }; - - ppib30: ppib@103000 { - compatible = "nordic,nrf-ppib"; - reg = <0x103000 0x1000>; - status = "disabled"; - }; - - i2c30: i2c@104000 { - compatible = "nordic,nrf-twim"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x104000 0x1000>; - interrupts = <260 NRF_DEFAULT_IRQ_PRIORITY>; - easydma-maxcnt-bits = <16>; - status = "disabled"; - zephyr,pm-device-runtime-auto; - }; - - spi30: spi@104000 { - /* - * This spi node can be either SPIM or SPIS, - * for the user to pick: - * compatible = "nordic,nrf-spim" or - * "nordic,nrf-spis". - */ - compatible = "nordic,nrf-spim"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x104000 0x1000>; - interrupts = <260 NRF_DEFAULT_IRQ_PRIORITY>; - max-frequency = ; - easydma-maxcnt-bits = <16>; - rx-delay-supported; - rx-delay = <1>; - status = "disabled"; - }; - - uart30: uart@104000 { - compatible = "nordic,nrf-uarte"; - reg = <0x104000 0x1000>; - interrupts = <260 NRF_DEFAULT_IRQ_PRIORITY>; - status = "disabled"; - endtx-stoptx-supported; - frame-timeout-supported; - }; - - comp: comparator@106000 { - /* - * Use compatible "nordic,nrf-comp" to configure as COMP - * Use compatible "nordic,nrf-lpcomp" to configure as LPCOMP - */ - compatible = "nordic,nrf-comp"; - reg = <0x106000 0x1000>; - status = "disabled"; - interrupts = <262 NRF_DEFAULT_IRQ_PRIORITY>; - }; - -#ifdef USE_NON_SECURE_ADDRESS_MAP - /* intentionally empty because WDT30 is hardware fixed to Secure */ -#else - wdt30: watchdog@108000 { - compatible = "nordic,nrf-wdt"; - reg = <0x108000 0x620>; - interrupts = <264 NRF_DEFAULT_IRQ_PRIORITY>; - status = "disabled"; - }; -#endif - - wdt31: watchdog@109000 { - compatible = "nordic,nrf-wdt"; - reg = <0x109000 0x620>; - interrupts = <265 NRF_DEFAULT_IRQ_PRIORITY>; - status = "disabled"; - }; - - gpio0: gpio@10a000 { - compatible = "nordic,nrf-gpio"; - gpio-controller; - reg = <0x10a000 0x300>; - #gpio-cells = <2>; - ngpios = <5>; - status = "disabled"; - port = <0>; - gpiote-instance = <&gpiote30>; - }; - - gpiote30: gpiote@10c000 { - compatible = "nordic,nrf-gpiote"; - reg = <0x10c000 0x1000>; - status = "disabled"; - instance = <30>; - }; - - clock: clock@10e000 { - compatible = "nordic,nrf-clock"; - reg = <0x10e000 0x1000>; - interrupts = <270 NRF_DEFAULT_IRQ_PRIORITY>; - status = "disabled"; - }; - - power: power@10e000 { - compatible = "nordic,nrf-power"; - reg = <0x10e000 0x1000>; - ranges = <0x0 0x10e000 0x1000>; - interrupts = <270 NRF_DEFAULT_IRQ_PRIORITY>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <1>; - - gpregret1: gpregret1@51c { - #address-cells = <1>; - #size-cells = <1>; - compatible = "nordic,nrf-gpregret"; - reg = <0x51c 0x1>; - status = "disabled"; - }; - - gpregret2: gpregret2@520 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "nordic,nrf-gpregret"; - reg = <0x520 0x1>; - status = "disabled"; - }; - }; - - regulators: regulator@120000 { - compatible = "nordic,nrf54l-regulators"; - reg = <0x120000 0x1000>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <1>; - - vregmain: regulator@120600 { - compatible = "nordic,nrf5x-regulator"; - reg = <0x120600 0x1>; - status = "disabled"; - regulator-name = "VREGMAIN"; - regulator-initial-mode = ; - }; - }; - }; - - rram_controller: rram-controller@5004b000 { - compatible = "nordic,rram-controller"; - reg = <0x5004b000 0x1000>; - #address-cells = <1>; - #size-cells = <1>; - interrupts = <75 NRF_DEFAULT_IRQ_PRIORITY>; - - cpuapp_rram: rram@0 { - compatible = "soc-nv-flash"; - reg = <0x0 DT_SIZE_K(1428)>; - erase-block-size = <4096>; - write-block-size = <16>; - }; - cpuflpr_rram: rram@165000 { - compatible = "soc-nv-flash"; - reg = <0x165000 DT_SIZE_K(96)>; - erase-block-size = <4096>; - write-block-size = <16>; - }; - }; - - cpuapp_ppb: cpuapp-ppb-bus { - #address-cells = <1>; - #size-cells = <1>; - - cpuapp_nvic: interrupt-controller@e000e100 { - #address-cells = <1>; - compatible = "arm,v8m-nvic"; - reg = <0xe000e100 0xc00>; - arm,num-irq-priority-bits = <3>; - interrupt-controller; - #interrupt-cells = <2>; - }; +&cpuapp_rram { + reg = <0x0 DT_SIZE_K(1428)>; +}; - cpuapp_systick: timer@e000e010 { - compatible = "arm,armv8m-systick"; - reg = <0xe000e010 0x10>; - status = "disabled"; - }; - }; +/* 1428 + 96 = 1524KB */ +&rram_controller { + cpuflpr_rram: rram@165000 { + compatible = "soc-nv-flash"; + reg = <0x165000 DT_SIZE_K(96)>; + erase-block-size = <4096>; + write-block-size = <16>; }; }; diff --git a/dts/common/nordic/nrf54l_05_10_15.dtsi b/dts/common/nordic/nrf54l_05_10_15.dtsi new file mode 100644 index 00000000000000..04fae0272bc89f --- /dev/null +++ b/dts/common/nordic/nrf54l_05_10_15.dtsi @@ -0,0 +1,734 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include +#include + +/delete-node/ &sw_pwm; + +/* Domain IDs. Can be used to specify channel links in IPCT nodes. */ +#define NRF_DOMAIN_ID_APPLICATION 0 +#define NRF_DOMAIN_ID_FLPR 1 + +/ { + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpuapp: cpu@0 { + compatible = "arm,cortex-m33f"; + reg = <0>; + device_type = "cpu"; + clock-frequency = ; + #address-cells = <1>; + #size-cells = <1>; + itm: itm@e0000000 { + compatible = "arm,armv8m-itm"; + reg = <0xe0000000 0x1000>; + swo-ref-frequency = ; + }; + }; + + cpuflpr: cpu@1 { + compatible = "nordic,vpr"; + reg = <1>; + device_type = "cpu"; + clock-frequency = ; + riscv,isa = "rv32emc"; + nordic,bus-width = <32>; + }; + }; + + clocks { + lfxo: lfxo { + compatible = "nordic,nrf-lfxo"; + #clock-cells = <0>; + clock-frequency = <32768>; + }; + + hfxo: hfxo { + compatible = "nordic,nrf-hfxo"; + #clock-cells = <0>; + clock-frequency = ; + }; + }; + + soc { + #address-cells = <1>; + #size-cells = <1>; + +#ifdef USE_NON_SECURE_ADDRESS_MAP + /* intentionally empty because UICR is hardware fixed to Secure */ +#else + uicr: uicr@ffd000 { + compatible = "nordic,nrf-uicr"; + reg = <0xffd000 0x1000>; + }; +#endif + ficr: ficr@ffc000 { + compatible = "nordic,nrf-ficr"; + reg = <0xffc000 0x1000>; + #nordic,ficr-cells = <1>; + }; + + cpuapp_sram: memory@20000000 { + compatible = "mmio-sram"; + #address-cells = <1>; + #size-cells = <1>; + }; + +#ifdef USE_NON_SECURE_ADDRESS_MAP + global_peripherals: peripheral@40000000 { + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x40000000 0x10000000>; +#else + global_peripherals: peripheral@50000000 { + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x50000000 0x10000000>; +#endif + + dppic00: dppic@42000 { + compatible = "nordic,nrf-dppic"; + reg = <0x42000 0x808>; + status = "disabled"; + }; + + ppib00: ppib@43000 { + compatible = "nordic,nrf-ppib"; + reg = <0x43000 0x1000>; + status = "disabled"; + }; + + ppib01: ppib@44000 { + compatible = "nordic,nrf-ppib"; + reg = <0x44000 0x1000>; + status = "disabled"; + }; + + spi00: spi@4a000 { + /* + * This spi node can be either SPIM or SPIS, + * for the user to pick: + * compatible = "nordic,nrf-spim" or + * "nordic,nrf-spis". + */ + compatible = "nordic,nrf-spim"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x4a000 0x1000>; + interrupts = <74 NRF_DEFAULT_IRQ_PRIORITY>; + max-frequency = ; + easydma-maxcnt-bits = <16>; + rx-delay-supported; + rx-delay = <1>; + status = "disabled"; + }; + + uart00: uart@4a000 { + compatible = "nordic,nrf-uarte"; + reg = <0x4a000 0x1000>; + interrupts = <74 NRF_DEFAULT_IRQ_PRIORITY>; + status = "disabled"; + endtx-stoptx-supported; + frame-timeout-supported; + }; + + cpuflpr_vpr: vpr@4c000 { + compatible = "nordic,nrf-vpr-coprocessor"; + reg = <0x4c000 0x1000>; + ranges = <0x0 0x4c000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + status = "disabled"; + + cpuflpr_clic: interrupt-controller@f0000000 { + compatible = "nordic,nrf-clic"; + reg = <0xf0000000 0x1780>; + interrupt-controller; + #interrupt-cells = <2>; + #address-cells = <1>; + status = "disabled"; + }; + }; + + gpio2: gpio@50400 { + compatible = "nordic,nrf-gpio"; + gpio-controller; + reg = <0x50400 0x300>; + #gpio-cells = <2>; + ngpios = <11>; + status = "disabled"; + port = <2>; + }; + + timer00: timer@55000 { + compatible = "nordic,nrf-timer"; + status = "disabled"; + reg = <0x55000 0x1000>; + cc-num = <6>; + max-bit-width = <32>; + interrupts = <85 NRF_DEFAULT_IRQ_PRIORITY>; + max-frequency = ; + prescaler = <0>; + }; + + dppic10: dppic@82000 { + compatible = "nordic,nrf-dppic"; + reg = <0x82000 0x808>; + status = "disabled"; + }; + + ppib10: ppib@83000 { + compatible = "nordic,nrf-ppib"; + reg = <0x83000 0x1000>; + status = "disabled"; + }; + + ppib11: ppib@84000 { + compatible = "nordic,nrf-ppib"; + reg = <0x84000 0x1000>; + status = "disabled"; + }; + + timer10: timer@85000 { + compatible = "nordic,nrf-timer"; + status = "disabled"; + reg = <0x85000 0x1000>; + cc-num = <8>; + max-bit-width = <32>; + interrupts = <133 NRF_DEFAULT_IRQ_PRIORITY>; + max-frequency = ; + prescaler = <0>; + }; + + egu10: egu@87000 { + compatible = "nordic,nrf-egu"; + reg = <0x87000 0x1000>; + interrupts = <135 NRF_DEFAULT_IRQ_PRIORITY>; + status = "disabled"; + }; + + radio: radio@8a000 { + compatible = "nordic,nrf-radio"; + reg = <0x8a000 0x1000>; + interrupts = <138 NRF_DEFAULT_IRQ_PRIORITY>; + status = "disabled"; + dfe-supported; + ieee802154-supported; + ble-2mbps-supported; + ble-coded-phy-supported; + cs-supported; + + ieee802154: ieee802154 { + compatible = "nordic,nrf-ieee802154"; + status = "disabled"; + }; + + /* Note: In the nRF Connect SDK the SoftDevice Controller + * is added and set as the default Bluetooth Controller. + */ + bt_hci_controller: bt_hci_controller { + compatible = "zephyr,bt-hci-ll-sw-split"; + status = "disabled"; + }; + }; + + dppic20: dppic@c2000 { + compatible = "nordic,nrf-dppic"; + reg = <0xc2000 0x808>; + status = "disabled"; + }; + + ppib20: ppib@c3000 { + compatible = "nordic,nrf-ppib"; + reg = <0xc3000 0x1000>; + status = "disabled"; + }; + + ppib21: ppib@c4000 { + compatible = "nordic,nrf-ppib"; + reg = <0xc4000 0x1000>; + status = "disabled"; + }; + + ppib22: ppib@c5000 { + compatible = "nordic,nrf-ppib"; + reg = <0xc5000 0x1000>; + status = "disabled"; + }; + + i2c20: i2c@c6000 { + compatible = "nordic,nrf-twim"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xc6000 0x1000>; + interrupts = <198 NRF_DEFAULT_IRQ_PRIORITY>; + easydma-maxcnt-bits = <16>; + status = "disabled"; + zephyr,pm-device-runtime-auto; + }; + + spi20: spi@c6000 { + /* + * This spi node can be either SPIM or SPIS, + * for the user to pick: + * compatible = "nordic,nrf-spim" or + * "nordic,nrf-spis". + */ + compatible = "nordic,nrf-spim"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xc6000 0x1000>; + interrupts = <198 NRF_DEFAULT_IRQ_PRIORITY>; + max-frequency = ; + easydma-maxcnt-bits = <16>; + rx-delay-supported; + rx-delay = <1>; + status = "disabled"; + }; + + uart20: uart@c6000 { + compatible = "nordic,nrf-uarte"; + reg = <0xc6000 0x1000>; + interrupts = <198 NRF_DEFAULT_IRQ_PRIORITY>; + status = "disabled"; + endtx-stoptx-supported; + frame-timeout-supported; + }; + + i2c21: i2c@c7000 { + compatible = "nordic,nrf-twim"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xc7000 0x1000>; + interrupts = <199 NRF_DEFAULT_IRQ_PRIORITY>; + easydma-maxcnt-bits = <16>; + status = "disabled"; + zephyr,pm-device-runtime-auto; + }; + + spi21: spi@c7000 { + /* + * This spi node can be either SPIM or SPIS, + * for the user to pick: + * compatible = "nordic,nrf-spim" or + * "nordic,nrf-spis". + */ + compatible = "nordic,nrf-spim"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xc7000 0x1000>; + interrupts = <199 NRF_DEFAULT_IRQ_PRIORITY>; + max-frequency = ; + easydma-maxcnt-bits = <16>; + rx-delay-supported; + rx-delay = <1>; + status = "disabled"; + }; + + uart21: uart@c7000 { + compatible = "nordic,nrf-uarte"; + reg = <0xc7000 0x1000>; + interrupts = <199 NRF_DEFAULT_IRQ_PRIORITY>; + status = "disabled"; + endtx-stoptx-supported; + frame-timeout-supported; + }; + + i2c22: i2c@c8000 { + compatible = "nordic,nrf-twim"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xc8000 0x1000>; + interrupts = <200 NRF_DEFAULT_IRQ_PRIORITY>; + easydma-maxcnt-bits = <16>; + status = "disabled"; + zephyr,pm-device-runtime-auto; + }; + + spi22: spi@c8000 { + /* + * This spi node can be either SPIM or SPIS, + * for the user to pick: + * compatible = "nordic,nrf-spim" or + * "nordic,nrf-spis". + */ + compatible = "nordic,nrf-spim"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xc8000 0x1000>; + interrupts = <200 NRF_DEFAULT_IRQ_PRIORITY>; + max-frequency = ; + easydma-maxcnt-bits = <16>; + rx-delay-supported; + rx-delay = <1>; + status = "disabled"; + }; + + uart22: uart@c8000 { + compatible = "nordic,nrf-uarte"; + reg = <0xc8000 0x1000>; + interrupts = <200 NRF_DEFAULT_IRQ_PRIORITY>; + status = "disabled"; + endtx-stoptx-supported; + frame-timeout-supported; + }; + + egu20: egu@c9000 { + compatible = "nordic,nrf-egu"; + reg = <0xc9000 0x1000>; + interrupts = <201 NRF_DEFAULT_IRQ_PRIORITY>; + status = "disabled"; + }; + + timer20: timer@ca000 { + compatible = "nordic,nrf-timer"; + status = "disabled"; + reg = <0xca000 0x1000>; + cc-num = <6>; + max-bit-width = <32>; + interrupts = <202 NRF_DEFAULT_IRQ_PRIORITY>; + prescaler = <0>; + }; + + timer21: timer@cb000 { + compatible = "nordic,nrf-timer"; + status = "disabled"; + reg = <0xcb000 0x1000>; + cc-num = <6>; + max-bit-width = <32>; + interrupts = <203 NRF_DEFAULT_IRQ_PRIORITY>; + prescaler = <0>; + }; + + timer22: timer@cc000 { + compatible = "nordic,nrf-timer"; + status = "disabled"; + reg = <0xcc000 0x1000>; + cc-num = <6>; + max-bit-width = <32>; + interrupts = <204 NRF_DEFAULT_IRQ_PRIORITY>; + prescaler = <0>; + }; + + timer23: timer@cd000 { + compatible = "nordic,nrf-timer"; + status = "disabled"; + reg = <0xcd000 0x1000>; + cc-num = <6>; + max-bit-width = <32>; + interrupts = <205 NRF_DEFAULT_IRQ_PRIORITY>; + prescaler = <0>; + }; + + timer24: timer@ce000 { + compatible = "nordic,nrf-timer"; + status = "disabled"; + reg = <0xce000 0x1000>; + cc-num = <6>; + max-bit-width = <32>; + interrupts = <206 NRF_DEFAULT_IRQ_PRIORITY>; + prescaler = <0>; + }; + + pdm20: pdm@d0000 { + compatible = "nordic,nrf-pdm"; + status = "disabled"; + reg = <0xd0000 0x1000>; + interrupts = <208 NRF_DEFAULT_IRQ_PRIORITY>; + }; + + pdm21: pdm@d1000 { + compatible = "nordic,nrf-pdm"; + status = "disabled"; + reg = <0xd1000 0x1000>; + interrupts = <209 NRF_DEFAULT_IRQ_PRIORITY>; + }; + + pwm20: pwm@d2000 { + compatible = "nordic,nrf-pwm"; + status = "disabled"; + reg = <0xd2000 0x1000>; + interrupts = <210 NRF_DEFAULT_IRQ_PRIORITY>; + #pwm-cells = <3>; + }; + + pwm21: pwm@d3000 { + compatible = "nordic,nrf-pwm"; + status = "disabled"; + reg = <0xd3000 0x1000>; + interrupts = <211 NRF_DEFAULT_IRQ_PRIORITY>; + #pwm-cells = <3>; + }; + + pwm22: pwm@d4000 { + compatible = "nordic,nrf-pwm"; + status = "disabled"; + reg = <0xd4000 0x1000>; + interrupts = <212 NRF_DEFAULT_IRQ_PRIORITY>; + #pwm-cells = <3>; + }; + + adc: adc@d5000 { + compatible = "nordic,nrf-saadc"; + reg = <0xd5000 0x1000>; + interrupts = <213 NRF_DEFAULT_IRQ_PRIORITY>; + status = "disabled"; + #io-channel-cells = <1>; + }; + + nfct: nfct@d6000 { + compatible = "nordic,nrf-nfct"; + reg = <0xd6000 0x1000>; + interrupts = <214 NRF_DEFAULT_IRQ_PRIORITY>; + status = "disabled"; + }; + + temp: temp@d7000 { + compatible = "nordic,nrf-temp"; + reg = <0xd7000 0x1000>; + interrupts = <215 NRF_DEFAULT_IRQ_PRIORITY>; + status = "disabled"; + }; + + gpio1: gpio@d8200 { + compatible = "nordic,nrf-gpio"; + gpio-controller; + reg = <0xd8200 0x300>; + #gpio-cells = <2>; + ngpios = <16>; + status = "disabled"; + port = <1>; + gpiote-instance = <&gpiote20>; + }; + + gpiote20: gpiote@da000 { + compatible = "nordic,nrf-gpiote"; + reg = <0xda000 0x1000>; + status = "disabled"; + instance = <20>; + }; + + i2s20: i2s@dd000 { + compatible = "nordic,nrf-i2s"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xdd000 0x1000>; + interrupts = <221 NRF_DEFAULT_IRQ_PRIORITY>; + status = "disabled"; + }; + + qdec20: qdec@e0000 { + compatible = "nordic,nrf-qdec"; + reg = <0xe0000 0x1000>; + interrupts = <224 NRF_DEFAULT_IRQ_PRIORITY>; + status = "disabled"; + }; + + qdec21: qdec@e1000 { + compatible = "nordic,nrf-qdec"; + reg = <0xe1000 0x1000>; + interrupts = <225 NRF_DEFAULT_IRQ_PRIORITY>; + status = "disabled"; + }; + + grtc: grtc@e2000 { + compatible = "nordic,nrf-grtc"; + reg = <0xe2000 0x1000>; + cc-num = <12>; + status = "disabled"; + }; + + dppic30: dppic@102000 { + compatible = "nordic,nrf-dppic"; + reg = <0x102000 0x808>; + status = "disabled"; + }; + + ppib30: ppib@103000 { + compatible = "nordic,nrf-ppib"; + reg = <0x103000 0x1000>; + status = "disabled"; + }; + + i2c30: i2c@104000 { + compatible = "nordic,nrf-twim"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x104000 0x1000>; + interrupts = <260 NRF_DEFAULT_IRQ_PRIORITY>; + easydma-maxcnt-bits = <16>; + status = "disabled"; + zephyr,pm-device-runtime-auto; + }; + + spi30: spi@104000 { + /* + * This spi node can be either SPIM or SPIS, + * for the user to pick: + * compatible = "nordic,nrf-spim" or + * "nordic,nrf-spis". + */ + compatible = "nordic,nrf-spim"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x104000 0x1000>; + interrupts = <260 NRF_DEFAULT_IRQ_PRIORITY>; + max-frequency = ; + easydma-maxcnt-bits = <16>; + rx-delay-supported; + rx-delay = <1>; + status = "disabled"; + }; + + uart30: uart@104000 { + compatible = "nordic,nrf-uarte"; + reg = <0x104000 0x1000>; + interrupts = <260 NRF_DEFAULT_IRQ_PRIORITY>; + status = "disabled"; + endtx-stoptx-supported; + frame-timeout-supported; + }; + + clock: clock@10e000 { + compatible = "nordic,nrf-clock"; + reg = <0x10e000 0x1000>; + interrupts = <261 NRF_DEFAULT_IRQ_PRIORITY>; + status = "disabled"; + }; + + power: power@10e000 { + compatible = "nordic,nrf-power"; + reg = <0x10e000 0x1000>; + ranges = <0x0 0x10e000 0x1000>; + interrupts = <261 NRF_DEFAULT_IRQ_PRIORITY>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <1>; + + gpregret1: gpregret1@51c { + #address-cells = <1>; + #size-cells = <1>; + compatible = "nordic,nrf-gpregret"; + reg = <0x51c 0x1>; + status = "disabled"; + }; + + gpregret2: gpregret2@520 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "nordic,nrf-gpregret"; + reg = <0x520 0x1>; + status = "disabled"; + }; + }; + + comp: comparator@106000 { + /* + * Use compatible "nordic,nrf-comp" to configure as COMP + * Use compatible "nordic,nrf-lpcomp" to configure as LPCOMP + */ + compatible = "nordic,nrf-comp"; + reg = <0x106000 0x1000>; + status = "disabled"; + interrupts = <262 NRF_DEFAULT_IRQ_PRIORITY>; + }; + +#ifdef USE_NON_SECURE_ADDRESS_MAP + /* intentionally empty because WDT30 is hardware fixed to Secure */ +#else + wdt30: watchdog@108000 { + compatible = "nordic,nrf-wdt"; + reg = <0x108000 0x620>; + interrupts = <264 NRF_DEFAULT_IRQ_PRIORITY>; + status = "disabled"; + }; +#endif + + wdt31: watchdog@109000 { + compatible = "nordic,nrf-wdt"; + reg = <0x109000 0x620>; + interrupts = <265 NRF_DEFAULT_IRQ_PRIORITY>; + status = "disabled"; + }; + + gpio0: gpio@10a000 { + compatible = "nordic,nrf-gpio"; + gpio-controller; + reg = <0x10a000 0x300>; + #gpio-cells = <2>; + ngpios = <5>; + status = "disabled"; + port = <0>; + gpiote-instance = <&gpiote30>; + }; + + gpiote30: gpiote@10c000 { + compatible = "nordic,nrf-gpiote"; + reg = <0x10c000 0x1000>; + status = "disabled"; + instance = <30>; + }; + + regulators: regulator@120000 { + compatible = "nordic,nrf54l-regulators"; + reg = <0x120000 0x1000>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <1>; + + vregmain: regulator@120600 { + compatible = "nordic,nrf5x-regulator"; + reg = <0x120600 0x1>; + status = "disabled"; + regulator-name = "VREGMAIN"; + regulator-initial-mode = ; + }; + }; + }; + + rram_controller: rram-controller@5004b000 { + compatible = "nordic,rram-controller"; + reg = <0x5004b000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + interrupts = <75 NRF_DEFAULT_IRQ_PRIORITY>; + + cpuapp_rram: rram@0 { + compatible = "soc-nv-flash"; + erase-block-size = <4096>; + write-block-size = <16>; + }; + }; + + cpuapp_ppb: cpuapp-ppb-bus { + #address-cells = <1>; + #size-cells = <1>; + + cpuapp_nvic: interrupt-controller@e000e100 { + #address-cells = <1>; + compatible = "arm,v8m-nvic"; + reg = <0xe000e100 0xc00>; + arm,num-irq-priority-bits = <3>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + cpuapp_systick: timer@e000e010 { + compatible = "arm,armv8m-systick"; + reg = <0xe000e010 0x10>; + status = "disabled"; + }; + }; + }; +}; diff --git a/dts/riscv/nordic/nrf54l05_cpuflpr.dtsi b/dts/riscv/nordic/nrf54l05_cpuflpr.dtsi new file mode 100644 index 00000000000000..d4725112a465d2 --- /dev/null +++ b/dts/riscv/nordic/nrf54l05_cpuflpr.dtsi @@ -0,0 +1,8 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include "nrf54l_05_10_15_cpuflpr.dtsi" diff --git a/dts/riscv/nordic/nrf54l10_cpuflpr.dtsi b/dts/riscv/nordic/nrf54l10_cpuflpr.dtsi new file mode 100644 index 00000000000000..cea4112d363de8 --- /dev/null +++ b/dts/riscv/nordic/nrf54l10_cpuflpr.dtsi @@ -0,0 +1,8 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include "nrf54l_05_10_15_cpuflpr.dtsi" diff --git a/dts/riscv/nordic/nrf54l15_cpuflpr.dtsi b/dts/riscv/nordic/nrf54l15_cpuflpr.dtsi index fefa43b76c03dd..4dedf1fbca5533 100644 --- a/dts/riscv/nordic/nrf54l15_cpuflpr.dtsi +++ b/dts/riscv/nordic/nrf54l15_cpuflpr.dtsi @@ -5,63 +5,4 @@ */ #include - -cpu: &cpuflpr {}; -clic: &cpuflpr_clic {}; - -/delete-node/ &cpuapp; -/delete-node/ &cpuapp_rram; -/delete-node/ &cpuapp_ppb; -/delete-node/ &cpuapp_sram; - -/ { - soc { - compatible = "simple-bus"; - interrupt-parent = <&cpuflpr_clic>; - ranges; - }; -}; - -&cpuflpr { - cpuflpr_vevif_rx: mailbox { - compatible = "nordic,nrf-vevif-task-rx"; - status = "disabled"; - interrupt-parent = <&cpuflpr_clic>; - interrupts = <16 NRF_DEFAULT_IRQ_PRIORITY>, - <17 NRF_DEFAULT_IRQ_PRIORITY>, - <18 NRF_DEFAULT_IRQ_PRIORITY>, - <19 NRF_DEFAULT_IRQ_PRIORITY>, - <20 NRF_DEFAULT_IRQ_PRIORITY>, - <21 NRF_DEFAULT_IRQ_PRIORITY>, - <22 NRF_DEFAULT_IRQ_PRIORITY>; - #mbox-cells = <1>; - nordic,tasks = <7>; - nordic,tasks-mask = <0x007f0000>; - }; -}; - -&cpuflpr_vpr { - cpuflpr_vevif_tx: mailbox { - compatible = "nordic,nrf-vevif-event-tx"; - #mbox-cells = <1>; - nordic,events = <1>; - nordic,events-mask = <0x00100000>; - status = "disabled"; - }; -}; - -&cpuflpr_clic { - status = "okay"; -}; - -&grtc { - interrupts = <226 NRF_DEFAULT_IRQ_PRIORITY>; -}; - -&gpiote20 { - interrupts = <218 NRF_DEFAULT_IRQ_PRIORITY>; -}; - -&gpiote30 { - interrupts = <268 NRF_DEFAULT_IRQ_PRIORITY>; -}; +#include "nrf54l_05_10_15_cpuflpr.dtsi" diff --git a/dts/riscv/nordic/nrf54l_05_10_15_cpuflpr.dtsi b/dts/riscv/nordic/nrf54l_05_10_15_cpuflpr.dtsi new file mode 100644 index 00000000000000..b20ddbb1bdaba3 --- /dev/null +++ b/dts/riscv/nordic/nrf54l_05_10_15_cpuflpr.dtsi @@ -0,0 +1,65 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +cpu: &cpuflpr {}; +clic: &cpuflpr_clic {}; + +/delete-node/ &cpuapp; +/delete-node/ &cpuapp_rram; +/delete-node/ &cpuapp_ppb; +/delete-node/ &cpuapp_sram; + +/ { + soc { + compatible = "simple-bus"; + interrupt-parent = <&cpuflpr_clic>; + ranges; + }; +}; + +&cpuflpr { + cpuflpr_vevif_rx: mailbox { + compatible = "nordic,nrf-vevif-task-rx"; + status = "disabled"; + interrupt-parent = <&cpuflpr_clic>; + interrupts = <16 NRF_DEFAULT_IRQ_PRIORITY>, + <17 NRF_DEFAULT_IRQ_PRIORITY>, + <18 NRF_DEFAULT_IRQ_PRIORITY>, + <19 NRF_DEFAULT_IRQ_PRIORITY>, + <20 NRF_DEFAULT_IRQ_PRIORITY>, + <21 NRF_DEFAULT_IRQ_PRIORITY>, + <22 NRF_DEFAULT_IRQ_PRIORITY>; + #mbox-cells = <1>; + nordic,tasks = <7>; + nordic,tasks-mask = <0x007f0000>; + }; +}; + +&cpuflpr_vpr { + cpuflpr_vevif_tx: mailbox { + compatible = "nordic,nrf-vevif-event-tx"; + #mbox-cells = <1>; + nordic,events = <1>; + nordic,events-mask = <0x00100000>; + status = "disabled"; + }; +}; + +&cpuflpr_clic { + status = "okay"; +}; + +&grtc { + interrupts = <226 NRF_DEFAULT_IRQ_PRIORITY>; +}; + +&gpiote20 { + interrupts = <218 NRF_DEFAULT_IRQ_PRIORITY>; +}; + +&gpiote30 { + interrupts = <268 NRF_DEFAULT_IRQ_PRIORITY>; +}; diff --git a/modules/hal_nordic/nrfx/CMakeLists.txt b/modules/hal_nordic/nrfx/CMakeLists.txt index f9abcd0a0c2dac..fc3c8adb371c10 100644 --- a/modules/hal_nordic/nrfx/CMakeLists.txt +++ b/modules/hal_nordic/nrfx/CMakeLists.txt @@ -44,6 +44,12 @@ zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF54H20_CPUPPR NRF54H20_XXAA NRF_PPR) zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF54H20_CPUFLPR NRF54H20_XXAA NRF_FLPR) +zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF54L05 NRF54L05_XXAA) +zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF54L05_CPUAPP NRF_APPLICATION) +zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF54L05_CPUFLPR NRF_FLPR) +zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF54L10 NRF54L10_XXAA) +zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF54L10_CPUAPP NRF_APPLICATION) +zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF54L10_CPUFLPR NRF_FLPR) zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF54L15 NRF54L15_XXAA) zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF54L15_CPUAPP NRF_APPLICATION) zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF54L15_CPUFLPR NRF_FLPR) @@ -172,7 +178,7 @@ if(DEFINED uicr_path) endif() endif() -if(CONFIG_SOC_NRF54L15_CPUAPP OR CONFIG_SOC_NRF54L20_ENGA_CPUAPP) +if(CONFIG_SOC_NRF54L_CPUAPP_COMMON) dt_prop(clock_frequency PATH "/cpus/cpu@0" PROPERTY "clock-frequency") math(EXPR clock_frequency_mhz "${clock_frequency} / 1000000") zephyr_compile_definitions("NRF_CONFIG_CPU_FREQ_MHZ=${clock_frequency_mhz}") @@ -222,6 +228,10 @@ mdk_svd_ifdef(CONFIG_SOC_NRF54H20_CPUAPP nrf54h20_application.svd) mdk_svd_ifdef(CONFIG_SOC_NRF54H20_CPUPPR nrf54h20_ppr.svd) mdk_svd_ifdef(CONFIG_SOC_NRF54H20_CPUFLPR nrf54h20_flpr.svd) mdk_svd_ifdef(CONFIG_SOC_NRF54H20_CPURAD nrf54h20_radiocore.svd) +mdk_svd_ifdef(CONFIG_SOC_NRF54L05_CPUAPP nrf54l05_application.svd) +mdk_svd_ifdef(CONFIG_SOC_NRF54L05_CPUFLPR nrf54l05_flpr.svd) +mdk_svd_ifdef(CONFIG_SOC_NRF54L10_CPUAPP nrf54l10_application.svd) +mdk_svd_ifdef(CONFIG_SOC_NRF54L10_CPUFLPR nrf54l10_flpr.svd) mdk_svd_ifdef(CONFIG_SOC_NRF54L15_CPUAPP nrf54l15_application.svd) mdk_svd_ifdef(CONFIG_SOC_NRF54L15_CPUFLPR nrf54l15_flpr.svd) mdk_svd_ifdef(CONFIG_SOC_NRF54L20_ENGA_CPUAPP nrf54l20_enga_application.svd) diff --git a/modules/hal_nordic/nrfx/nrfx_config.h b/modules/hal_nordic/nrfx/nrfx_config.h index 48b3b8226fb529..5a6c8bf01c790d 100644 --- a/modules/hal_nordic/nrfx/nrfx_config.h +++ b/modules/hal_nordic/nrfx/nrfx_config.h @@ -1129,6 +1129,14 @@ #include #elif defined(NRF54H20_XXAA) && defined(NRF_FLPR) #include +#elif defined(NRF54L05_XXAA) && defined(NRF_APPLICATION) + #include +#elif defined(NRF54L05_XXAA) && defined(NRF_FLPR) + #include +#elif defined(NRF54L10_XXAA) && defined(NRF_APPLICATION) + #include +#elif defined(NRF54L10_XXAA) && defined(NRF_FLPR) + #include #elif defined(NRF54L15_XXAA) && defined(NRF_APPLICATION) #include #elif defined(NRF54L15_XXAA) && defined(NRF_FLPR) diff --git a/modules/hal_nordic/nrfx/nrfx_config_nrf54l05_application.h b/modules/hal_nordic/nrfx/nrfx_config_nrf54l05_application.h new file mode 100644 index 00000000000000..503405b49f6dca --- /dev/null +++ b/modules/hal_nordic/nrfx/nrfx_config_nrf54l05_application.h @@ -0,0 +1,1775 @@ +/* + * Copyright (c) 2024, Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef NRFX_CONFIG_NRF54L05_APPLICATION_H__ +#define NRFX_CONFIG_NRF54L05_APPLICATION_H__ + +#ifndef NRFX_CONFIG_H__ +#error "This file should not be included directly. Include nrfx_config.h instead." +#endif + + +/** + * @brief NRFX_DEFAULT_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 7. + */ +#ifndef NRFX_DEFAULT_IRQ_PRIORITY +#define NRFX_DEFAULT_IRQ_PRIORITY 7 +#endif + +/** + * @brief NRFX_CLOCK_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_CLOCK_ENABLED +#define NRFX_CLOCK_ENABLED 0 +#endif + +/** + * @brief NRFX_CLOCK_CONFIG_LF_SRC + * + * Integer value. + * Supported values: + * - RC = 0 + * - XTAL = 1 + * - Synth = 2 + */ +#ifndef NRFX_CLOCK_CONFIG_LF_SRC +#define NRFX_CLOCK_CONFIG_LF_SRC 1 +#endif + +/** + * @brief NRFX_CLOCK_CONFIG_LF_CAL_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_CLOCK_CONFIG_LF_CAL_ENABLED +#define NRFX_CLOCK_CONFIG_LF_CAL_ENABLED 0 +#endif + +/** + * @brief NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED +#define NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED 0 +#endif + +/** + * @brief NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 7. + */ +#ifndef NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_CLOCK_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_CLOCK_CONFIG_LOG_ENABLED +#define NRFX_CLOCK_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_CLOCK_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_CLOCK_CONFIG_LOG_LEVEL +#define NRFX_CLOCK_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_COMP_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_COMP_ENABLED +#define NRFX_COMP_ENABLED 0 +#endif + +/** + * @brief NRFX_COMP_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 7. + */ +#ifndef NRFX_COMP_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_COMP_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_COMP_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_COMP_CONFIG_LOG_ENABLED +#define NRFX_COMP_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_COMP_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_COMP_CONFIG_LOG_LEVEL +#define NRFX_COMP_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_DPPI_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_DPPI_ENABLED +#define NRFX_DPPI_ENABLED 0 +#endif + +/** + * @brief NRFX_DPPI_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_DPPI_CONFIG_LOG_ENABLED +#define NRFX_DPPI_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_DPPI_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_DPPI_CONFIG_LOG_LEVEL +#define NRFX_DPPI_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_DPPI00_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_DPPI00_ENABLED +#define NRFX_DPPI00_ENABLED 0 +#endif + +/** + * @brief NRFX_DPPI10_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_DPPI10_ENABLED +#define NRFX_DPPI10_ENABLED 0 +#endif + +/** + * @brief NRFX_DPPI20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_DPPI20_ENABLED +#define NRFX_DPPI20_ENABLED 0 +#endif + +/** + * @brief NRFX_DPPI30_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_DPPI30_ENABLED +#define NRFX_DPPI30_ENABLED 0 +#endif + +/** + * @brief NRFX_EGU_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_EGU_ENABLED +#define NRFX_EGU_ENABLED 0 +#endif + +/** + * @brief NRFX_EGU_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 7. + */ +#ifndef NRFX_EGU_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_EGU_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_EGU10_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_EGU10_ENABLED +#define NRFX_EGU10_ENABLED 0 +#endif + +/** + * @brief NRFX_EGU20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_EGU20_ENABLED +#define NRFX_EGU20_ENABLED 0 +#endif + +/** + * @brief NRFX_GPIOTE_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_GPIOTE_ENABLED +#define NRFX_GPIOTE_ENABLED 0 +#endif + +/** + * @brief NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 7. + */ +#ifndef NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS + * + * Integer value. Minimum: 0. Maximum: 15. + */ +#ifndef NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS +#define NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS 2 +#endif + +/** + * @brief NRFX_GPIOTE_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_GPIOTE_CONFIG_LOG_ENABLED +#define NRFX_GPIOTE_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_GPIOTE_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_GPIOTE_CONFIG_LOG_LEVEL +#define NRFX_GPIOTE_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_GPIOTE20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_GPIOTE20_ENABLED +#define NRFX_GPIOTE20_ENABLED 0 +#endif + +/** + * @brief NRFX_GPIOTE30_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_GPIOTE30_ENABLED +#define NRFX_GPIOTE30_ENABLED 0 +#endif + +/** + * @brief NRFX_GRTC_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_GRTC_ENABLED +#define NRFX_GRTC_ENABLED 0 +#endif + +/** + * @brief NRFX_GRTC_CONFIG_AUTOEN + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_GRTC_CONFIG_AUTOEN +#define NRFX_GRTC_CONFIG_AUTOEN 1 +#endif + +/** + * @brief NRFX_GRTC_CONFIG_AUTOSTART + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_GRTC_CONFIG_AUTOSTART +#define NRFX_GRTC_CONFIG_AUTOSTART 1 +#endif + +/** + * @brief NRFX_GRTC_CONFIG_CLEAR_AT_INIT + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_GRTC_CONFIG_CLEAR_AT_INIT +#define NRFX_GRTC_CONFIG_CLEAR_AT_INIT 0 +#endif + +/** + * @brief NRFX_GRTC_CONFIG_NUM_OF_CC_CHANNELS + * + * Integer value. + */ +#ifndef NRFX_GRTC_CONFIG_NUM_OF_CC_CHANNELS +#define NRFX_GRTC_CONFIG_NUM_OF_CC_CHANNELS 8 +#endif + +/** + * @brief NRFX_GRTC_CONFIG_ALLOWED_CC_CHANNELS_MASK + */ +#ifndef NRFX_GRTC_CONFIG_ALLOWED_CC_CHANNELS_MASK +#define NRFX_GRTC_CONFIG_ALLOWED_CC_CHANNELS_MASK 0x00000f0f +#endif + +/** + * @brief NRFX_GRTC_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 7. + */ +#ifndef NRFX_GRTC_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_GRTC_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_GRTC_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_GRTC_CONFIG_LOG_ENABLED +#define NRFX_GRTC_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_GRTC_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_GRTC_CONFIG_LOG_LEVEL +#define NRFX_GRTC_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_I2S_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_I2S_ENABLED +#define NRFX_I2S_ENABLED 0 +#endif + +/** + * @brief NRFX_I2S_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 7. + */ +#ifndef NRFX_I2S_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_I2S_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_I2S_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_I2S_CONFIG_LOG_ENABLED +#define NRFX_I2S_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_I2S_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_I2S_CONFIG_LOG_LEVEL +#define NRFX_I2S_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_I2S20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_I2S20_ENABLED +#define NRFX_I2S20_ENABLED 0 +#endif + +/** + * @brief NRFX_LPCOMP_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_LPCOMP_ENABLED +#define NRFX_LPCOMP_ENABLED 0 +#endif + +/** + * @brief NRFX_LPCOMP_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 7. + */ +#ifndef NRFX_LPCOMP_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_LPCOMP_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_LPCOMP_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_LPCOMP_CONFIG_LOG_ENABLED +#define NRFX_LPCOMP_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_LPCOMP_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_LPCOMP_CONFIG_LOG_LEVEL +#define NRFX_LPCOMP_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_NFCT_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_NFCT_ENABLED +#define NRFX_NFCT_ENABLED 0 +#endif + +/** + * @brief NRFX_NFCT_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 7. + */ +#ifndef NRFX_NFCT_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_NFCT_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_NFCT_CONFIG_TIMER_INSTANCE_ID - Timer instance used for workarounds in the driver. + * + * Integer value. Minimum: 0. Maximum: 5. + */ +#ifndef NRFX_NFCT_CONFIG_TIMER_INSTANCE_ID +#define NRFX_NFCT_CONFIG_TIMER_INSTANCE_ID 0 +#endif + +/** + * @brief NRFX_NFCT_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_NFCT_CONFIG_LOG_ENABLED +#define NRFX_NFCT_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_NFCT_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_NFCT_CONFIG_LOG_LEVEL +#define NRFX_NFCT_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_PDM_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PDM_ENABLED +#define NRFX_PDM_ENABLED 0 +#endif + +/** + * @brief NRFX_PDM_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 7. + */ +#ifndef NRFX_PDM_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_PDM_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_PDM_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PDM_CONFIG_LOG_ENABLED +#define NRFX_PDM_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_PDM_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_PDM_CONFIG_LOG_LEVEL +#define NRFX_PDM_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_PDM20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PDM20_ENABLED +#define NRFX_PDM20_ENABLED 0 +#endif + +/** + * @brief NRFX_PDM21_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PDM21_ENABLED +#define NRFX_PDM21_ENABLED 0 +#endif + +/** + * @brief NRFX_POWER_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_POWER_ENABLED +#define NRFX_POWER_ENABLED 0 +#endif + +/** + * @brief NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 7. + */ +#ifndef NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_PPIB_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB_ENABLED +#define NRFX_PPIB_ENABLED 0 +#endif + +/** + * @brief NRFX_PPIB_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB_CONFIG_LOG_ENABLED +#define NRFX_PPIB_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_PPIB_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_PPIB_CONFIG_LOG_LEVEL +#define NRFX_PPIB_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_PPIB00_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB00_ENABLED +#define NRFX_PPIB00_ENABLED 0 +#endif + +/** + * @brief NRFX_PPIB01_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB01_ENABLED +#define NRFX_PPIB01_ENABLED 0 +#endif + +/** + * @brief NRFX_PPIB10_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB10_ENABLED +#define NRFX_PPIB10_ENABLED 0 +#endif + +/** + * @brief NRFX_PPIB11_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB11_ENABLED +#define NRFX_PPIB11_ENABLED 0 +#endif + +/** + * @brief NRFX_PPIB20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB20_ENABLED +#define NRFX_PPIB20_ENABLED 0 +#endif + +/** + * @brief NRFX_PPIB21_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB21_ENABLED +#define NRFX_PPIB21_ENABLED 0 +#endif + +/** + * @brief NRFX_PPIB22_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB22_ENABLED +#define NRFX_PPIB22_ENABLED 0 +#endif + +/** + * @brief NRFX_PPIB30_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB30_ENABLED +#define NRFX_PPIB30_ENABLED 0 +#endif + +/** + * @brief NRFX_PRS_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PRS_ENABLED +#define NRFX_PRS_ENABLED 0 +#endif + +/** + * @brief NRFX_PRS_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PRS_CONFIG_LOG_ENABLED +#define NRFX_PRS_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_PRS_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_PRS_CONFIG_LOG_LEVEL +#define NRFX_PRS_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_PRS_BOX_0_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PRS_BOX_0_ENABLED +#define NRFX_PRS_BOX_0_ENABLED 0 +#endif + +/** + * @brief NRFX_PRS_BOX_1_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PRS_BOX_1_ENABLED +#define NRFX_PRS_BOX_1_ENABLED 0 +#endif + +/** + * @brief NRFX_PRS_BOX_2_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PRS_BOX_2_ENABLED +#define NRFX_PRS_BOX_2_ENABLED 0 +#endif + +/** + * @brief NRFX_PRS_BOX_3_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PRS_BOX_3_ENABLED +#define NRFX_PRS_BOX_3_ENABLED 0 +#endif + +/** + * @brief NRFX_PRS_BOX_4_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PRS_BOX_4_ENABLED +#define NRFX_PRS_BOX_4_ENABLED 0 +#endif + +/** + * @brief NRFX_PRS_BOX_5_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PRS_BOX_5_ENABLED +#define NRFX_PRS_BOX_5_ENABLED 0 +#endif + +/** + * @brief NRFX_PWM_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PWM_ENABLED +#define NRFX_PWM_ENABLED 0 +#endif + +/** + * @brief NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 7. + */ +#ifndef NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_PWM_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PWM_CONFIG_LOG_ENABLED +#define NRFX_PWM_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_PWM_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_PWM_CONFIG_LOG_LEVEL +#define NRFX_PWM_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_PWM20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PWM20_ENABLED +#define NRFX_PWM20_ENABLED 0 +#endif + +/** + * @brief NRFX_PWM21_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PWM21_ENABLED +#define NRFX_PWM21_ENABLED 0 +#endif + +/** + * @brief NRFX_PWM22_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PWM22_ENABLED +#define NRFX_PWM22_ENABLED 0 +#endif + +/** + * @brief NRFX_QDEC_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_QDEC_ENABLED +#define NRFX_QDEC_ENABLED 0 +#endif + +/** + * @brief NRFX_QDEC_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 7. + */ +#ifndef NRFX_QDEC_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_QDEC_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_QDEC_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_QDEC_CONFIG_LOG_ENABLED +#define NRFX_QDEC_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_QDEC_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_QDEC_CONFIG_LOG_LEVEL +#define NRFX_QDEC_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_QDEC20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_QDEC20_ENABLED +#define NRFX_QDEC20_ENABLED 0 +#endif + +/** + * @brief NRFX_QDEC21_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_QDEC21_ENABLED +#define NRFX_QDEC21_ENABLED 0 +#endif + +/** + * @brief NRFX_RRAMC_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_RRAMC_ENABLED +#define NRFX_RRAMC_ENABLED 0 +#endif + +/** + * @brief NRFX_RRAMC_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 7. + */ +#ifndef NRFX_RRAMC_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_RRAMC_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_RRAMC_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_RRAMC_CONFIG_LOG_ENABLED +#define NRFX_RRAMC_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_RRAMC_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_RRAMC_CONFIG_LOG_LEVEL +#define NRFX_RRAMC_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_RTC_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_RTC_ENABLED +#define NRFX_RTC_ENABLED 0 +#endif + +/** + * @brief NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 7. + */ +#ifndef NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_RTC_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_RTC_CONFIG_LOG_ENABLED +#define NRFX_RTC_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_RTC_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_RTC_CONFIG_LOG_LEVEL +#define NRFX_RTC_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_RTC10_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_RTC10_ENABLED +#define NRFX_RTC10_ENABLED 0 +#endif + +/** + * @brief NRFX_RTC30_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_RTC30_ENABLED +#define NRFX_RTC30_ENABLED 0 +#endif + +/** + * @brief NRFX_SAADC_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SAADC_ENABLED +#define NRFX_SAADC_ENABLED 0 +#endif + +/** + * @brief NRFX_SAADC_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 7. + */ +#ifndef NRFX_SAADC_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_SAADC_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_SAADC_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SAADC_CONFIG_LOG_ENABLED +#define NRFX_SAADC_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_SAADC_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_SAADC_CONFIG_LOG_LEVEL +#define NRFX_SAADC_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_SPIM_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIM_ENABLED +#define NRFX_SPIM_ENABLED 0 +#endif + +/** + * @brief NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 7. + */ +#ifndef NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_SPIM_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIM_CONFIG_LOG_ENABLED +#define NRFX_SPIM_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_SPIM_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_SPIM_CONFIG_LOG_LEVEL +#define NRFX_SPIM_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_SPIM00_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIM00_ENABLED +#define NRFX_SPIM00_ENABLED 0 +#endif + +/** + * @brief NRFX_SPIM20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIM20_ENABLED +#define NRFX_SPIM20_ENABLED 0 +#endif + +/** + * @brief NRFX_SPIM21_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIM21_ENABLED +#define NRFX_SPIM21_ENABLED 0 +#endif + +/** + * @brief NRFX_SPIM22_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIM22_ENABLED +#define NRFX_SPIM22_ENABLED 0 +#endif + +/** + * @brief NRFX_SPIM30_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIM30_ENABLED +#define NRFX_SPIM30_ENABLED 0 +#endif + +/** + * @brief NRFX_SPIS_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIS_ENABLED +#define NRFX_SPIS_ENABLED 0 +#endif + +/** + * @brief NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 7. + */ +#ifndef NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_SPIS_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIS_CONFIG_LOG_ENABLED +#define NRFX_SPIS_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_SPIS_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_SPIS_CONFIG_LOG_LEVEL +#define NRFX_SPIS_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_SPIS00_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIS00_ENABLED +#define NRFX_SPIS00_ENABLED 0 +#endif + +/** + * @brief NRFX_SPIS20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIS20_ENABLED +#define NRFX_SPIS20_ENABLED 0 +#endif + +/** + * @brief NRFX_SPIS21_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIS21_ENABLED +#define NRFX_SPIS21_ENABLED 0 +#endif + +/** + * @brief NRFX_SPIS22_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIS22_ENABLED +#define NRFX_SPIS22_ENABLED 0 +#endif + +/** + * @brief NRFX_SPIS30_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIS30_ENABLED +#define NRFX_SPIS30_ENABLED 0 +#endif + +/** + * @brief NRFX_SYSTICK_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SYSTICK_ENABLED +#define NRFX_SYSTICK_ENABLED 0 +#endif + +/** + * @brief NRFX_TEMP_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TEMP_ENABLED +#define NRFX_TEMP_ENABLED 0 +#endif + +/** + * @brief NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 7. + */ +#ifndef NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_TEMP_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TEMP_CONFIG_LOG_ENABLED +#define NRFX_TEMP_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_TEMP_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_TEMP_CONFIG_LOG_LEVEL +#define NRFX_TEMP_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_TIMER_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TIMER_ENABLED +#define NRFX_TIMER_ENABLED 0 +#endif + +/** + * @brief NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 7. + */ +#ifndef NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_TIMER_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TIMER_CONFIG_LOG_ENABLED +#define NRFX_TIMER_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_TIMER_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_TIMER_CONFIG_LOG_LEVEL +#define NRFX_TIMER_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_TIMER00_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TIMER00_ENABLED +#define NRFX_TIMER00_ENABLED 0 +#endif + +/** + * @brief NRFX_TIMER10_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TIMER10_ENABLED +#define NRFX_TIMER10_ENABLED 0 +#endif + +/** + * @brief NRFX_TIMER20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TIMER20_ENABLED +#define NRFX_TIMER20_ENABLED 0 +#endif + +/** + * @brief NRFX_TIMER21_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TIMER21_ENABLED +#define NRFX_TIMER21_ENABLED 0 +#endif + +/** + * @brief NRFX_TIMER22_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TIMER22_ENABLED +#define NRFX_TIMER22_ENABLED 0 +#endif + +/** + * @brief NRFX_TIMER23_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TIMER23_ENABLED +#define NRFX_TIMER23_ENABLED 0 +#endif + +/** + * @brief NRFX_TIMER24_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TIMER24_ENABLED +#define NRFX_TIMER24_ENABLED 0 +#endif + +/** + * @brief NRFX_TWIM_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIM_ENABLED +#define NRFX_TWIM_ENABLED 0 +#endif + +/** + * @brief NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 7. + */ +#ifndef NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_TWIM_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIM_CONFIG_LOG_ENABLED +#define NRFX_TWIM_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_TWIM_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_TWIM_CONFIG_LOG_LEVEL +#define NRFX_TWIM_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_TWIM20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIM20_ENABLED +#define NRFX_TWIM20_ENABLED 0 +#endif + +/** + * @brief NRFX_TWIM21_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIM21_ENABLED +#define NRFX_TWIM21_ENABLED 0 +#endif + +/** + * @brief NRFX_TWIM22_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIM22_ENABLED +#define NRFX_TWIM22_ENABLED 0 +#endif + +/** + * @brief NRFX_TWIM30_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIM30_ENABLED +#define NRFX_TWIM30_ENABLED 0 +#endif + +/** + * @brief NRFX_TWIS_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIS_ENABLED +#define NRFX_TWIS_ENABLED 0 +#endif + +/** + * @brief NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 7. + */ +#ifndef NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_TWIS_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIS_CONFIG_LOG_ENABLED +#define NRFX_TWIS_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY + * Assume that any instance would be initialized only once. + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY +#define NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY 0 +#endif + +/** + * @brief NRFX_TWIS_NO_SYNC_MODE - Remove support for synchronous mode. + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIS_NO_SYNC_MODE +#define NRFX_TWIS_NO_SYNC_MODE 0 +#endif + +/** + * @brief NRFX_TWIS_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_TWIS_CONFIG_LOG_LEVEL +#define NRFX_TWIS_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_TWIS20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIS20_ENABLED +#define NRFX_TWIS20_ENABLED 0 +#endif + +/** + * @brief NRFX_TWIS21_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIS21_ENABLED +#define NRFX_TWIS21_ENABLED 0 +#endif + +/** + * @brief NRFX_TWIS22_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIS22_ENABLED +#define NRFX_TWIS22_ENABLED 0 +#endif + +/** + * @brief NRFX_TWIS30_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIS30_ENABLED +#define NRFX_TWIS30_ENABLED 0 +#endif + +/** + * @brief NRFX_UARTE_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE_ENABLED +#define NRFX_UARTE_ENABLED 0 +#endif + +/** + * @brief NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG + * If enabled, support for configuring GPIO pins is removed from the driver + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG +#define NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG 0 +#endif + +/** + * @brief NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG + * If enabled, support for configuring PSEL registers is removed from the driver + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG +#define NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG 0 +#endif + +/** + * @brief NRFX_UARTE_CONFIG_TX_LINK - If enabled, driver supports linking of TX transfers. + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE_CONFIG_TX_LINK +#define NRFX_UARTE_CONFIG_TX_LINK 1 +#endif + +/** + * @brief NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 7. + */ +#ifndef NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_UARTE_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE_CONFIG_LOG_ENABLED +#define NRFX_UARTE_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_UARTE_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_UARTE_CONFIG_LOG_LEVEL +#define NRFX_UARTE_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_UARTE00_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE00_ENABLED +#define NRFX_UARTE00_ENABLED 0 +#endif + +/** + * @brief NRFX_UARTE20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE20_ENABLED +#define NRFX_UARTE20_ENABLED 0 +#endif + +/** + * @brief NRFX_UARTE21_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE21_ENABLED +#define NRFX_UARTE21_ENABLED 0 +#endif + +/** + * @brief NRFX_UARTE22_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE22_ENABLED +#define NRFX_UARTE22_ENABLED 0 +#endif + +/** + * @brief NRFX_UARTE30_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE30_ENABLED +#define NRFX_UARTE30_ENABLED 0 +#endif + +/** + * @brief NRFX_WDT_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_WDT_ENABLED +#define NRFX_WDT_ENABLED 0 +#endif + +/** + * @brief NRFX_WDT_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 7. + */ +#ifndef NRFX_WDT_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_WDT_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_WDT_CONFIG_NO_IRQ - Remove WDT IRQ handling from WDT driver + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_WDT_CONFIG_NO_IRQ +#define NRFX_WDT_CONFIG_NO_IRQ 0 +#endif + +/** + * @brief NRFX_WDT_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_WDT_CONFIG_LOG_ENABLED +#define NRFX_WDT_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_WDT_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_WDT_CONFIG_LOG_LEVEL +#define NRFX_WDT_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_WDT30_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_WDT30_ENABLED +#define NRFX_WDT30_ENABLED 0 +#endif + +/** + * @brief NRFX_WDT31_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_WDT31_ENABLED +#define NRFX_WDT31_ENABLED 0 +#endif + +#endif /* NRFX_CONFIG_NRF54L05_APPLICATION_H__ */ diff --git a/modules/hal_nordic/nrfx/nrfx_config_nrf54l05_flpr.h b/modules/hal_nordic/nrfx/nrfx_config_nrf54l05_flpr.h new file mode 100644 index 00000000000000..4d83d5cba22874 --- /dev/null +++ b/modules/hal_nordic/nrfx/nrfx_config_nrf54l05_flpr.h @@ -0,0 +1,1784 @@ +/* + * Copyright (c) 2024, Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef NRFX_CONFIG_NRF54L05_FLPR_H__ +#define NRFX_CONFIG_NRF54L05_FLPR_H__ + +#ifndef NRFX_CONFIG_H__ +#error "This file should not be included directly. Include nrfx_config.h instead." +#endif + + +/** + * @brief NRFX_DEFAULT_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 3. + */ +#ifndef NRFX_DEFAULT_IRQ_PRIORITY +#define NRFX_DEFAULT_IRQ_PRIORITY 0 +#endif + +/** + * @brief NRFX_CLOCK_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_CLOCK_ENABLED +#define NRFX_CLOCK_ENABLED 0 +#endif + +/** + * @brief NRFX_CLOCK_CONFIG_LF_SRC + * + * Integer value. + * Supported values: + * - RC = 0 + * - XTAL = 1 + * - Synth = 2 + */ +#ifndef NRFX_CLOCK_CONFIG_LF_SRC +#define NRFX_CLOCK_CONFIG_LF_SRC 1 +#endif + +/** + * @brief NRFX_CLOCK_CONFIG_LF_CAL_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_CLOCK_CONFIG_LF_CAL_ENABLED +#define NRFX_CLOCK_CONFIG_LF_CAL_ENABLED 0 +#endif + +/** + * @brief NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED +#define NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED 0 +#endif + +/** + * @brief NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 3. + */ +#ifndef NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_CLOCK_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_CLOCK_CONFIG_LOG_ENABLED +#define NRFX_CLOCK_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_CLOCK_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_CLOCK_CONFIG_LOG_LEVEL +#define NRFX_CLOCK_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_COMP_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_COMP_ENABLED +#define NRFX_COMP_ENABLED 0 +#endif + +/** + * @brief NRFX_COMP_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 3. + */ +#ifndef NRFX_COMP_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_COMP_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_COMP_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_COMP_CONFIG_LOG_ENABLED +#define NRFX_COMP_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_COMP_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_COMP_CONFIG_LOG_LEVEL +#define NRFX_COMP_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_COREDEP_VPR_LEGACY + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_COREDEP_VPR_LEGACY +#define NRFX_COREDEP_VPR_LEGACY 0 +#endif + +/** + * @brief NRFX_DPPI_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_DPPI_ENABLED +#define NRFX_DPPI_ENABLED 0 +#endif + +/** + * @brief NRFX_DPPI_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_DPPI_CONFIG_LOG_ENABLED +#define NRFX_DPPI_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_DPPI_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_DPPI_CONFIG_LOG_LEVEL +#define NRFX_DPPI_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_DPPI00_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_DPPI00_ENABLED +#define NRFX_DPPI00_ENABLED 0 +#endif + +/** + * @brief NRFX_DPPI10_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_DPPI10_ENABLED +#define NRFX_DPPI10_ENABLED 0 +#endif + +/** + * @brief NRFX_DPPI20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_DPPI20_ENABLED +#define NRFX_DPPI20_ENABLED 0 +#endif + +/** + * @brief NRFX_DPPI30_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_DPPI30_ENABLED +#define NRFX_DPPI30_ENABLED 0 +#endif + +/** + * @brief NRFX_EGU_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_EGU_ENABLED +#define NRFX_EGU_ENABLED 0 +#endif + +/** + * @brief NRFX_EGU_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 3. + */ +#ifndef NRFX_EGU_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_EGU_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_EGU10_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_EGU10_ENABLED +#define NRFX_EGU10_ENABLED 0 +#endif + +/** + * @brief NRFX_EGU20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_EGU20_ENABLED +#define NRFX_EGU20_ENABLED 0 +#endif + +/** + * @brief NRFX_GPIOTE_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_GPIOTE_ENABLED +#define NRFX_GPIOTE_ENABLED 0 +#endif + +/** + * @brief NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 3. + */ +#ifndef NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS + * + * Integer value. Minimum: 0. Maximum: 15. + */ +#ifndef NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS +#define NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS 2 +#endif + +/** + * @brief NRFX_GPIOTE_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_GPIOTE_CONFIG_LOG_ENABLED +#define NRFX_GPIOTE_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_GPIOTE_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_GPIOTE_CONFIG_LOG_LEVEL +#define NRFX_GPIOTE_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_GPIOTE20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_GPIOTE20_ENABLED +#define NRFX_GPIOTE20_ENABLED 0 +#endif + +/** + * @brief NRFX_GPIOTE30_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_GPIOTE30_ENABLED +#define NRFX_GPIOTE30_ENABLED 0 +#endif + +/** + * @brief NRFX_GRTC_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_GRTC_ENABLED +#define NRFX_GRTC_ENABLED 0 +#endif + +/** + * @brief NRFX_GRTC_CONFIG_AUTOEN + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_GRTC_CONFIG_AUTOEN +#define NRFX_GRTC_CONFIG_AUTOEN 1 +#endif + +/** + * @brief NRFX_GRTC_CONFIG_AUTOSTART + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_GRTC_CONFIG_AUTOSTART +#define NRFX_GRTC_CONFIG_AUTOSTART 0 +#endif + +/** + * @brief NRFX_GRTC_CONFIG_CLEAR_AT_INIT + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_GRTC_CONFIG_CLEAR_AT_INIT +#define NRFX_GRTC_CONFIG_CLEAR_AT_INIT 0 +#endif + +/** + * @brief NRFX_GRTC_CONFIG_NUM_OF_CC_CHANNELS + * + * Integer value. + */ +#ifndef NRFX_GRTC_CONFIG_NUM_OF_CC_CHANNELS +#define NRFX_GRTC_CONFIG_NUM_OF_CC_CHANNELS 4 +#endif + +/** + * @brief NRFX_GRTC_CONFIG_ALLOWED_CC_CHANNELS_MASK + */ +#ifndef NRFX_GRTC_CONFIG_ALLOWED_CC_CHANNELS_MASK +#define NRFX_GRTC_CONFIG_ALLOWED_CC_CHANNELS_MASK 0x000000f0 +#endif + +/** + * @brief NRFX_GRTC_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 3. + */ +#ifndef NRFX_GRTC_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_GRTC_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_GRTC_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_GRTC_CONFIG_LOG_ENABLED +#define NRFX_GRTC_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_GRTC_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_GRTC_CONFIG_LOG_LEVEL +#define NRFX_GRTC_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_I2S_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_I2S_ENABLED +#define NRFX_I2S_ENABLED 0 +#endif + +/** + * @brief NRFX_I2S_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 3. + */ +#ifndef NRFX_I2S_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_I2S_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_I2S_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_I2S_CONFIG_LOG_ENABLED +#define NRFX_I2S_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_I2S_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_I2S_CONFIG_LOG_LEVEL +#define NRFX_I2S_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_I2S20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_I2S20_ENABLED +#define NRFX_I2S20_ENABLED 0 +#endif + +/** + * @brief NRFX_LPCOMP_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_LPCOMP_ENABLED +#define NRFX_LPCOMP_ENABLED 0 +#endif + +/** + * @brief NRFX_LPCOMP_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 3. + */ +#ifndef NRFX_LPCOMP_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_LPCOMP_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_LPCOMP_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_LPCOMP_CONFIG_LOG_ENABLED +#define NRFX_LPCOMP_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_LPCOMP_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_LPCOMP_CONFIG_LOG_LEVEL +#define NRFX_LPCOMP_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_NFCT_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_NFCT_ENABLED +#define NRFX_NFCT_ENABLED 0 +#endif + +/** + * @brief NRFX_NFCT_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 3. + */ +#ifndef NRFX_NFCT_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_NFCT_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_NFCT_CONFIG_TIMER_INSTANCE_ID - Timer instance used for workarounds in the driver. + * + * Integer value. Minimum: 0. Maximum: 5. + */ +#ifndef NRFX_NFCT_CONFIG_TIMER_INSTANCE_ID +#define NRFX_NFCT_CONFIG_TIMER_INSTANCE_ID 0 +#endif + +/** + * @brief NRFX_NFCT_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_NFCT_CONFIG_LOG_ENABLED +#define NRFX_NFCT_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_NFCT_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_NFCT_CONFIG_LOG_LEVEL +#define NRFX_NFCT_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_PDM_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PDM_ENABLED +#define NRFX_PDM_ENABLED 0 +#endif + +/** + * @brief NRFX_PDM_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 3. + */ +#ifndef NRFX_PDM_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_PDM_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_PDM_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PDM_CONFIG_LOG_ENABLED +#define NRFX_PDM_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_PDM_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_PDM_CONFIG_LOG_LEVEL +#define NRFX_PDM_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_PDM20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PDM20_ENABLED +#define NRFX_PDM20_ENABLED 0 +#endif + +/** + * @brief NRFX_PDM21_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PDM21_ENABLED +#define NRFX_PDM21_ENABLED 0 +#endif + +/** + * @brief NRFX_POWER_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_POWER_ENABLED +#define NRFX_POWER_ENABLED 0 +#endif + +/** + * @brief NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 3. + */ +#ifndef NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_PPIB_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB_ENABLED +#define NRFX_PPIB_ENABLED 0 +#endif + +/** + * @brief NRFX_PPIB_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB_CONFIG_LOG_ENABLED +#define NRFX_PPIB_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_PPIB_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_PPIB_CONFIG_LOG_LEVEL +#define NRFX_PPIB_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_PPIB00_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB00_ENABLED +#define NRFX_PPIB00_ENABLED 0 +#endif + +/** + * @brief NRFX_PPIB01_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB01_ENABLED +#define NRFX_PPIB01_ENABLED 0 +#endif + +/** + * @brief NRFX_PPIB10_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB10_ENABLED +#define NRFX_PPIB10_ENABLED 0 +#endif + +/** + * @brief NRFX_PPIB11_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB11_ENABLED +#define NRFX_PPIB11_ENABLED 0 +#endif + +/** + * @brief NRFX_PPIB20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB20_ENABLED +#define NRFX_PPIB20_ENABLED 0 +#endif + +/** + * @brief NRFX_PPIB21_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB21_ENABLED +#define NRFX_PPIB21_ENABLED 0 +#endif + +/** + * @brief NRFX_PPIB22_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB22_ENABLED +#define NRFX_PPIB22_ENABLED 0 +#endif + +/** + * @brief NRFX_PPIB30_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB30_ENABLED +#define NRFX_PPIB30_ENABLED 0 +#endif + +/** + * @brief NRFX_PRS_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PRS_ENABLED +#define NRFX_PRS_ENABLED 0 +#endif + +/** + * @brief NRFX_PRS_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PRS_CONFIG_LOG_ENABLED +#define NRFX_PRS_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_PRS_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_PRS_CONFIG_LOG_LEVEL +#define NRFX_PRS_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_PRS_BOX_0_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PRS_BOX_0_ENABLED +#define NRFX_PRS_BOX_0_ENABLED 0 +#endif + +/** + * @brief NRFX_PRS_BOX_1_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PRS_BOX_1_ENABLED +#define NRFX_PRS_BOX_1_ENABLED 0 +#endif + +/** + * @brief NRFX_PRS_BOX_2_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PRS_BOX_2_ENABLED +#define NRFX_PRS_BOX_2_ENABLED 0 +#endif + +/** + * @brief NRFX_PRS_BOX_3_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PRS_BOX_3_ENABLED +#define NRFX_PRS_BOX_3_ENABLED 0 +#endif + +/** + * @brief NRFX_PRS_BOX_4_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PRS_BOX_4_ENABLED +#define NRFX_PRS_BOX_4_ENABLED 0 +#endif + +/** + * @brief NRFX_PRS_BOX_5_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PRS_BOX_5_ENABLED +#define NRFX_PRS_BOX_5_ENABLED 0 +#endif + +/** + * @brief NRFX_PWM_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PWM_ENABLED +#define NRFX_PWM_ENABLED 0 +#endif + +/** + * @brief NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 3. + */ +#ifndef NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_PWM_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PWM_CONFIG_LOG_ENABLED +#define NRFX_PWM_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_PWM_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_PWM_CONFIG_LOG_LEVEL +#define NRFX_PWM_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_PWM20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PWM20_ENABLED +#define NRFX_PWM20_ENABLED 0 +#endif + +/** + * @brief NRFX_PWM21_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PWM21_ENABLED +#define NRFX_PWM21_ENABLED 0 +#endif + +/** + * @brief NRFX_PWM22_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PWM22_ENABLED +#define NRFX_PWM22_ENABLED 0 +#endif + +/** + * @brief NRFX_QDEC_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_QDEC_ENABLED +#define NRFX_QDEC_ENABLED 0 +#endif + +/** + * @brief NRFX_QDEC_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 3. + */ +#ifndef NRFX_QDEC_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_QDEC_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_QDEC_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_QDEC_CONFIG_LOG_ENABLED +#define NRFX_QDEC_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_QDEC_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_QDEC_CONFIG_LOG_LEVEL +#define NRFX_QDEC_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_QDEC20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_QDEC20_ENABLED +#define NRFX_QDEC20_ENABLED 0 +#endif + +/** + * @brief NRFX_QDEC21_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_QDEC21_ENABLED +#define NRFX_QDEC21_ENABLED 0 +#endif + +/** + * @brief NRFX_RRAMC_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_RRAMC_ENABLED +#define NRFX_RRAMC_ENABLED 0 +#endif + +/** + * @brief NRFX_RRAMC_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 3. + */ +#ifndef NRFX_RRAMC_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_RRAMC_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_RRAMC_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_RRAMC_CONFIG_LOG_ENABLED +#define NRFX_RRAMC_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_RRAMC_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_RRAMC_CONFIG_LOG_LEVEL +#define NRFX_RRAMC_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_RTC_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_RTC_ENABLED +#define NRFX_RTC_ENABLED 0 +#endif + +/** + * @brief NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 3. + */ +#ifndef NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_RTC_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_RTC_CONFIG_LOG_ENABLED +#define NRFX_RTC_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_RTC_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_RTC_CONFIG_LOG_LEVEL +#define NRFX_RTC_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_RTC10_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_RTC10_ENABLED +#define NRFX_RTC10_ENABLED 0 +#endif + +/** + * @brief NRFX_RTC30_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_RTC30_ENABLED +#define NRFX_RTC30_ENABLED 0 +#endif + +/** + * @brief NRFX_SAADC_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SAADC_ENABLED +#define NRFX_SAADC_ENABLED 0 +#endif + +/** + * @brief NRFX_SAADC_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 3. + */ +#ifndef NRFX_SAADC_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_SAADC_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_SAADC_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SAADC_CONFIG_LOG_ENABLED +#define NRFX_SAADC_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_SAADC_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_SAADC_CONFIG_LOG_LEVEL +#define NRFX_SAADC_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_SPIM_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIM_ENABLED +#define NRFX_SPIM_ENABLED 0 +#endif + +/** + * @brief NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 3. + */ +#ifndef NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_SPIM_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIM_CONFIG_LOG_ENABLED +#define NRFX_SPIM_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_SPIM_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_SPIM_CONFIG_LOG_LEVEL +#define NRFX_SPIM_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_SPIM00_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIM00_ENABLED +#define NRFX_SPIM00_ENABLED 0 +#endif + +/** + * @brief NRFX_SPIM20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIM20_ENABLED +#define NRFX_SPIM20_ENABLED 0 +#endif + +/** + * @brief NRFX_SPIM21_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIM21_ENABLED +#define NRFX_SPIM21_ENABLED 0 +#endif + +/** + * @brief NRFX_SPIM22_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIM22_ENABLED +#define NRFX_SPIM22_ENABLED 0 +#endif + +/** + * @brief NRFX_SPIM30_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIM30_ENABLED +#define NRFX_SPIM30_ENABLED 0 +#endif + +/** + * @brief NRFX_SPIS_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIS_ENABLED +#define NRFX_SPIS_ENABLED 0 +#endif + +/** + * @brief NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 3. + */ +#ifndef NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_SPIS_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIS_CONFIG_LOG_ENABLED +#define NRFX_SPIS_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_SPIS_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_SPIS_CONFIG_LOG_LEVEL +#define NRFX_SPIS_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_SPIS00_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIS00_ENABLED +#define NRFX_SPIS00_ENABLED 0 +#endif + +/** + * @brief NRFX_SPIS20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIS20_ENABLED +#define NRFX_SPIS20_ENABLED 0 +#endif + +/** + * @brief NRFX_SPIS21_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIS21_ENABLED +#define NRFX_SPIS21_ENABLED 0 +#endif + +/** + * @brief NRFX_SPIS22_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIS22_ENABLED +#define NRFX_SPIS22_ENABLED 0 +#endif + +/** + * @brief NRFX_SPIS30_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIS30_ENABLED +#define NRFX_SPIS30_ENABLED 0 +#endif + +/** + * @brief NRFX_TEMP_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TEMP_ENABLED +#define NRFX_TEMP_ENABLED 0 +#endif + +/** + * @brief NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 3. + */ +#ifndef NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_TEMP_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TEMP_CONFIG_LOG_ENABLED +#define NRFX_TEMP_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_TEMP_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_TEMP_CONFIG_LOG_LEVEL +#define NRFX_TEMP_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_TIMER_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TIMER_ENABLED +#define NRFX_TIMER_ENABLED 0 +#endif + +/** + * @brief NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 3. + */ +#ifndef NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_TIMER_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TIMER_CONFIG_LOG_ENABLED +#define NRFX_TIMER_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_TIMER_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_TIMER_CONFIG_LOG_LEVEL +#define NRFX_TIMER_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_TIMER00_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TIMER00_ENABLED +#define NRFX_TIMER00_ENABLED 0 +#endif + +/** + * @brief NRFX_TIMER10_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TIMER10_ENABLED +#define NRFX_TIMER10_ENABLED 0 +#endif + +/** + * @brief NRFX_TIMER20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TIMER20_ENABLED +#define NRFX_TIMER20_ENABLED 0 +#endif + +/** + * @brief NRFX_TIMER21_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TIMER21_ENABLED +#define NRFX_TIMER21_ENABLED 0 +#endif + +/** + * @brief NRFX_TIMER22_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TIMER22_ENABLED +#define NRFX_TIMER22_ENABLED 0 +#endif + +/** + * @brief NRFX_TIMER23_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TIMER23_ENABLED +#define NRFX_TIMER23_ENABLED 0 +#endif + +/** + * @brief NRFX_TIMER24_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TIMER24_ENABLED +#define NRFX_TIMER24_ENABLED 0 +#endif + +/** + * @brief NRFX_TWIM_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIM_ENABLED +#define NRFX_TWIM_ENABLED 0 +#endif + +/** + * @brief NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 3. + */ +#ifndef NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_TWIM_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIM_CONFIG_LOG_ENABLED +#define NRFX_TWIM_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_TWIM_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_TWIM_CONFIG_LOG_LEVEL +#define NRFX_TWIM_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_TWIM20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIM20_ENABLED +#define NRFX_TWIM20_ENABLED 0 +#endif + +/** + * @brief NRFX_TWIM21_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIM21_ENABLED +#define NRFX_TWIM21_ENABLED 0 +#endif + +/** + * @brief NRFX_TWIM22_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIM22_ENABLED +#define NRFX_TWIM22_ENABLED 0 +#endif + +/** + * @brief NRFX_TWIM30_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIM30_ENABLED +#define NRFX_TWIM30_ENABLED 0 +#endif + +/** + * @brief NRFX_TWIS_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIS_ENABLED +#define NRFX_TWIS_ENABLED 0 +#endif + +/** + * @brief NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 3. + */ +#ifndef NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_TWIS_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIS_CONFIG_LOG_ENABLED +#define NRFX_TWIS_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY + * Assume that any instance would be initialized only once. + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY +#define NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY 0 +#endif + +/** + * @brief NRFX_TWIS_NO_SYNC_MODE - Remove support for synchronous mode. + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIS_NO_SYNC_MODE +#define NRFX_TWIS_NO_SYNC_MODE 0 +#endif + +/** + * @brief NRFX_TWIS_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_TWIS_CONFIG_LOG_LEVEL +#define NRFX_TWIS_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_TWIS20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIS20_ENABLED +#define NRFX_TWIS20_ENABLED 0 +#endif + +/** + * @brief NRFX_TWIS21_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIS21_ENABLED +#define NRFX_TWIS21_ENABLED 0 +#endif + +/** + * @brief NRFX_TWIS22_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIS22_ENABLED +#define NRFX_TWIS22_ENABLED 0 +#endif + +/** + * @brief NRFX_TWIS30_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIS30_ENABLED +#define NRFX_TWIS30_ENABLED 0 +#endif + +/** + * @brief NRFX_UARTE_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE_ENABLED +#define NRFX_UARTE_ENABLED 0 +#endif + +/** + * @brief NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG + * If enabled, support for configuring GPIO pins is removed from the driver + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG +#define NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG 0 +#endif + +/** + * @brief NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG + * If enabled, support for configuring PSEL registers is removed from the driver + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG +#define NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG 0 +#endif + +/** + * @brief NRFX_UARTE_CONFIG_TX_LINK - If enabled, driver supports linking of TX transfers. + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE_CONFIG_TX_LINK +#define NRFX_UARTE_CONFIG_TX_LINK 1 +#endif + +/** + * @brief NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 3. + */ +#ifndef NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_UARTE_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE_CONFIG_LOG_ENABLED +#define NRFX_UARTE_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_UARTE_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_UARTE_CONFIG_LOG_LEVEL +#define NRFX_UARTE_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_UARTE00_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE00_ENABLED +#define NRFX_UARTE00_ENABLED 0 +#endif + +/** + * @brief NRFX_UARTE20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE20_ENABLED +#define NRFX_UARTE20_ENABLED 0 +#endif + +/** + * @brief NRFX_UARTE21_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE21_ENABLED +#define NRFX_UARTE21_ENABLED 0 +#endif + +/** + * @brief NRFX_UARTE22_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE22_ENABLED +#define NRFX_UARTE22_ENABLED 0 +#endif + +/** + * @brief NRFX_UARTE30_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE30_ENABLED +#define NRFX_UARTE30_ENABLED 0 +#endif + +/** + * @brief NRFX_VEVIF_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_VEVIF_ENABLED +#define NRFX_VEVIF_ENABLED 0 +#endif + +/** + * @brief NRFX_WDT_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_WDT_ENABLED +#define NRFX_WDT_ENABLED 0 +#endif + +/** + * @brief NRFX_WDT_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 3. + */ +#ifndef NRFX_WDT_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_WDT_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_WDT_CONFIG_NO_IRQ - Remove WDT IRQ handling from WDT driver + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_WDT_CONFIG_NO_IRQ +#define NRFX_WDT_CONFIG_NO_IRQ 0 +#endif + +/** + * @brief NRFX_WDT_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_WDT_CONFIG_LOG_ENABLED +#define NRFX_WDT_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_WDT_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_WDT_CONFIG_LOG_LEVEL +#define NRFX_WDT_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_WDT30_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_WDT30_ENABLED +#define NRFX_WDT30_ENABLED 0 +#endif + +/** + * @brief NRFX_WDT31_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_WDT31_ENABLED +#define NRFX_WDT31_ENABLED 0 +#endif + +#endif /* NRFX_CONFIG_NRF54L05_FLPR_H__ */ diff --git a/modules/hal_nordic/nrfx/nrfx_config_nrf54l10_application.h b/modules/hal_nordic/nrfx/nrfx_config_nrf54l10_application.h new file mode 100644 index 00000000000000..ab781f507e5496 --- /dev/null +++ b/modules/hal_nordic/nrfx/nrfx_config_nrf54l10_application.h @@ -0,0 +1,1775 @@ +/* + * Copyright (c) 2024, Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef NRFX_CONFIG_NRF54L10_APPLICATION_H__ +#define NRFX_CONFIG_NRF54L10_APPLICATION_H__ + +#ifndef NRFX_CONFIG_H__ +#error "This file should not be included directly. Include nrfx_config.h instead." +#endif + + +/** + * @brief NRFX_DEFAULT_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 7. + */ +#ifndef NRFX_DEFAULT_IRQ_PRIORITY +#define NRFX_DEFAULT_IRQ_PRIORITY 7 +#endif + +/** + * @brief NRFX_CLOCK_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_CLOCK_ENABLED +#define NRFX_CLOCK_ENABLED 0 +#endif + +/** + * @brief NRFX_CLOCK_CONFIG_LF_SRC + * + * Integer value. + * Supported values: + * - RC = 0 + * - XTAL = 1 + * - Synth = 2 + */ +#ifndef NRFX_CLOCK_CONFIG_LF_SRC +#define NRFX_CLOCK_CONFIG_LF_SRC 1 +#endif + +/** + * @brief NRFX_CLOCK_CONFIG_LF_CAL_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_CLOCK_CONFIG_LF_CAL_ENABLED +#define NRFX_CLOCK_CONFIG_LF_CAL_ENABLED 0 +#endif + +/** + * @brief NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED +#define NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED 0 +#endif + +/** + * @brief NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 7. + */ +#ifndef NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_CLOCK_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_CLOCK_CONFIG_LOG_ENABLED +#define NRFX_CLOCK_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_CLOCK_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_CLOCK_CONFIG_LOG_LEVEL +#define NRFX_CLOCK_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_COMP_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_COMP_ENABLED +#define NRFX_COMP_ENABLED 0 +#endif + +/** + * @brief NRFX_COMP_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 7. + */ +#ifndef NRFX_COMP_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_COMP_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_COMP_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_COMP_CONFIG_LOG_ENABLED +#define NRFX_COMP_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_COMP_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_COMP_CONFIG_LOG_LEVEL +#define NRFX_COMP_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_DPPI_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_DPPI_ENABLED +#define NRFX_DPPI_ENABLED 0 +#endif + +/** + * @brief NRFX_DPPI_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_DPPI_CONFIG_LOG_ENABLED +#define NRFX_DPPI_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_DPPI_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_DPPI_CONFIG_LOG_LEVEL +#define NRFX_DPPI_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_DPPI00_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_DPPI00_ENABLED +#define NRFX_DPPI00_ENABLED 0 +#endif + +/** + * @brief NRFX_DPPI10_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_DPPI10_ENABLED +#define NRFX_DPPI10_ENABLED 0 +#endif + +/** + * @brief NRFX_DPPI20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_DPPI20_ENABLED +#define NRFX_DPPI20_ENABLED 0 +#endif + +/** + * @brief NRFX_DPPI30_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_DPPI30_ENABLED +#define NRFX_DPPI30_ENABLED 0 +#endif + +/** + * @brief NRFX_EGU_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_EGU_ENABLED +#define NRFX_EGU_ENABLED 0 +#endif + +/** + * @brief NRFX_EGU_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 7. + */ +#ifndef NRFX_EGU_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_EGU_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_EGU10_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_EGU10_ENABLED +#define NRFX_EGU10_ENABLED 0 +#endif + +/** + * @brief NRFX_EGU20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_EGU20_ENABLED +#define NRFX_EGU20_ENABLED 0 +#endif + +/** + * @brief NRFX_GPIOTE_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_GPIOTE_ENABLED +#define NRFX_GPIOTE_ENABLED 0 +#endif + +/** + * @brief NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 7. + */ +#ifndef NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS + * + * Integer value. Minimum: 0. Maximum: 15. + */ +#ifndef NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS +#define NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS 2 +#endif + +/** + * @brief NRFX_GPIOTE_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_GPIOTE_CONFIG_LOG_ENABLED +#define NRFX_GPIOTE_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_GPIOTE_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_GPIOTE_CONFIG_LOG_LEVEL +#define NRFX_GPIOTE_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_GPIOTE20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_GPIOTE20_ENABLED +#define NRFX_GPIOTE20_ENABLED 0 +#endif + +/** + * @brief NRFX_GPIOTE30_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_GPIOTE30_ENABLED +#define NRFX_GPIOTE30_ENABLED 0 +#endif + +/** + * @brief NRFX_GRTC_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_GRTC_ENABLED +#define NRFX_GRTC_ENABLED 0 +#endif + +/** + * @brief NRFX_GRTC_CONFIG_AUTOEN + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_GRTC_CONFIG_AUTOEN +#define NRFX_GRTC_CONFIG_AUTOEN 1 +#endif + +/** + * @brief NRFX_GRTC_CONFIG_AUTOSTART + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_GRTC_CONFIG_AUTOSTART +#define NRFX_GRTC_CONFIG_AUTOSTART 1 +#endif + +/** + * @brief NRFX_GRTC_CONFIG_CLEAR_AT_INIT + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_GRTC_CONFIG_CLEAR_AT_INIT +#define NRFX_GRTC_CONFIG_CLEAR_AT_INIT 0 +#endif + +/** + * @brief NRFX_GRTC_CONFIG_NUM_OF_CC_CHANNELS + * + * Integer value. + */ +#ifndef NRFX_GRTC_CONFIG_NUM_OF_CC_CHANNELS +#define NRFX_GRTC_CONFIG_NUM_OF_CC_CHANNELS 8 +#endif + +/** + * @brief NRFX_GRTC_CONFIG_ALLOWED_CC_CHANNELS_MASK + */ +#ifndef NRFX_GRTC_CONFIG_ALLOWED_CC_CHANNELS_MASK +#define NRFX_GRTC_CONFIG_ALLOWED_CC_CHANNELS_MASK 0x00000f0f +#endif + +/** + * @brief NRFX_GRTC_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 7. + */ +#ifndef NRFX_GRTC_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_GRTC_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_GRTC_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_GRTC_CONFIG_LOG_ENABLED +#define NRFX_GRTC_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_GRTC_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_GRTC_CONFIG_LOG_LEVEL +#define NRFX_GRTC_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_I2S_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_I2S_ENABLED +#define NRFX_I2S_ENABLED 0 +#endif + +/** + * @brief NRFX_I2S_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 7. + */ +#ifndef NRFX_I2S_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_I2S_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_I2S_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_I2S_CONFIG_LOG_ENABLED +#define NRFX_I2S_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_I2S_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_I2S_CONFIG_LOG_LEVEL +#define NRFX_I2S_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_I2S20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_I2S20_ENABLED +#define NRFX_I2S20_ENABLED 0 +#endif + +/** + * @brief NRFX_LPCOMP_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_LPCOMP_ENABLED +#define NRFX_LPCOMP_ENABLED 0 +#endif + +/** + * @brief NRFX_LPCOMP_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 7. + */ +#ifndef NRFX_LPCOMP_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_LPCOMP_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_LPCOMP_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_LPCOMP_CONFIG_LOG_ENABLED +#define NRFX_LPCOMP_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_LPCOMP_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_LPCOMP_CONFIG_LOG_LEVEL +#define NRFX_LPCOMP_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_NFCT_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_NFCT_ENABLED +#define NRFX_NFCT_ENABLED 0 +#endif + +/** + * @brief NRFX_NFCT_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 7. + */ +#ifndef NRFX_NFCT_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_NFCT_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_NFCT_CONFIG_TIMER_INSTANCE_ID - Timer instance used for workarounds in the driver. + * + * Integer value. Minimum: 0. Maximum: 5. + */ +#ifndef NRFX_NFCT_CONFIG_TIMER_INSTANCE_ID +#define NRFX_NFCT_CONFIG_TIMER_INSTANCE_ID 0 +#endif + +/** + * @brief NRFX_NFCT_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_NFCT_CONFIG_LOG_ENABLED +#define NRFX_NFCT_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_NFCT_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_NFCT_CONFIG_LOG_LEVEL +#define NRFX_NFCT_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_PDM_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PDM_ENABLED +#define NRFX_PDM_ENABLED 0 +#endif + +/** + * @brief NRFX_PDM_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 7. + */ +#ifndef NRFX_PDM_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_PDM_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_PDM_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PDM_CONFIG_LOG_ENABLED +#define NRFX_PDM_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_PDM_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_PDM_CONFIG_LOG_LEVEL +#define NRFX_PDM_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_PDM20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PDM20_ENABLED +#define NRFX_PDM20_ENABLED 0 +#endif + +/** + * @brief NRFX_PDM21_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PDM21_ENABLED +#define NRFX_PDM21_ENABLED 0 +#endif + +/** + * @brief NRFX_POWER_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_POWER_ENABLED +#define NRFX_POWER_ENABLED 0 +#endif + +/** + * @brief NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 7. + */ +#ifndef NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_PPIB_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB_ENABLED +#define NRFX_PPIB_ENABLED 0 +#endif + +/** + * @brief NRFX_PPIB_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB_CONFIG_LOG_ENABLED +#define NRFX_PPIB_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_PPIB_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_PPIB_CONFIG_LOG_LEVEL +#define NRFX_PPIB_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_PPIB00_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB00_ENABLED +#define NRFX_PPIB00_ENABLED 0 +#endif + +/** + * @brief NRFX_PPIB01_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB01_ENABLED +#define NRFX_PPIB01_ENABLED 0 +#endif + +/** + * @brief NRFX_PPIB10_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB10_ENABLED +#define NRFX_PPIB10_ENABLED 0 +#endif + +/** + * @brief NRFX_PPIB11_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB11_ENABLED +#define NRFX_PPIB11_ENABLED 0 +#endif + +/** + * @brief NRFX_PPIB20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB20_ENABLED +#define NRFX_PPIB20_ENABLED 0 +#endif + +/** + * @brief NRFX_PPIB21_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB21_ENABLED +#define NRFX_PPIB21_ENABLED 0 +#endif + +/** + * @brief NRFX_PPIB22_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB22_ENABLED +#define NRFX_PPIB22_ENABLED 0 +#endif + +/** + * @brief NRFX_PPIB30_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB30_ENABLED +#define NRFX_PPIB30_ENABLED 0 +#endif + +/** + * @brief NRFX_PRS_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PRS_ENABLED +#define NRFX_PRS_ENABLED 0 +#endif + +/** + * @brief NRFX_PRS_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PRS_CONFIG_LOG_ENABLED +#define NRFX_PRS_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_PRS_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_PRS_CONFIG_LOG_LEVEL +#define NRFX_PRS_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_PRS_BOX_0_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PRS_BOX_0_ENABLED +#define NRFX_PRS_BOX_0_ENABLED 0 +#endif + +/** + * @brief NRFX_PRS_BOX_1_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PRS_BOX_1_ENABLED +#define NRFX_PRS_BOX_1_ENABLED 0 +#endif + +/** + * @brief NRFX_PRS_BOX_2_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PRS_BOX_2_ENABLED +#define NRFX_PRS_BOX_2_ENABLED 0 +#endif + +/** + * @brief NRFX_PRS_BOX_3_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PRS_BOX_3_ENABLED +#define NRFX_PRS_BOX_3_ENABLED 0 +#endif + +/** + * @brief NRFX_PRS_BOX_4_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PRS_BOX_4_ENABLED +#define NRFX_PRS_BOX_4_ENABLED 0 +#endif + +/** + * @brief NRFX_PRS_BOX_5_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PRS_BOX_5_ENABLED +#define NRFX_PRS_BOX_5_ENABLED 0 +#endif + +/** + * @brief NRFX_PWM_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PWM_ENABLED +#define NRFX_PWM_ENABLED 0 +#endif + +/** + * @brief NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 7. + */ +#ifndef NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_PWM_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PWM_CONFIG_LOG_ENABLED +#define NRFX_PWM_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_PWM_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_PWM_CONFIG_LOG_LEVEL +#define NRFX_PWM_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_PWM20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PWM20_ENABLED +#define NRFX_PWM20_ENABLED 0 +#endif + +/** + * @brief NRFX_PWM21_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PWM21_ENABLED +#define NRFX_PWM21_ENABLED 0 +#endif + +/** + * @brief NRFX_PWM22_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PWM22_ENABLED +#define NRFX_PWM22_ENABLED 0 +#endif + +/** + * @brief NRFX_QDEC_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_QDEC_ENABLED +#define NRFX_QDEC_ENABLED 0 +#endif + +/** + * @brief NRFX_QDEC_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 7. + */ +#ifndef NRFX_QDEC_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_QDEC_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_QDEC_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_QDEC_CONFIG_LOG_ENABLED +#define NRFX_QDEC_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_QDEC_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_QDEC_CONFIG_LOG_LEVEL +#define NRFX_QDEC_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_QDEC20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_QDEC20_ENABLED +#define NRFX_QDEC20_ENABLED 0 +#endif + +/** + * @brief NRFX_QDEC21_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_QDEC21_ENABLED +#define NRFX_QDEC21_ENABLED 0 +#endif + +/** + * @brief NRFX_RRAMC_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_RRAMC_ENABLED +#define NRFX_RRAMC_ENABLED 0 +#endif + +/** + * @brief NRFX_RRAMC_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 7. + */ +#ifndef NRFX_RRAMC_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_RRAMC_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_RRAMC_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_RRAMC_CONFIG_LOG_ENABLED +#define NRFX_RRAMC_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_RRAMC_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_RRAMC_CONFIG_LOG_LEVEL +#define NRFX_RRAMC_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_RTC_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_RTC_ENABLED +#define NRFX_RTC_ENABLED 0 +#endif + +/** + * @brief NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 7. + */ +#ifndef NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_RTC_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_RTC_CONFIG_LOG_ENABLED +#define NRFX_RTC_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_RTC_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_RTC_CONFIG_LOG_LEVEL +#define NRFX_RTC_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_RTC10_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_RTC10_ENABLED +#define NRFX_RTC10_ENABLED 0 +#endif + +/** + * @brief NRFX_RTC30_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_RTC30_ENABLED +#define NRFX_RTC30_ENABLED 0 +#endif + +/** + * @brief NRFX_SAADC_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SAADC_ENABLED +#define NRFX_SAADC_ENABLED 0 +#endif + +/** + * @brief NRFX_SAADC_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 7. + */ +#ifndef NRFX_SAADC_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_SAADC_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_SAADC_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SAADC_CONFIG_LOG_ENABLED +#define NRFX_SAADC_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_SAADC_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_SAADC_CONFIG_LOG_LEVEL +#define NRFX_SAADC_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_SPIM_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIM_ENABLED +#define NRFX_SPIM_ENABLED 0 +#endif + +/** + * @brief NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 7. + */ +#ifndef NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_SPIM_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIM_CONFIG_LOG_ENABLED +#define NRFX_SPIM_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_SPIM_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_SPIM_CONFIG_LOG_LEVEL +#define NRFX_SPIM_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_SPIM00_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIM00_ENABLED +#define NRFX_SPIM00_ENABLED 0 +#endif + +/** + * @brief NRFX_SPIM20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIM20_ENABLED +#define NRFX_SPIM20_ENABLED 0 +#endif + +/** + * @brief NRFX_SPIM21_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIM21_ENABLED +#define NRFX_SPIM21_ENABLED 0 +#endif + +/** + * @brief NRFX_SPIM22_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIM22_ENABLED +#define NRFX_SPIM22_ENABLED 0 +#endif + +/** + * @brief NRFX_SPIM30_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIM30_ENABLED +#define NRFX_SPIM30_ENABLED 0 +#endif + +/** + * @brief NRFX_SPIS_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIS_ENABLED +#define NRFX_SPIS_ENABLED 0 +#endif + +/** + * @brief NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 7. + */ +#ifndef NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_SPIS_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIS_CONFIG_LOG_ENABLED +#define NRFX_SPIS_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_SPIS_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_SPIS_CONFIG_LOG_LEVEL +#define NRFX_SPIS_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_SPIS00_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIS00_ENABLED +#define NRFX_SPIS00_ENABLED 0 +#endif + +/** + * @brief NRFX_SPIS20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIS20_ENABLED +#define NRFX_SPIS20_ENABLED 0 +#endif + +/** + * @brief NRFX_SPIS21_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIS21_ENABLED +#define NRFX_SPIS21_ENABLED 0 +#endif + +/** + * @brief NRFX_SPIS22_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIS22_ENABLED +#define NRFX_SPIS22_ENABLED 0 +#endif + +/** + * @brief NRFX_SPIS30_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIS30_ENABLED +#define NRFX_SPIS30_ENABLED 0 +#endif + +/** + * @brief NRFX_SYSTICK_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SYSTICK_ENABLED +#define NRFX_SYSTICK_ENABLED 0 +#endif + +/** + * @brief NRFX_TEMP_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TEMP_ENABLED +#define NRFX_TEMP_ENABLED 0 +#endif + +/** + * @brief NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 7. + */ +#ifndef NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_TEMP_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TEMP_CONFIG_LOG_ENABLED +#define NRFX_TEMP_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_TEMP_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_TEMP_CONFIG_LOG_LEVEL +#define NRFX_TEMP_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_TIMER_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TIMER_ENABLED +#define NRFX_TIMER_ENABLED 0 +#endif + +/** + * @brief NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 7. + */ +#ifndef NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_TIMER_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TIMER_CONFIG_LOG_ENABLED +#define NRFX_TIMER_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_TIMER_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_TIMER_CONFIG_LOG_LEVEL +#define NRFX_TIMER_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_TIMER00_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TIMER00_ENABLED +#define NRFX_TIMER00_ENABLED 0 +#endif + +/** + * @brief NRFX_TIMER10_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TIMER10_ENABLED +#define NRFX_TIMER10_ENABLED 0 +#endif + +/** + * @brief NRFX_TIMER20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TIMER20_ENABLED +#define NRFX_TIMER20_ENABLED 0 +#endif + +/** + * @brief NRFX_TIMER21_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TIMER21_ENABLED +#define NRFX_TIMER21_ENABLED 0 +#endif + +/** + * @brief NRFX_TIMER22_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TIMER22_ENABLED +#define NRFX_TIMER22_ENABLED 0 +#endif + +/** + * @brief NRFX_TIMER23_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TIMER23_ENABLED +#define NRFX_TIMER23_ENABLED 0 +#endif + +/** + * @brief NRFX_TIMER24_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TIMER24_ENABLED +#define NRFX_TIMER24_ENABLED 0 +#endif + +/** + * @brief NRFX_TWIM_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIM_ENABLED +#define NRFX_TWIM_ENABLED 0 +#endif + +/** + * @brief NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 7. + */ +#ifndef NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_TWIM_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIM_CONFIG_LOG_ENABLED +#define NRFX_TWIM_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_TWIM_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_TWIM_CONFIG_LOG_LEVEL +#define NRFX_TWIM_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_TWIM20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIM20_ENABLED +#define NRFX_TWIM20_ENABLED 0 +#endif + +/** + * @brief NRFX_TWIM21_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIM21_ENABLED +#define NRFX_TWIM21_ENABLED 0 +#endif + +/** + * @brief NRFX_TWIM22_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIM22_ENABLED +#define NRFX_TWIM22_ENABLED 0 +#endif + +/** + * @brief NRFX_TWIM30_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIM30_ENABLED +#define NRFX_TWIM30_ENABLED 0 +#endif + +/** + * @brief NRFX_TWIS_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIS_ENABLED +#define NRFX_TWIS_ENABLED 0 +#endif + +/** + * @brief NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 7. + */ +#ifndef NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_TWIS_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIS_CONFIG_LOG_ENABLED +#define NRFX_TWIS_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY + * Assume that any instance would be initialized only once. + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY +#define NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY 0 +#endif + +/** + * @brief NRFX_TWIS_NO_SYNC_MODE - Remove support for synchronous mode. + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIS_NO_SYNC_MODE +#define NRFX_TWIS_NO_SYNC_MODE 0 +#endif + +/** + * @brief NRFX_TWIS_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_TWIS_CONFIG_LOG_LEVEL +#define NRFX_TWIS_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_TWIS20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIS20_ENABLED +#define NRFX_TWIS20_ENABLED 0 +#endif + +/** + * @brief NRFX_TWIS21_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIS21_ENABLED +#define NRFX_TWIS21_ENABLED 0 +#endif + +/** + * @brief NRFX_TWIS22_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIS22_ENABLED +#define NRFX_TWIS22_ENABLED 0 +#endif + +/** + * @brief NRFX_TWIS30_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIS30_ENABLED +#define NRFX_TWIS30_ENABLED 0 +#endif + +/** + * @brief NRFX_UARTE_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE_ENABLED +#define NRFX_UARTE_ENABLED 0 +#endif + +/** + * @brief NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG + * If enabled, support for configuring GPIO pins is removed from the driver + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG +#define NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG 0 +#endif + +/** + * @brief NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG + * If enabled, support for configuring PSEL registers is removed from the driver + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG +#define NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG 0 +#endif + +/** + * @brief NRFX_UARTE_CONFIG_TX_LINK - If enabled, driver supports linking of TX transfers. + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE_CONFIG_TX_LINK +#define NRFX_UARTE_CONFIG_TX_LINK 1 +#endif + +/** + * @brief NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 7. + */ +#ifndef NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_UARTE_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE_CONFIG_LOG_ENABLED +#define NRFX_UARTE_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_UARTE_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_UARTE_CONFIG_LOG_LEVEL +#define NRFX_UARTE_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_UARTE00_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE00_ENABLED +#define NRFX_UARTE00_ENABLED 0 +#endif + +/** + * @brief NRFX_UARTE20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE20_ENABLED +#define NRFX_UARTE20_ENABLED 0 +#endif + +/** + * @brief NRFX_UARTE21_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE21_ENABLED +#define NRFX_UARTE21_ENABLED 0 +#endif + +/** + * @brief NRFX_UARTE22_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE22_ENABLED +#define NRFX_UARTE22_ENABLED 0 +#endif + +/** + * @brief NRFX_UARTE30_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE30_ENABLED +#define NRFX_UARTE30_ENABLED 0 +#endif + +/** + * @brief NRFX_WDT_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_WDT_ENABLED +#define NRFX_WDT_ENABLED 0 +#endif + +/** + * @brief NRFX_WDT_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 7. + */ +#ifndef NRFX_WDT_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_WDT_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_WDT_CONFIG_NO_IRQ - Remove WDT IRQ handling from WDT driver + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_WDT_CONFIG_NO_IRQ +#define NRFX_WDT_CONFIG_NO_IRQ 0 +#endif + +/** + * @brief NRFX_WDT_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_WDT_CONFIG_LOG_ENABLED +#define NRFX_WDT_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_WDT_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_WDT_CONFIG_LOG_LEVEL +#define NRFX_WDT_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_WDT30_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_WDT30_ENABLED +#define NRFX_WDT30_ENABLED 0 +#endif + +/** + * @brief NRFX_WDT31_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_WDT31_ENABLED +#define NRFX_WDT31_ENABLED 0 +#endif + +#endif /* NRFX_CONFIG_NRF54L10_APPLICATION_H__ */ diff --git a/modules/hal_nordic/nrfx/nrfx_config_nrf54l10_flpr.h b/modules/hal_nordic/nrfx/nrfx_config_nrf54l10_flpr.h new file mode 100644 index 00000000000000..784cb0435a18d7 --- /dev/null +++ b/modules/hal_nordic/nrfx/nrfx_config_nrf54l10_flpr.h @@ -0,0 +1,1784 @@ +/* + * Copyright (c) 2024, Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef NRFX_CONFIG_NRF54L10_FLPR_H__ +#define NRFX_CONFIG_NRF54L10_FLPR_H__ + +#ifndef NRFX_CONFIG_H__ +#error "This file should not be included directly. Include nrfx_config.h instead." +#endif + + +/** + * @brief NRFX_DEFAULT_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 3. + */ +#ifndef NRFX_DEFAULT_IRQ_PRIORITY +#define NRFX_DEFAULT_IRQ_PRIORITY 0 +#endif + +/** + * @brief NRFX_CLOCK_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_CLOCK_ENABLED +#define NRFX_CLOCK_ENABLED 0 +#endif + +/** + * @brief NRFX_CLOCK_CONFIG_LF_SRC + * + * Integer value. + * Supported values: + * - RC = 0 + * - XTAL = 1 + * - Synth = 2 + */ +#ifndef NRFX_CLOCK_CONFIG_LF_SRC +#define NRFX_CLOCK_CONFIG_LF_SRC 1 +#endif + +/** + * @brief NRFX_CLOCK_CONFIG_LF_CAL_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_CLOCK_CONFIG_LF_CAL_ENABLED +#define NRFX_CLOCK_CONFIG_LF_CAL_ENABLED 0 +#endif + +/** + * @brief NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED +#define NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED 0 +#endif + +/** + * @brief NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 3. + */ +#ifndef NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_CLOCK_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_CLOCK_CONFIG_LOG_ENABLED +#define NRFX_CLOCK_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_CLOCK_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_CLOCK_CONFIG_LOG_LEVEL +#define NRFX_CLOCK_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_COMP_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_COMP_ENABLED +#define NRFX_COMP_ENABLED 0 +#endif + +/** + * @brief NRFX_COMP_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 3. + */ +#ifndef NRFX_COMP_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_COMP_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_COMP_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_COMP_CONFIG_LOG_ENABLED +#define NRFX_COMP_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_COMP_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_COMP_CONFIG_LOG_LEVEL +#define NRFX_COMP_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_COREDEP_VPR_LEGACY + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_COREDEP_VPR_LEGACY +#define NRFX_COREDEP_VPR_LEGACY 0 +#endif + +/** + * @brief NRFX_DPPI_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_DPPI_ENABLED +#define NRFX_DPPI_ENABLED 0 +#endif + +/** + * @brief NRFX_DPPI_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_DPPI_CONFIG_LOG_ENABLED +#define NRFX_DPPI_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_DPPI_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_DPPI_CONFIG_LOG_LEVEL +#define NRFX_DPPI_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_DPPI00_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_DPPI00_ENABLED +#define NRFX_DPPI00_ENABLED 0 +#endif + +/** + * @brief NRFX_DPPI10_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_DPPI10_ENABLED +#define NRFX_DPPI10_ENABLED 0 +#endif + +/** + * @brief NRFX_DPPI20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_DPPI20_ENABLED +#define NRFX_DPPI20_ENABLED 0 +#endif + +/** + * @brief NRFX_DPPI30_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_DPPI30_ENABLED +#define NRFX_DPPI30_ENABLED 0 +#endif + +/** + * @brief NRFX_EGU_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_EGU_ENABLED +#define NRFX_EGU_ENABLED 0 +#endif + +/** + * @brief NRFX_EGU_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 3. + */ +#ifndef NRFX_EGU_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_EGU_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_EGU10_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_EGU10_ENABLED +#define NRFX_EGU10_ENABLED 0 +#endif + +/** + * @brief NRFX_EGU20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_EGU20_ENABLED +#define NRFX_EGU20_ENABLED 0 +#endif + +/** + * @brief NRFX_GPIOTE_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_GPIOTE_ENABLED +#define NRFX_GPIOTE_ENABLED 0 +#endif + +/** + * @brief NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 3. + */ +#ifndef NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS + * + * Integer value. Minimum: 0. Maximum: 15. + */ +#ifndef NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS +#define NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS 2 +#endif + +/** + * @brief NRFX_GPIOTE_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_GPIOTE_CONFIG_LOG_ENABLED +#define NRFX_GPIOTE_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_GPIOTE_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_GPIOTE_CONFIG_LOG_LEVEL +#define NRFX_GPIOTE_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_GPIOTE20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_GPIOTE20_ENABLED +#define NRFX_GPIOTE20_ENABLED 0 +#endif + +/** + * @brief NRFX_GPIOTE30_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_GPIOTE30_ENABLED +#define NRFX_GPIOTE30_ENABLED 0 +#endif + +/** + * @brief NRFX_GRTC_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_GRTC_ENABLED +#define NRFX_GRTC_ENABLED 0 +#endif + +/** + * @brief NRFX_GRTC_CONFIG_AUTOEN + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_GRTC_CONFIG_AUTOEN +#define NRFX_GRTC_CONFIG_AUTOEN 1 +#endif + +/** + * @brief NRFX_GRTC_CONFIG_AUTOSTART + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_GRTC_CONFIG_AUTOSTART +#define NRFX_GRTC_CONFIG_AUTOSTART 0 +#endif + +/** + * @brief NRFX_GRTC_CONFIG_CLEAR_AT_INIT + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_GRTC_CONFIG_CLEAR_AT_INIT +#define NRFX_GRTC_CONFIG_CLEAR_AT_INIT 0 +#endif + +/** + * @brief NRFX_GRTC_CONFIG_NUM_OF_CC_CHANNELS + * + * Integer value. + */ +#ifndef NRFX_GRTC_CONFIG_NUM_OF_CC_CHANNELS +#define NRFX_GRTC_CONFIG_NUM_OF_CC_CHANNELS 4 +#endif + +/** + * @brief NRFX_GRTC_CONFIG_ALLOWED_CC_CHANNELS_MASK + */ +#ifndef NRFX_GRTC_CONFIG_ALLOWED_CC_CHANNELS_MASK +#define NRFX_GRTC_CONFIG_ALLOWED_CC_CHANNELS_MASK 0x000000f0 +#endif + +/** + * @brief NRFX_GRTC_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 3. + */ +#ifndef NRFX_GRTC_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_GRTC_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_GRTC_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_GRTC_CONFIG_LOG_ENABLED +#define NRFX_GRTC_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_GRTC_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_GRTC_CONFIG_LOG_LEVEL +#define NRFX_GRTC_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_I2S_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_I2S_ENABLED +#define NRFX_I2S_ENABLED 0 +#endif + +/** + * @brief NRFX_I2S_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 3. + */ +#ifndef NRFX_I2S_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_I2S_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_I2S_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_I2S_CONFIG_LOG_ENABLED +#define NRFX_I2S_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_I2S_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_I2S_CONFIG_LOG_LEVEL +#define NRFX_I2S_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_I2S20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_I2S20_ENABLED +#define NRFX_I2S20_ENABLED 0 +#endif + +/** + * @brief NRFX_LPCOMP_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_LPCOMP_ENABLED +#define NRFX_LPCOMP_ENABLED 0 +#endif + +/** + * @brief NRFX_LPCOMP_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 3. + */ +#ifndef NRFX_LPCOMP_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_LPCOMP_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_LPCOMP_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_LPCOMP_CONFIG_LOG_ENABLED +#define NRFX_LPCOMP_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_LPCOMP_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_LPCOMP_CONFIG_LOG_LEVEL +#define NRFX_LPCOMP_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_NFCT_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_NFCT_ENABLED +#define NRFX_NFCT_ENABLED 0 +#endif + +/** + * @brief NRFX_NFCT_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 3. + */ +#ifndef NRFX_NFCT_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_NFCT_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_NFCT_CONFIG_TIMER_INSTANCE_ID - Timer instance used for workarounds in the driver. + * + * Integer value. Minimum: 0. Maximum: 5. + */ +#ifndef NRFX_NFCT_CONFIG_TIMER_INSTANCE_ID +#define NRFX_NFCT_CONFIG_TIMER_INSTANCE_ID 0 +#endif + +/** + * @brief NRFX_NFCT_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_NFCT_CONFIG_LOG_ENABLED +#define NRFX_NFCT_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_NFCT_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_NFCT_CONFIG_LOG_LEVEL +#define NRFX_NFCT_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_PDM_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PDM_ENABLED +#define NRFX_PDM_ENABLED 0 +#endif + +/** + * @brief NRFX_PDM_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 3. + */ +#ifndef NRFX_PDM_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_PDM_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_PDM_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PDM_CONFIG_LOG_ENABLED +#define NRFX_PDM_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_PDM_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_PDM_CONFIG_LOG_LEVEL +#define NRFX_PDM_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_PDM20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PDM20_ENABLED +#define NRFX_PDM20_ENABLED 0 +#endif + +/** + * @brief NRFX_PDM21_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PDM21_ENABLED +#define NRFX_PDM21_ENABLED 0 +#endif + +/** + * @brief NRFX_POWER_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_POWER_ENABLED +#define NRFX_POWER_ENABLED 0 +#endif + +/** + * @brief NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 3. + */ +#ifndef NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_PPIB_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB_ENABLED +#define NRFX_PPIB_ENABLED 0 +#endif + +/** + * @brief NRFX_PPIB_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB_CONFIG_LOG_ENABLED +#define NRFX_PPIB_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_PPIB_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_PPIB_CONFIG_LOG_LEVEL +#define NRFX_PPIB_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_PPIB00_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB00_ENABLED +#define NRFX_PPIB00_ENABLED 0 +#endif + +/** + * @brief NRFX_PPIB01_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB01_ENABLED +#define NRFX_PPIB01_ENABLED 0 +#endif + +/** + * @brief NRFX_PPIB10_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB10_ENABLED +#define NRFX_PPIB10_ENABLED 0 +#endif + +/** + * @brief NRFX_PPIB11_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB11_ENABLED +#define NRFX_PPIB11_ENABLED 0 +#endif + +/** + * @brief NRFX_PPIB20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB20_ENABLED +#define NRFX_PPIB20_ENABLED 0 +#endif + +/** + * @brief NRFX_PPIB21_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB21_ENABLED +#define NRFX_PPIB21_ENABLED 0 +#endif + +/** + * @brief NRFX_PPIB22_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB22_ENABLED +#define NRFX_PPIB22_ENABLED 0 +#endif + +/** + * @brief NRFX_PPIB30_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB30_ENABLED +#define NRFX_PPIB30_ENABLED 0 +#endif + +/** + * @brief NRFX_PRS_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PRS_ENABLED +#define NRFX_PRS_ENABLED 0 +#endif + +/** + * @brief NRFX_PRS_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PRS_CONFIG_LOG_ENABLED +#define NRFX_PRS_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_PRS_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_PRS_CONFIG_LOG_LEVEL +#define NRFX_PRS_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_PRS_BOX_0_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PRS_BOX_0_ENABLED +#define NRFX_PRS_BOX_0_ENABLED 0 +#endif + +/** + * @brief NRFX_PRS_BOX_1_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PRS_BOX_1_ENABLED +#define NRFX_PRS_BOX_1_ENABLED 0 +#endif + +/** + * @brief NRFX_PRS_BOX_2_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PRS_BOX_2_ENABLED +#define NRFX_PRS_BOX_2_ENABLED 0 +#endif + +/** + * @brief NRFX_PRS_BOX_3_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PRS_BOX_3_ENABLED +#define NRFX_PRS_BOX_3_ENABLED 0 +#endif + +/** + * @brief NRFX_PRS_BOX_4_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PRS_BOX_4_ENABLED +#define NRFX_PRS_BOX_4_ENABLED 0 +#endif + +/** + * @brief NRFX_PRS_BOX_5_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PRS_BOX_5_ENABLED +#define NRFX_PRS_BOX_5_ENABLED 0 +#endif + +/** + * @brief NRFX_PWM_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PWM_ENABLED +#define NRFX_PWM_ENABLED 0 +#endif + +/** + * @brief NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 3. + */ +#ifndef NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_PWM_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PWM_CONFIG_LOG_ENABLED +#define NRFX_PWM_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_PWM_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_PWM_CONFIG_LOG_LEVEL +#define NRFX_PWM_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_PWM20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PWM20_ENABLED +#define NRFX_PWM20_ENABLED 0 +#endif + +/** + * @brief NRFX_PWM21_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PWM21_ENABLED +#define NRFX_PWM21_ENABLED 0 +#endif + +/** + * @brief NRFX_PWM22_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PWM22_ENABLED +#define NRFX_PWM22_ENABLED 0 +#endif + +/** + * @brief NRFX_QDEC_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_QDEC_ENABLED +#define NRFX_QDEC_ENABLED 0 +#endif + +/** + * @brief NRFX_QDEC_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 3. + */ +#ifndef NRFX_QDEC_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_QDEC_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_QDEC_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_QDEC_CONFIG_LOG_ENABLED +#define NRFX_QDEC_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_QDEC_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_QDEC_CONFIG_LOG_LEVEL +#define NRFX_QDEC_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_QDEC20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_QDEC20_ENABLED +#define NRFX_QDEC20_ENABLED 0 +#endif + +/** + * @brief NRFX_QDEC21_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_QDEC21_ENABLED +#define NRFX_QDEC21_ENABLED 0 +#endif + +/** + * @brief NRFX_RRAMC_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_RRAMC_ENABLED +#define NRFX_RRAMC_ENABLED 0 +#endif + +/** + * @brief NRFX_RRAMC_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 3. + */ +#ifndef NRFX_RRAMC_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_RRAMC_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_RRAMC_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_RRAMC_CONFIG_LOG_ENABLED +#define NRFX_RRAMC_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_RRAMC_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_RRAMC_CONFIG_LOG_LEVEL +#define NRFX_RRAMC_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_RTC_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_RTC_ENABLED +#define NRFX_RTC_ENABLED 0 +#endif + +/** + * @brief NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 3. + */ +#ifndef NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_RTC_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_RTC_CONFIG_LOG_ENABLED +#define NRFX_RTC_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_RTC_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_RTC_CONFIG_LOG_LEVEL +#define NRFX_RTC_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_RTC10_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_RTC10_ENABLED +#define NRFX_RTC10_ENABLED 0 +#endif + +/** + * @brief NRFX_RTC30_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_RTC30_ENABLED +#define NRFX_RTC30_ENABLED 0 +#endif + +/** + * @brief NRFX_SAADC_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SAADC_ENABLED +#define NRFX_SAADC_ENABLED 0 +#endif + +/** + * @brief NRFX_SAADC_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 3. + */ +#ifndef NRFX_SAADC_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_SAADC_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_SAADC_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SAADC_CONFIG_LOG_ENABLED +#define NRFX_SAADC_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_SAADC_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_SAADC_CONFIG_LOG_LEVEL +#define NRFX_SAADC_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_SPIM_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIM_ENABLED +#define NRFX_SPIM_ENABLED 0 +#endif + +/** + * @brief NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 3. + */ +#ifndef NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_SPIM_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIM_CONFIG_LOG_ENABLED +#define NRFX_SPIM_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_SPIM_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_SPIM_CONFIG_LOG_LEVEL +#define NRFX_SPIM_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_SPIM00_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIM00_ENABLED +#define NRFX_SPIM00_ENABLED 0 +#endif + +/** + * @brief NRFX_SPIM20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIM20_ENABLED +#define NRFX_SPIM20_ENABLED 0 +#endif + +/** + * @brief NRFX_SPIM21_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIM21_ENABLED +#define NRFX_SPIM21_ENABLED 0 +#endif + +/** + * @brief NRFX_SPIM22_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIM22_ENABLED +#define NRFX_SPIM22_ENABLED 0 +#endif + +/** + * @brief NRFX_SPIM30_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIM30_ENABLED +#define NRFX_SPIM30_ENABLED 0 +#endif + +/** + * @brief NRFX_SPIS_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIS_ENABLED +#define NRFX_SPIS_ENABLED 0 +#endif + +/** + * @brief NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 3. + */ +#ifndef NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_SPIS_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIS_CONFIG_LOG_ENABLED +#define NRFX_SPIS_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_SPIS_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_SPIS_CONFIG_LOG_LEVEL +#define NRFX_SPIS_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_SPIS00_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIS00_ENABLED +#define NRFX_SPIS00_ENABLED 0 +#endif + +/** + * @brief NRFX_SPIS20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIS20_ENABLED +#define NRFX_SPIS20_ENABLED 0 +#endif + +/** + * @brief NRFX_SPIS21_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIS21_ENABLED +#define NRFX_SPIS21_ENABLED 0 +#endif + +/** + * @brief NRFX_SPIS22_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIS22_ENABLED +#define NRFX_SPIS22_ENABLED 0 +#endif + +/** + * @brief NRFX_SPIS30_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_SPIS30_ENABLED +#define NRFX_SPIS30_ENABLED 0 +#endif + +/** + * @brief NRFX_TEMP_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TEMP_ENABLED +#define NRFX_TEMP_ENABLED 0 +#endif + +/** + * @brief NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 3. + */ +#ifndef NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_TEMP_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TEMP_CONFIG_LOG_ENABLED +#define NRFX_TEMP_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_TEMP_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_TEMP_CONFIG_LOG_LEVEL +#define NRFX_TEMP_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_TIMER_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TIMER_ENABLED +#define NRFX_TIMER_ENABLED 0 +#endif + +/** + * @brief NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 3. + */ +#ifndef NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_TIMER_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TIMER_CONFIG_LOG_ENABLED +#define NRFX_TIMER_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_TIMER_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_TIMER_CONFIG_LOG_LEVEL +#define NRFX_TIMER_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_TIMER00_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TIMER00_ENABLED +#define NRFX_TIMER00_ENABLED 0 +#endif + +/** + * @brief NRFX_TIMER10_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TIMER10_ENABLED +#define NRFX_TIMER10_ENABLED 0 +#endif + +/** + * @brief NRFX_TIMER20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TIMER20_ENABLED +#define NRFX_TIMER20_ENABLED 0 +#endif + +/** + * @brief NRFX_TIMER21_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TIMER21_ENABLED +#define NRFX_TIMER21_ENABLED 0 +#endif + +/** + * @brief NRFX_TIMER22_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TIMER22_ENABLED +#define NRFX_TIMER22_ENABLED 0 +#endif + +/** + * @brief NRFX_TIMER23_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TIMER23_ENABLED +#define NRFX_TIMER23_ENABLED 0 +#endif + +/** + * @brief NRFX_TIMER24_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TIMER24_ENABLED +#define NRFX_TIMER24_ENABLED 0 +#endif + +/** + * @brief NRFX_TWIM_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIM_ENABLED +#define NRFX_TWIM_ENABLED 0 +#endif + +/** + * @brief NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 3. + */ +#ifndef NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_TWIM_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIM_CONFIG_LOG_ENABLED +#define NRFX_TWIM_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_TWIM_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_TWIM_CONFIG_LOG_LEVEL +#define NRFX_TWIM_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_TWIM20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIM20_ENABLED +#define NRFX_TWIM20_ENABLED 0 +#endif + +/** + * @brief NRFX_TWIM21_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIM21_ENABLED +#define NRFX_TWIM21_ENABLED 0 +#endif + +/** + * @brief NRFX_TWIM22_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIM22_ENABLED +#define NRFX_TWIM22_ENABLED 0 +#endif + +/** + * @brief NRFX_TWIM30_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIM30_ENABLED +#define NRFX_TWIM30_ENABLED 0 +#endif + +/** + * @brief NRFX_TWIS_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIS_ENABLED +#define NRFX_TWIS_ENABLED 0 +#endif + +/** + * @brief NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 3. + */ +#ifndef NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_TWIS_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIS_CONFIG_LOG_ENABLED +#define NRFX_TWIS_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY + * Assume that any instance would be initialized only once. + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY +#define NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY 0 +#endif + +/** + * @brief NRFX_TWIS_NO_SYNC_MODE - Remove support for synchronous mode. + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIS_NO_SYNC_MODE +#define NRFX_TWIS_NO_SYNC_MODE 0 +#endif + +/** + * @brief NRFX_TWIS_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_TWIS_CONFIG_LOG_LEVEL +#define NRFX_TWIS_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_TWIS20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIS20_ENABLED +#define NRFX_TWIS20_ENABLED 0 +#endif + +/** + * @brief NRFX_TWIS21_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIS21_ENABLED +#define NRFX_TWIS21_ENABLED 0 +#endif + +/** + * @brief NRFX_TWIS22_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIS22_ENABLED +#define NRFX_TWIS22_ENABLED 0 +#endif + +/** + * @brief NRFX_TWIS30_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_TWIS30_ENABLED +#define NRFX_TWIS30_ENABLED 0 +#endif + +/** + * @brief NRFX_UARTE_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE_ENABLED +#define NRFX_UARTE_ENABLED 0 +#endif + +/** + * @brief NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG + * If enabled, support for configuring GPIO pins is removed from the driver + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG +#define NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG 0 +#endif + +/** + * @brief NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG + * If enabled, support for configuring PSEL registers is removed from the driver + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG +#define NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG 0 +#endif + +/** + * @brief NRFX_UARTE_CONFIG_TX_LINK - If enabled, driver supports linking of TX transfers. + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE_CONFIG_TX_LINK +#define NRFX_UARTE_CONFIG_TX_LINK 1 +#endif + +/** + * @brief NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 3. + */ +#ifndef NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_UARTE_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE_CONFIG_LOG_ENABLED +#define NRFX_UARTE_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_UARTE_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_UARTE_CONFIG_LOG_LEVEL +#define NRFX_UARTE_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_UARTE00_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE00_ENABLED +#define NRFX_UARTE00_ENABLED 0 +#endif + +/** + * @brief NRFX_UARTE20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE20_ENABLED +#define NRFX_UARTE20_ENABLED 0 +#endif + +/** + * @brief NRFX_UARTE21_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE21_ENABLED +#define NRFX_UARTE21_ENABLED 0 +#endif + +/** + * @brief NRFX_UARTE22_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE22_ENABLED +#define NRFX_UARTE22_ENABLED 0 +#endif + +/** + * @brief NRFX_UARTE30_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_UARTE30_ENABLED +#define NRFX_UARTE30_ENABLED 0 +#endif + +/** + * @brief NRFX_VEVIF_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_VEVIF_ENABLED +#define NRFX_VEVIF_ENABLED 0 +#endif + +/** + * @brief NRFX_WDT_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_WDT_ENABLED +#define NRFX_WDT_ENABLED 0 +#endif + +/** + * @brief NRFX_WDT_DEFAULT_CONFIG_IRQ_PRIORITY + * + * Integer value. Minimum: 0. Maximum: 3. + */ +#ifndef NRFX_WDT_DEFAULT_CONFIG_IRQ_PRIORITY +#define NRFX_WDT_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY +#endif + +/** + * @brief NRFX_WDT_CONFIG_NO_IRQ - Remove WDT IRQ handling from WDT driver + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_WDT_CONFIG_NO_IRQ +#define NRFX_WDT_CONFIG_NO_IRQ 0 +#endif + +/** + * @brief NRFX_WDT_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_WDT_CONFIG_LOG_ENABLED +#define NRFX_WDT_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_WDT_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_WDT_CONFIG_LOG_LEVEL +#define NRFX_WDT_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_WDT30_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_WDT30_ENABLED +#define NRFX_WDT30_ENABLED 0 +#endif + +/** + * @brief NRFX_WDT31_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_WDT31_ENABLED +#define NRFX_WDT31_ENABLED 0 +#endif + +#endif /* NRFX_CONFIG_NRF54L10_FLPR_H__ */ diff --git a/modules/hal_nordic/nrfx/nrfx_config_nrf54l15_application.h b/modules/hal_nordic/nrfx/nrfx_config_nrf54l15_application.h index e423c8b515d711..cf49a5f4fa6ceb 100644 --- a/modules/hal_nordic/nrfx/nrfx_config_nrf54l15_application.h +++ b/modules/hal_nordic/nrfx/nrfx_config_nrf54l15_application.h @@ -136,6 +136,15 @@ #define NRFX_COMP_CONFIG_LOG_LEVEL 3 #endif +/** + * @brief NRFX_DPPI_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_DPPI_ENABLED +#define NRFX_DPPI_ENABLED 0 +#endif + /** * @brief NRFX_DPPI_CONFIG_LOG_ENABLED * @@ -160,6 +169,42 @@ #define NRFX_DPPI_CONFIG_LOG_LEVEL 3 #endif +/** + * @brief NRFX_DPPI00_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_DPPI00_ENABLED +#define NRFX_DPPI00_ENABLED 0 +#endif + +/** + * @brief NRFX_DPPI10_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_DPPI10_ENABLED +#define NRFX_DPPI10_ENABLED 0 +#endif + +/** + * @brief NRFX_DPPI20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_DPPI20_ENABLED +#define NRFX_DPPI20_ENABLED 0 +#endif + +/** + * @brief NRFX_DPPI30_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_DPPI30_ENABLED +#define NRFX_DPPI30_ENABLED 0 +#endif + /** * @brief NRFX_EGU_ENABLED * @@ -274,22 +319,13 @@ #define NRFX_GRTC_ENABLED 0 #endif -/** - * @brief NRFX_GRTC_CONFIG_SLEEP_ALLOWED - * - * Boolean. Accepted values: 0 and 1. - */ -#ifndef NRFX_GRTC_CONFIG_SLEEP_ALLOWED -#define NRFX_GRTC_CONFIG_SLEEP_ALLOWED 0 -#endif - /** * @brief NRFX_GRTC_CONFIG_AUTOEN * * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_GRTC_CONFIG_AUTOEN -#define NRFX_GRTC_CONFIG_AUTOEN 0 +#define NRFX_GRTC_CONFIG_AUTOEN 1 #endif /** @@ -581,6 +617,111 @@ #define NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY #endif +/** + * @brief NRFX_PPIB_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB_ENABLED +#define NRFX_PPIB_ENABLED 0 +#endif + +/** + * @brief NRFX_PPIB_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB_CONFIG_LOG_ENABLED +#define NRFX_PPIB_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_PPIB_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_PPIB_CONFIG_LOG_LEVEL +#define NRFX_PPIB_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_PPIB00_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB00_ENABLED +#define NRFX_PPIB00_ENABLED 0 +#endif + +/** + * @brief NRFX_PPIB01_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB01_ENABLED +#define NRFX_PPIB01_ENABLED 0 +#endif + +/** + * @brief NRFX_PPIB10_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB10_ENABLED +#define NRFX_PPIB10_ENABLED 0 +#endif + +/** + * @brief NRFX_PPIB11_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB11_ENABLED +#define NRFX_PPIB11_ENABLED 0 +#endif + +/** + * @brief NRFX_PPIB20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB20_ENABLED +#define NRFX_PPIB20_ENABLED 0 +#endif + +/** + * @brief NRFX_PPIB21_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB21_ENABLED +#define NRFX_PPIB21_ENABLED 0 +#endif + +/** + * @brief NRFX_PPIB22_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB22_ENABLED +#define NRFX_PPIB22_ENABLED 0 +#endif + +/** + * @brief NRFX_PPIB30_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB30_ENABLED +#define NRFX_PPIB30_ENABLED 0 +#endif + /** * @brief NRFX_PRS_ENABLED * @@ -1484,15 +1625,6 @@ #define NRFX_UARTE_CONFIG_TX_LINK 1 #endif -/** - * @brief NRFX_UARTE_RX_FIFO_FLUSH_WORKAROUND_MAGIC_BYTE - * - * Integer value. Minimum: 0. Maximum: 255. - */ -#ifndef NRFX_UARTE_RX_FIFO_FLUSH_WORKAROUND_MAGIC_BYTE -#define NRFX_UARTE_RX_FIFO_FLUSH_WORKAROUND_MAGIC_BYTE 171 -#endif - /** * @brief NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY * diff --git a/modules/hal_nordic/nrfx/nrfx_config_nrf54l15_flpr.h b/modules/hal_nordic/nrfx/nrfx_config_nrf54l15_flpr.h index a036f8c0a261b6..4d5069383378ee 100644 --- a/modules/hal_nordic/nrfx/nrfx_config_nrf54l15_flpr.h +++ b/modules/hal_nordic/nrfx/nrfx_config_nrf54l15_flpr.h @@ -145,6 +145,15 @@ #define NRFX_COREDEP_VPR_LEGACY 0 #endif +/** + * @brief NRFX_DPPI_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_DPPI_ENABLED +#define NRFX_DPPI_ENABLED 0 +#endif + /** * @brief NRFX_DPPI_CONFIG_LOG_ENABLED * @@ -169,6 +178,42 @@ #define NRFX_DPPI_CONFIG_LOG_LEVEL 3 #endif +/** + * @brief NRFX_DPPI00_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_DPPI00_ENABLED +#define NRFX_DPPI00_ENABLED 0 +#endif + +/** + * @brief NRFX_DPPI10_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_DPPI10_ENABLED +#define NRFX_DPPI10_ENABLED 0 +#endif + +/** + * @brief NRFX_DPPI20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_DPPI20_ENABLED +#define NRFX_DPPI20_ENABLED 0 +#endif + +/** + * @brief NRFX_DPPI30_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_DPPI30_ENABLED +#define NRFX_DPPI30_ENABLED 0 +#endif + /** * @brief NRFX_EGU_ENABLED * @@ -283,22 +328,13 @@ #define NRFX_GRTC_ENABLED 0 #endif -/** - * @brief NRFX_GRTC_CONFIG_SLEEP_ALLOWED - * - * Boolean. Accepted values: 0 and 1. - */ -#ifndef NRFX_GRTC_CONFIG_SLEEP_ALLOWED -#define NRFX_GRTC_CONFIG_SLEEP_ALLOWED 0 -#endif - /** * @brief NRFX_GRTC_CONFIG_AUTOEN * * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_GRTC_CONFIG_AUTOEN -#define NRFX_GRTC_CONFIG_AUTOEN 0 +#define NRFX_GRTC_CONFIG_AUTOEN 1 #endif /** @@ -307,7 +343,7 @@ * Boolean. Accepted values: 0 and 1. */ #ifndef NRFX_GRTC_CONFIG_AUTOSTART -#define NRFX_GRTC_CONFIG_AUTOSTART 1 +#define NRFX_GRTC_CONFIG_AUTOSTART 0 #endif /** @@ -590,6 +626,111 @@ #define NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY #endif +/** + * @brief NRFX_PPIB_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB_ENABLED +#define NRFX_PPIB_ENABLED 0 +#endif + +/** + * @brief NRFX_PPIB_CONFIG_LOG_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB_CONFIG_LOG_ENABLED +#define NRFX_PPIB_CONFIG_LOG_ENABLED 0 +#endif + +/** + * @brief NRFX_PPIB_CONFIG_LOG_LEVEL + * + * Integer value. + * Supported values: + * - Off = 0 + * - Error = 1 + * - Warning = 2 + * - Info = 3 + * - Debug = 4 + */ +#ifndef NRFX_PPIB_CONFIG_LOG_LEVEL +#define NRFX_PPIB_CONFIG_LOG_LEVEL 3 +#endif + +/** + * @brief NRFX_PPIB00_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB00_ENABLED +#define NRFX_PPIB00_ENABLED 0 +#endif + +/** + * @brief NRFX_PPIB01_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB01_ENABLED +#define NRFX_PPIB01_ENABLED 0 +#endif + +/** + * @brief NRFX_PPIB10_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB10_ENABLED +#define NRFX_PPIB10_ENABLED 0 +#endif + +/** + * @brief NRFX_PPIB11_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB11_ENABLED +#define NRFX_PPIB11_ENABLED 0 +#endif + +/** + * @brief NRFX_PPIB20_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB20_ENABLED +#define NRFX_PPIB20_ENABLED 0 +#endif + +/** + * @brief NRFX_PPIB21_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB21_ENABLED +#define NRFX_PPIB21_ENABLED 0 +#endif + +/** + * @brief NRFX_PPIB22_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB22_ENABLED +#define NRFX_PPIB22_ENABLED 0 +#endif + +/** + * @brief NRFX_PPIB30_ENABLED + * + * Boolean. Accepted values: 0 and 1. + */ +#ifndef NRFX_PPIB30_ENABLED +#define NRFX_PPIB30_ENABLED 0 +#endif + /** * @brief NRFX_PRS_ENABLED * @@ -1484,15 +1625,6 @@ #define NRFX_UARTE_CONFIG_TX_LINK 1 #endif -/** - * @brief NRFX_UARTE_RX_FIFO_FLUSH_WORKAROUND_MAGIC_BYTE - * - * Integer value. Minimum: 0. Maximum: 255. - */ -#ifndef NRFX_UARTE_RX_FIFO_FLUSH_WORKAROUND_MAGIC_BYTE -#define NRFX_UARTE_RX_FIFO_FLUSH_WORKAROUND_MAGIC_BYTE 171 -#endif - /** * @brief NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY * diff --git a/soc/nordic/nrf54l/Kconfig b/soc/nordic/nrf54l/Kconfig index bdebe3a7a3dd23..1a8f05ba89aaea 100644 --- a/soc/nordic/nrf54l/Kconfig +++ b/soc/nordic/nrf54l/Kconfig @@ -21,15 +21,27 @@ config SOC_NRF54L_CPUAPP_COMMON select HAS_HW_NRF_RADIO_IEEE802154 select HAS_POWEROFF -config SOC_NRF54L15_CPUAPP +config SOC_NRF54L05_CPUAPP select SOC_NRF54L_CPUAPP_COMMON -config SOC_NRF54L20_ENGA_CPUAPP +config SOC_NRF54L10_CPUAPP + select SOC_NRF54L_CPUAPP_COMMON + +config SOC_NRF54L15_CPUAPP select SOC_NRF54L_CPUAPP_COMMON +config SOC_NRF54L05_CPUFLPR + depends on RISCV_CORE_NORDIC_VPR + +config SOC_NRF54L10_CPUFLPR + depends on RISCV_CORE_NORDIC_VPR + config SOC_NRF54L15_CPUFLPR depends on RISCV_CORE_NORDIC_VPR +config SOC_NRF54L20_ENGA_CPUAPP + select SOC_NRF54L_CPUAPP_COMMON + if SOC_SERIES_NRF54LX config SOC_NRF54LX_SKIP_CLOCK_CONFIG diff --git a/soc/nordic/nrf54l/Kconfig.defconfig.nrf54l15_cpuapp b/soc/nordic/nrf54l/Kconfig.defconfig.nrf54l15_cpuapp deleted file mode 100644 index 9c8e0b4e34b3f4..00000000000000 --- a/soc/nordic/nrf54l/Kconfig.defconfig.nrf54l15_cpuapp +++ /dev/null @@ -1,11 +0,0 @@ -# Nordic Semiconductor nRF54L15 MCU - -# Copyright (c) 2024 Nordic Semiconductor ASA -# SPDX-License-Identifier: Apache-2.0 - -if SOC_NRF54L15_CPUAPP - -config NUM_IRQS - default 271 - -endif # SOC_NRF54L15_CPUAPP diff --git a/soc/nordic/nrf54l/Kconfig.defconfig.nrf54l_05_10_15_cpuapp b/soc/nordic/nrf54l/Kconfig.defconfig.nrf54l_05_10_15_cpuapp new file mode 100644 index 00000000000000..ecc2e6124da3f1 --- /dev/null +++ b/soc/nordic/nrf54l/Kconfig.defconfig.nrf54l_05_10_15_cpuapp @@ -0,0 +1,11 @@ +# Nordic Semiconductor nRF54 L05, L10 and L15 MCUs + +# Copyright (c) 2024 Nordic Semiconductor ASA +# SPDX-License-Identifier: Apache-2.0 + +if SOC_NRF54L05_CPUAPP || SOC_NRF54L10_CPUAPP || SOC_NRF54L15_CPUAPP + +config NUM_IRQS + default 271 + +endif # SOC_NRF54L05_CPUAPP || SOC_NRF54L10_CPUAPP || SOC_NRF54L15_CPUAPP diff --git a/soc/nordic/nrf54l/Kconfig.defconfig.nrf54l15_cpuflpr b/soc/nordic/nrf54l/Kconfig.defconfig.nrf54l_05_10_15_cpuflpr similarity index 52% rename from soc/nordic/nrf54l/Kconfig.defconfig.nrf54l15_cpuflpr rename to soc/nordic/nrf54l/Kconfig.defconfig.nrf54l_05_10_15_cpuflpr index 7c653d14b93171..76af552472828d 100644 --- a/soc/nordic/nrf54l/Kconfig.defconfig.nrf54l15_cpuflpr +++ b/soc/nordic/nrf54l/Kconfig.defconfig.nrf54l_05_10_15_cpuflpr @@ -1,9 +1,9 @@ -# Nordic Semiconductor nRF54L15 MCU +# Nordic Semiconductor nRF54 L05, L10 and L15 MCUs # Copyright (c) 2024 Nordic Semiconductor ASA # SPDX-License-Identifier: Apache-2.0 -if SOC_NRF54L15_CPUFLPR +if SOC_NRF54L05_CPUFLPR || SOC_NRF54L10_CPUFLPR || SOC_NRF54L15_CPUFLPR config NUM_IRQS default 287 @@ -12,4 +12,4 @@ config NUM_IRQS config ASSERT default n -endif # SOC_NRF54L15_CPUFLPR +endif # SOC_NRF54L05_CPUFLPR || SOC_NRF54L10_CPUFLPR || SOC_NRF54L15_CPUFLPR diff --git a/soc/nordic/nrf54l/Kconfig.soc b/soc/nordic/nrf54l/Kconfig.soc index 25deae9fade71d..f7c5adf6924e95 100644 --- a/soc/nordic/nrf54l/Kconfig.soc +++ b/soc/nordic/nrf54l/Kconfig.soc @@ -3,6 +3,42 @@ # Copyright (c) 2024 Nordic Semiconductor ASA # SPDX-License-Identifier: Apache-2.0 +config SOC_NRF54L05 + bool + select SOC_SERIES_NRF54LX + help + NRF54L05 + +config SOC_NRF54L05_CPUAPP + bool + select SOC_NRF54L05 + help + NRF54L05 CPUAPP + +config SOC_NRF54L05_CPUFLPR + bool + select SOC_NRF54L05 + help + NRF54L05 CPUFLPR + +config SOC_NRF54L10 + bool + select SOC_SERIES_NRF54LX + help + NRF54L10 + +config SOC_NRF54L10_CPUAPP + bool + select SOC_NRF54L10 + help + NRF54L10 CPUAPP + +config SOC_NRF54L10_CPUFLPR + bool + select SOC_NRF54L10 + help + NRF54L10 CPUFLPR + config SOC_NRF54L15 bool select SOC_SERIES_NRF54LX @@ -40,5 +76,7 @@ config SOC_NRF54L20_ENGA_CPUAPP NRF54L20 ENGA CPUAPP config SOC + default "nrf54l05" if SOC_NRF54L05 + default "nrf54l10" if SOC_NRF54L10 default "nrf54l15" if SOC_NRF54L15 default "nrf54l20" if SOC_NRF54L20 diff --git a/soc/nordic/soc.yml b/soc/nordic/soc.yml index 9879f82f61aa2a..ee79c7ee86826a 100644 --- a/soc/nordic/soc.yml +++ b/soc/nordic/soc.yml @@ -21,6 +21,14 @@ family: - name: cpunet - name: nrf54l socs: + - name: nrf54l05 + cpuclusters: + - name: cpuapp + - name: cpuflpr + - name: nrf54l10 + cpuclusters: + - name: cpuapp + - name: cpuflpr - name: nrf54l15 cpuclusters: - name: cpuapp @@ -94,6 +102,12 @@ runners: - qualifiers: - nrf9161 - nrf9161/ns + - qualifiers: + - nrf54l05/cpuapp + - nrf54l05/cpuflpr + - qualifiers: + - nrf54l10/cpuapp + - nrf54l10/cpuflpr - qualifiers: - nrf54l15/cpuapp - nrf54l15/cpuflpr @@ -148,6 +162,12 @@ runners: - qualifiers: - nrf9161 - nrf9161/ns + - qualifiers: + - nrf54l05/cpuapp + - nrf54l05/cpuflpr + - qualifiers: + - nrf54l10/cpuapp + - nrf54l10/cpuflpr - qualifiers: - nrf54l15/cpuapp - nrf54l15/cpuflpr @@ -202,6 +222,12 @@ runners: - qualifiers: - nrf9161 - nrf9161/ns + - qualifiers: + - nrf54l05/cpuapp + - nrf54l05/cpuflpr + - qualifiers: + - nrf54l10/cpuapp + - nrf54l10/cpuflpr - qualifiers: - nrf54l15/cpuapp - nrf54l15/cpuflpr diff --git a/soc/nordic/validate_base_addresses.c b/soc/nordic/validate_base_addresses.c index 07ae94a233bb5a..f47c3dc456ed9b 100644 --- a/soc/nordic/validate_base_addresses.c +++ b/soc/nordic/validate_base_addresses.c @@ -338,7 +338,7 @@ CHECK_DT_REG(usbreg, NRF_USBREGULATOR); CHECK_DT_REG(vmc, NRF_VMC); CHECK_DT_REG(cpuflpr_clic, NRF_FLPR_VPRCLIC); CHECK_DT_REG(cpuppr_clic, NRF_PPR_VPRCLIC); -#if defined(CONFIG_SOC_NRF54L15) +#if defined(CONFIG_SOC_NRF54L05) || defined(CONFIG_SOC_NRF54L10) || defined(CONFIG_SOC_NRF54L15) CHECK_DT_REG(cpuflpr_vpr, NRF_VPR00); #elif defined(CONFIG_NRF_PLATFORM_HALTIUM) CHECK_DT_REG(cpuflpr_vpr, NRF_VPR121); diff --git a/tests/drivers/flash/negative_tests/src/main.c b/tests/drivers/flash/negative_tests/src/main.c index 2c4eac7c6a8047..f4d5751ba2070c 100644 --- a/tests/drivers/flash/negative_tests/src/main.c +++ b/tests/drivers/flash/negative_tests/src/main.c @@ -26,7 +26,7 @@ #define TEST_AREA_SIZE FIXED_PARTITION_SIZE(TEST_AREA) #define TEST_AREA_DEVICE FIXED_PARTITION_DEVICE(TEST_AREA) -#if defined(CONFIG_SOC_NRF54L15) +#if defined(CONFIG_SOC_NRF54L05) || defined(CONFIG_SOC_NRF54L10) || defined(CONFIG_SOC_NRF54L15) #define TEST_FLASH_START (DT_REG_ADDR(DT_MEM_FROM_FIXED_PARTITION(DT_NODELABEL(TEST_AREA)))) #define TEST_FLASH_SIZE (DT_REG_SIZE(DT_MEM_FROM_FIXED_PARTITION(DT_NODELABEL(TEST_AREA)))) #elif defined(CONFIG_SOC_NRF54H20) diff --git a/tests/drivers/mbox/mbox_error_cases/src/main.c b/tests/drivers/mbox/mbox_error_cases/src/main.c index 555a89e288383f..54a4a628ec2395 100644 --- a/tests/drivers/mbox/mbox_error_cases/src/main.c +++ b/tests/drivers/mbox/mbox_error_cases/src/main.c @@ -10,7 +10,8 @@ int dummy_value; -#if defined(CONFIG_SOC_NRF54L15) || defined(CONFIG_SOC_NRF54H20) +#if defined(CONFIG_SOC_NRF54L05) || defined(CONFIG_SOC_NRF54L10) || \ + defined(CONFIG_SOC_NRF54L15) || defined(CONFIG_SOC_NRF54H20) #define EXPECTED_MTU_VALUE (0) #define DATA_TRANSFER_MODE_SUPPORTED (0) #define REMOTE_BUSY_SUPPORTED (0) diff --git a/tests/drivers/watchdog/wdt_error_cases/src/main.c b/tests/drivers/watchdog/wdt_error_cases/src/main.c index b05bedf01c337f..3182cdebd034da 100644 --- a/tests/drivers/watchdog/wdt_error_cases/src/main.c +++ b/tests/drivers/watchdog/wdt_error_cases/src/main.c @@ -42,7 +42,8 @@ #define DEFAULT_WINDOW_MIN (0U) /* Align tests to the specific target: */ -#if defined(CONFIG_SOC_NRF54L15) || defined(CONFIG_SOC_NRF54H20) || defined(CONFIG_SOC_NRF9280) +#if defined(CONFIG_SOC_NRF54L05) || defined(CONFIG_SOC_NRF54L10) || \ + defined(CONFIG_SOC_NRF54L15) || defined(CONFIG_SOC_NRF54H20) || defined(CONFIG_SOC_NRF9280) #define WDT_TEST_FLAGS \ (WDT_DISABLE_SUPPORTED | WDT_FLAG_RESET_SOC_SUPPORTED | \ WDT_FLAG_ONLY_ONE_TIMEOUT_VALUE_SUPPORTED | WDT_OPT_PAUSE_IN_SLEEP_SUPPORTED | \ diff --git a/tests/kernel/interrupt/src/nested_irq.c b/tests/kernel/interrupt/src/nested_irq.c index 6d84dda2ef8e35..d488be5b42684b 100644 --- a/tests/kernel/interrupt/src/nested_irq.c +++ b/tests/kernel/interrupt/src/nested_irq.c @@ -56,7 +56,7 @@ */ #define IRQ0_PRIO IRQ_DEFAULT_PRIORITY #define IRQ1_PRIO 0x0 -#elif defined(CONFIG_SOC_NRF54L15_CPUFLPR) +#elif defined(CONFIG_SOC_SERIES_NRF54LX) && defined(CONFIG_RISCV_CORE_NORDIC_VPR) #define IRQ0_LINE 16 #define IRQ1_LINE 17 From 11b73d4cfb71603e0ae8483b42d71ffb47e8eb3f Mon Sep 17 00:00:00 2001 From: Carles Cufi Date: Wed, 6 Nov 2024 18:04:56 +0100 Subject: [PATCH 7/8] boards: nordic: nrf54l15dk: Rename the board common file Use the rather logical convention for the name that is applied to other Nordic boards: _common.dtsi for definitions that are common to the board itself (LEDs, buttons, etc). Signed-off-by: Carles Cufi --- boards/nordic/nrf54l15dk/nrf54l15_cpuapp_common.dtsi | 2 +- .../{nrf54l15dk_nrf54l15-common.dtsi => nrf54l15dk_common.dtsi} | 0 boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l15_cpuflpr.dts | 2 +- 3 files changed, 2 insertions(+), 2 deletions(-) rename boards/nordic/nrf54l15dk/{nrf54l15dk_nrf54l15-common.dtsi => nrf54l15dk_common.dtsi} (100%) diff --git a/boards/nordic/nrf54l15dk/nrf54l15_cpuapp_common.dtsi b/boards/nordic/nrf54l15dk/nrf54l15_cpuapp_common.dtsi index 191babb632f6ee..f8714861936e4f 100644 --- a/boards/nordic/nrf54l15dk/nrf54l15_cpuapp_common.dtsi +++ b/boards/nordic/nrf54l15dk/nrf54l15_cpuapp_common.dtsi @@ -7,7 +7,7 @@ /* This file is common to the secure and non-secure domain */ #include -#include "nrf54l15dk_nrf54l15-common.dtsi" +#include "nrf54l15dk_common.dtsi" / { chosen { diff --git a/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l15-common.dtsi b/boards/nordic/nrf54l15dk/nrf54l15dk_common.dtsi similarity index 100% rename from boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l15-common.dtsi rename to boards/nordic/nrf54l15dk/nrf54l15dk_common.dtsi diff --git a/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l15_cpuflpr.dts b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l15_cpuflpr.dts index 472e3f2b8d38bc..2bc4ba292bed63 100644 --- a/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l15_cpuflpr.dts +++ b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l15_cpuflpr.dts @@ -6,7 +6,7 @@ /dts-v1/; #include -#include "nrf54l15dk_nrf54l15-common.dtsi" +#include "nrf54l15dk_common.dtsi" / { model = "Nordic nRF54L15 DK nRF54L15 FLPR MCU"; From b454670c2500a1d19b01bb0c692b60f92b3bb4b7 Mon Sep 17 00:00:00 2001 From: Carles Cufi Date: Wed, 6 Nov 2024 18:42:45 +0100 Subject: [PATCH 8/8] boards: nordic: nRF54L15DK: Add basic support for the L05 and L10 ICs The nRF54L05 and nRF54L10 are identical to the nRF54L15 except for their memory sizes. Add support for emulating those ICs on the nRF54L15DK. This commit only adds support for the main application core. Support for the FLPR core may be added later. Signed-off-by: Carles Cufi --- boards/nordic/nrf54l15dk/Kconfig.defconfig | 6 +- boards/nordic/nrf54l15dk/Kconfig.nrf54l15dk | 2 + boards/nordic/nrf54l15dk/board.cmake | 6 +- boards/nordic/nrf54l15dk/board.yml | 2 + .../nordic/nrf54l15dk/nrf54l15dk_common.dtsi | 2 +- .../nrf54l15dk/nrf54l15dk_nrf54l05_cpuapp.dts | 63 +++++++++++++++++++ .../nrf54l15dk_nrf54l05_cpuapp.yaml | 24 +++++++ .../nrf54l15dk_nrf54l05_cpuapp_defconfig | 29 +++++++++ .../nrf54l15dk/nrf54l15dk_nrf54l10_cpuapp.dts | 63 +++++++++++++++++++ .../nrf54l15dk_nrf54l10_cpuapp.yaml | 24 +++++++ .../nrf54l15dk_nrf54l10_cpuapp_defconfig | 29 +++++++++ .../nrf54l15dk/nrf54l15dk_nrf54l15_cpuapp.dts | 36 ++++++++++- ...> nrf54l15dk_nrf54l_05_10_15-pinctrl.dtsi} | 0 ...tsi => nrf54l_05_10_15_cpuapp_common.dtsi} | 34 ---------- .../boards/nrf54l15dk_nrf54l05_cpuapp.overlay | 8 +++ .../boards/nrf54l15dk_nrf54l10_cpuapp.overlay | 8 +++ .../boards/nrf54l15dk_nrf54l05_cpuapp.overlay | 43 +++++++++++++ .../boards/nrf54l15dk_nrf54l10_cpuapp.overlay | 43 +++++++++++++ .../boards/nrf54l15dk_nrf54l05_cpuapp.overlay | 9 +++ .../boards/nrf54l15dk_nrf54l10_cpuapp.overlay | 9 +++ tests/lib/cpp/cxx/testcase.yaml | 4 +- 21 files changed, 403 insertions(+), 41 deletions(-) create mode 100644 boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l05_cpuapp.dts create mode 100644 boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l05_cpuapp.yaml create mode 100644 boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l05_cpuapp_defconfig create mode 100644 boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l10_cpuapp.dts create mode 100644 boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l10_cpuapp.yaml create mode 100644 boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l10_cpuapp_defconfig rename boards/nordic/nrf54l15dk/{nrf54l15dk_nrf54l15-pinctrl.dtsi => nrf54l15dk_nrf54l_05_10_15-pinctrl.dtsi} (100%) rename boards/nordic/nrf54l15dk/{nrf54l15_cpuapp_common.dtsi => nrf54l_05_10_15_cpuapp_common.dtsi} (70%) create mode 100644 samples/drivers/watchdog/boards/nrf54l15dk_nrf54l05_cpuapp.overlay create mode 100644 samples/drivers/watchdog/boards/nrf54l15dk_nrf54l10_cpuapp.overlay create mode 100644 tests/drivers/adc/adc_api/boards/nrf54l15dk_nrf54l05_cpuapp.overlay create mode 100644 tests/drivers/adc/adc_api/boards/nrf54l15dk_nrf54l10_cpuapp.overlay create mode 100644 tests/drivers/watchdog/wdt_basic_api/boards/nrf54l15dk_nrf54l05_cpuapp.overlay create mode 100644 tests/drivers/watchdog/wdt_basic_api/boards/nrf54l15dk_nrf54l10_cpuapp.overlay diff --git a/boards/nordic/nrf54l15dk/Kconfig.defconfig b/boards/nordic/nrf54l15dk/Kconfig.defconfig index 2b753df35151b7..cbb822eec9c8a4 100644 --- a/boards/nordic/nrf54l15dk/Kconfig.defconfig +++ b/boards/nordic/nrf54l15dk/Kconfig.defconfig @@ -1,7 +1,8 @@ # Copyright (c) 2024 Nordic Semiconductor ASA # SPDX-License-Identifier: Apache-2.0 -if BOARD_NRF54L15DK_NRF54L15_CPUAPP +if BOARD_NRF54L15DK_NRF54L05_CPUAPP || BOARD_NRF54L15DK_NRF54L10_CPUAPP || \ + BOARD_NRF54L15DK_NRF54L15_CPUAPP config BT_CTLR default BT @@ -9,4 +10,5 @@ config BT_CTLR config ROM_START_OFFSET default 0x800 if BOOTLOADER_MCUBOOT -endif # BOARD_NRF54L15DK_NRF54L15_CPUAPP +endif # BOARD_NRF54L15DK_NRF54L05_CPUAPP || BOARD_NRF54L15DK_NRF54L10_CPUAPP || \ + # BOARD_NRF54L15DK_NRF54L15_CPUAPP diff --git a/boards/nordic/nrf54l15dk/Kconfig.nrf54l15dk b/boards/nordic/nrf54l15dk/Kconfig.nrf54l15dk index e385ef84f8917a..25472cfff6c474 100644 --- a/boards/nordic/nrf54l15dk/Kconfig.nrf54l15dk +++ b/boards/nordic/nrf54l15dk/Kconfig.nrf54l15dk @@ -2,6 +2,8 @@ # SPDX-License-Identifier: Apache-2.0 config BOARD_NRF54L15DK + select SOC_NRF54L05_CPUAPP if BOARD_NRF54L15DK_NRF54L05_CPUAPP + select SOC_NRF54L10_CPUAPP if BOARD_NRF54L15DK_NRF54L10_CPUAPP select SOC_NRF54L15_CPUAPP if BOARD_NRF54L15DK_NRF54L15_CPUAPP select SOC_NRF54L15_CPUFLPR if BOARD_NRF54L15DK_NRF54L15_CPUFLPR || \ BOARD_NRF54L15DK_NRF54L15_CPUFLPR_XIP diff --git a/boards/nordic/nrf54l15dk/board.cmake b/boards/nordic/nrf54l15dk/board.cmake index 1fd92b7fcedcac..c69f8460c0a58a 100644 --- a/boards/nordic/nrf54l15dk/board.cmake +++ b/boards/nordic/nrf54l15dk/board.cmake @@ -1,9 +1,11 @@ # Copyright (c) 2024 Nordic Semiconductor ASA # SPDX-License-Identifier: Apache-2.0 -if(CONFIG_SOC_NRF54L15_CPUAPP) +if(CONFIG_SOC_NRF54L05_CPUAPP OR CONFIG_SOC_NRF54L10_CPUAPP OR + CONFIG_SOC_NRF54L15_CPUAPP) board_runner_args(jlink "--device=cortex-m33" "--speed=4000") -elseif(CONFIG_SOC_NRF54L15_CPUFLPR) +elseif(CONFIG_SOC_NRF54L05_CPUFLPR OR CONFIG_SOC_NRF54L10_CPUFLPR OR + CONFIG_SOC_NRF54L15_CPUFLPR) board_runner_args(jlink "--speed=4000") endif() diff --git a/boards/nordic/nrf54l15dk/board.yml b/boards/nordic/nrf54l15dk/board.yml index 8d750b3d14b9ec..f1a873cc35f42d 100644 --- a/boards/nordic/nrf54l15dk/board.yml +++ b/boards/nordic/nrf54l15dk/board.yml @@ -3,6 +3,8 @@ board: full_name: nRF54L15 DK vendor: nordic socs: + - name: nrf54l05 + - name: nrf54l10 - name: nrf54l15 variants: - name: xip diff --git a/boards/nordic/nrf54l15dk/nrf54l15dk_common.dtsi b/boards/nordic/nrf54l15dk/nrf54l15dk_common.dtsi index 02170276476afd..33cfebb55d6e68 100644 --- a/boards/nordic/nrf54l15dk/nrf54l15dk_common.dtsi +++ b/boards/nordic/nrf54l15dk/nrf54l15dk_common.dtsi @@ -4,7 +4,7 @@ * SPDX-License-Identifier: Apache-2.0 */ -#include "nrf54l15dk_nrf54l15-pinctrl.dtsi" +#include "nrf54l15dk_nrf54l_05_10_15-pinctrl.dtsi" / { leds { diff --git a/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l05_cpuapp.dts b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l05_cpuapp.dts new file mode 100644 index 00000000000000..e2215ce129491f --- /dev/null +++ b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l05_cpuapp.dts @@ -0,0 +1,63 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include +#include "nrf54l_05_10_15_cpuapp_common.dtsi" + +/ { + compatible = "nordic,nrf54l15dk_nrf54l05-cpuapp"; + model = "Nordic nRF54L15 DK nRF54L05 Application MCU"; + + chosen { + zephyr,code-partition = &slot0_partition; + zephyr,sram = &cpuapp_sram; + }; +}; + +/* FLPR not supported yet, give all SRAM and RRAM to the APP core */ +&cpuapp_sram { + reg = <0x20000000 DT_SIZE_K(96)>; + ranges = <0x0 0x20000000 DT_SIZE_K(96)>; +}; + +&cpuapp_rram { + reg = <0x0 DT_SIZE_K(500)>; +}; + +/* These partition sizes assume no FLPR area in RRAM */ +&cpuapp_rram { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + boot_partition: partition@0 { + label = "mcuboot"; + reg = <0x0 DT_SIZE_K(64)>; + }; + slot0_partition: partition@10000 { + label = "image-0"; + reg = <0x10000 DT_SIZE_K(100)>; + }; + slot0_ns_partition: partition@29000 { + label = "image-0-nonsecure"; + reg = <0x29000 DT_SIZE_K(100)>; + }; + slot1_partition: partition@42000 { + label = "image-1"; + reg = <0x42000 DT_SIZE_K(100)>; + }; + slot1_ns_partition: partition@5b000 { + label = "image-1-nonsecure"; + reg = <0x5b000 DT_SIZE_K(100)>; + }; + storage_partition: partition@74000 { + label = "storage"; + reg = <0x74000 DT_SIZE_K(36)>; + }; + }; +}; diff --git a/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l05_cpuapp.yaml b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l05_cpuapp.yaml new file mode 100644 index 00000000000000..0c451b19a2efd0 --- /dev/null +++ b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l05_cpuapp.yaml @@ -0,0 +1,24 @@ +# Copyright (c) 2024 Nordic Semiconductor ASA +# SPDX-License-Identifier: Apache-2.0 + +identifier: nrf54l15dk/nrf54l05/cpuapp +name: nRF54L15-DK-nRF54L05-Application +type: mcu +arch: arm +toolchain: + - gnuarmemb + - xtools + - zephyr +sysbuild: true +ram: 96 +flash: 100 +supported: + - adc + - counter + - gpio + - i2c + - pwm + - retained_mem + - spi + - watchdog + - i2s diff --git a/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l05_cpuapp_defconfig b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l05_cpuapp_defconfig new file mode 100644 index 00000000000000..02796a1361ef91 --- /dev/null +++ b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l05_cpuapp_defconfig @@ -0,0 +1,29 @@ +# Copyright (c) 2024 Nordic Semiconductor ASA +# SPDX-License-Identifier: Apache-2.0 + +# Enable UART driver +CONFIG_SERIAL=y + +# Enable console +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y + +# Enable GPIO +CONFIG_GPIO=y + +# Enable MPU +CONFIG_ARM_MPU=y + +# Enable hardware stack protection +CONFIG_HW_STACK_PROTECTION=y + +# MPU-based null-pointer dereferencing detection cannot +# be applied as the (0x0 - 0x400) is unmapped for this target. +CONFIG_NULL_POINTER_EXCEPTION_DETECTION_NONE=y + +# Enable Cache +CONFIG_CACHE_MANAGEMENT=y +CONFIG_EXTERNAL_CACHE=y + +# Start SYSCOUNTER on driver init +CONFIG_NRF_GRTC_START_SYSCOUNTER=y diff --git a/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l10_cpuapp.dts b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l10_cpuapp.dts new file mode 100644 index 00000000000000..1ae6be3e9e9c09 --- /dev/null +++ b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l10_cpuapp.dts @@ -0,0 +1,63 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include +#include "nrf54l_05_10_15_cpuapp_common.dtsi" + +/ { + compatible = "nordic,nrf54l15dk_nrf54l10-cpuapp"; + model = "Nordic nRF54L15 DK nRF54L10 Application MCU"; + + chosen { + zephyr,code-partition = &slot0_partition; + zephyr,sram = &cpuapp_sram; + }; +}; + +/* FLPR not supported yet, give all SRAM and RRAM to the APP core */ +&cpuapp_sram { + reg = <0x20000000 DT_SIZE_K(192)>; + ranges = <0x0 0x20000000 DT_SIZE_K(192)>; +}; + +&cpuapp_rram { + reg = <0x0 DT_SIZE_K(1022)>; +}; + +/* These partition sizes assume no FLPR area in RRAM */ +&cpuapp_rram { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + boot_partition: partition@0 { + label = "mcuboot"; + reg = <0x0 DT_SIZE_K(64)>; + }; + slot0_partition: partition@10000 { + label = "image-0"; + reg = <0x10000 DT_SIZE_K(230)>; + }; + slot0_ns_partition: partition@49800 { + label = "image-0-nonsecure"; + reg = <0x49800 DT_SIZE_K(230)>; + }; + slot1_partition: partition@83000 { + label = "image-1"; + reg = <0x83000 DT_SIZE_K(230)>; + }; + slot1_ns_partition: partition@bc800 { + label = "image-1-nonsecure"; + reg = <0xbc800 DT_SIZE_K(230)>; + }; + storage_partition: partition@f6000 { + label = "storage"; + reg = <0xf6000 DT_SIZE_K(38)>; + }; + }; +}; diff --git a/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l10_cpuapp.yaml b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l10_cpuapp.yaml new file mode 100644 index 00000000000000..63afb059b93610 --- /dev/null +++ b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l10_cpuapp.yaml @@ -0,0 +1,24 @@ +# Copyright (c) 2024 Nordic Semiconductor ASA +# SPDX-License-Identifier: Apache-2.0 + +identifier: nrf54l15dk/nrf54l10/cpuapp +name: nRF54L15-DK-nRF54L10-Application +type: mcu +arch: arm +toolchain: + - gnuarmemb + - xtools + - zephyr +sysbuild: true +ram: 192 +flash: 230 +supported: + - adc + - counter + - gpio + - i2c + - pwm + - retained_mem + - spi + - watchdog + - i2s diff --git a/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l10_cpuapp_defconfig b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l10_cpuapp_defconfig new file mode 100644 index 00000000000000..02796a1361ef91 --- /dev/null +++ b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l10_cpuapp_defconfig @@ -0,0 +1,29 @@ +# Copyright (c) 2024 Nordic Semiconductor ASA +# SPDX-License-Identifier: Apache-2.0 + +# Enable UART driver +CONFIG_SERIAL=y + +# Enable console +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y + +# Enable GPIO +CONFIG_GPIO=y + +# Enable MPU +CONFIG_ARM_MPU=y + +# Enable hardware stack protection +CONFIG_HW_STACK_PROTECTION=y + +# MPU-based null-pointer dereferencing detection cannot +# be applied as the (0x0 - 0x400) is unmapped for this target. +CONFIG_NULL_POINTER_EXCEPTION_DETECTION_NONE=y + +# Enable Cache +CONFIG_CACHE_MANAGEMENT=y +CONFIG_EXTERNAL_CACHE=y + +# Start SYSCOUNTER on driver init +CONFIG_NRF_GRTC_START_SYSCOUNTER=y diff --git a/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l15_cpuapp.dts b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l15_cpuapp.dts index b71f55c5fb439d..79b16bd41254eb 100644 --- a/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l15_cpuapp.dts +++ b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l15_cpuapp.dts @@ -6,7 +6,8 @@ /dts-v1/; -#include "nrf54l15_cpuapp_common.dtsi" +#include +#include "nrf54l_05_10_15_cpuapp_common.dtsi" / { compatible = "nordic,nrf54l15dk_nrf54l15-cpuapp"; @@ -17,3 +18,36 @@ zephyr,sram = &cpuapp_sram; }; }; + +&cpuapp_rram { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + boot_partition: partition@0 { + label = "mcuboot"; + reg = <0x0 DT_SIZE_K(64)>; + }; + slot0_partition: partition@10000 { + label = "image-0"; + reg = <0x10000 DT_SIZE_K(324)>; + }; + slot0_ns_partition: partition@61000 { + label = "image-0-nonsecure"; + reg = <0x61000 DT_SIZE_K(324)>; + }; + slot1_partition: partition@b2000 { + label = "image-1"; + reg = <0xb2000 DT_SIZE_K(324)>; + }; + slot1_ns_partition: partition@103000 { + label = "image-1-nonsecure"; + reg = <0x103000 DT_SIZE_K(324)>; + }; + /* 32k from 0x154000 to 0x15bfff reserved for TF-M partitions */ + storage_partition: partition@15c000 { + label = "storage"; + reg = <0x15c000 DT_SIZE_K(36)>; + }; + }; +}; diff --git a/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l15-pinctrl.dtsi b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l_05_10_15-pinctrl.dtsi similarity index 100% rename from boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l15-pinctrl.dtsi rename to boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l_05_10_15-pinctrl.dtsi diff --git a/boards/nordic/nrf54l15dk/nrf54l15_cpuapp_common.dtsi b/boards/nordic/nrf54l15dk/nrf54l_05_10_15_cpuapp_common.dtsi similarity index 70% rename from boards/nordic/nrf54l15dk/nrf54l15_cpuapp_common.dtsi rename to boards/nordic/nrf54l15dk/nrf54l_05_10_15_cpuapp_common.dtsi index f8714861936e4f..323ebfd1a1b7fa 100644 --- a/boards/nordic/nrf54l15dk/nrf54l15_cpuapp_common.dtsi +++ b/boards/nordic/nrf54l15dk/nrf54l_05_10_15_cpuapp_common.dtsi @@ -6,7 +6,6 @@ /* This file is common to the secure and non-secure domain */ -#include #include "nrf54l15dk_common.dtsi" / { @@ -52,39 +51,6 @@ status = "okay"; }; -&cpuapp_rram { - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - boot_partition: partition@0 { - label = "mcuboot"; - reg = <0x0 DT_SIZE_K(64)>; - }; - slot0_partition: partition@10000 { - label = "image-0"; - reg = <0x10000 DT_SIZE_K(324)>; - }; - slot0_ns_partition: partition@61000 { - label = "image-0-nonsecure"; - reg = <0x61000 DT_SIZE_K(324)>; - }; - slot1_partition: partition@b2000 { - label = "image-1"; - reg = <0xb2000 DT_SIZE_K(324)>; - }; - slot1_ns_partition: partition@103000 { - label = "image-1-nonsecure"; - reg = <0x103000 DT_SIZE_K(324)>; - }; - /* 32k from 0x154000 to 0x15bfff reserved for TF-M partitions */ - storage_partition: partition@15c000 { - label = "storage"; - reg = <0x15c000 DT_SIZE_K(36)>; - }; - }; -}; - &uart20 { status = "okay"; }; diff --git a/samples/drivers/watchdog/boards/nrf54l15dk_nrf54l05_cpuapp.overlay b/samples/drivers/watchdog/boards/nrf54l15dk_nrf54l05_cpuapp.overlay new file mode 100644 index 00000000000000..5c765a8a896331 --- /dev/null +++ b/samples/drivers/watchdog/boards/nrf54l15dk_nrf54l05_cpuapp.overlay @@ -0,0 +1,8 @@ +/* + * Copyright 2024 Nordic Semiconductor ASA + * SPDX-License-Identifier: Apache-2.0 + */ + +&wdt31 { + status = "okay"; +}; diff --git a/samples/drivers/watchdog/boards/nrf54l15dk_nrf54l10_cpuapp.overlay b/samples/drivers/watchdog/boards/nrf54l15dk_nrf54l10_cpuapp.overlay new file mode 100644 index 00000000000000..5c765a8a896331 --- /dev/null +++ b/samples/drivers/watchdog/boards/nrf54l15dk_nrf54l10_cpuapp.overlay @@ -0,0 +1,8 @@ +/* + * Copyright 2024 Nordic Semiconductor ASA + * SPDX-License-Identifier: Apache-2.0 + */ + +&wdt31 { + status = "okay"; +}; diff --git a/tests/drivers/adc/adc_api/boards/nrf54l15dk_nrf54l05_cpuapp.overlay b/tests/drivers/adc/adc_api/boards/nrf54l15dk_nrf54l05_cpuapp.overlay new file mode 100644 index 00000000000000..87707847eeab20 --- /dev/null +++ b/tests/drivers/adc/adc_api/boards/nrf54l15dk_nrf54l05_cpuapp.overlay @@ -0,0 +1,43 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2024 Nordic Semiconductor ASA + */ + +/ { + zephyr,user { + io-channels = <&adc 0>, <&adc 1> , <&adc 2>; + }; +}; + +&adc { + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { + reg = <0>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,input-positive = ; + zephyr,resolution = <10>; + }; + + channel@1 { + reg = <1>; + zephyr,gain = "ADC_GAIN_1_4"; + zephyr,reference = "ADC_REF_EXTERNAL0"; + zephyr,acquisition-time = ; + zephyr,input-positive = ; + zephyr,resolution = <12>; + }; + + channel@2 { + reg = <2>; + zephyr,gain = "ADC_GAIN_2_3"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,input-positive = ; + zephyr,resolution = <10>; + }; +}; diff --git a/tests/drivers/adc/adc_api/boards/nrf54l15dk_nrf54l10_cpuapp.overlay b/tests/drivers/adc/adc_api/boards/nrf54l15dk_nrf54l10_cpuapp.overlay new file mode 100644 index 00000000000000..87707847eeab20 --- /dev/null +++ b/tests/drivers/adc/adc_api/boards/nrf54l15dk_nrf54l10_cpuapp.overlay @@ -0,0 +1,43 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2024 Nordic Semiconductor ASA + */ + +/ { + zephyr,user { + io-channels = <&adc 0>, <&adc 1> , <&adc 2>; + }; +}; + +&adc { + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { + reg = <0>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,input-positive = ; + zephyr,resolution = <10>; + }; + + channel@1 { + reg = <1>; + zephyr,gain = "ADC_GAIN_1_4"; + zephyr,reference = "ADC_REF_EXTERNAL0"; + zephyr,acquisition-time = ; + zephyr,input-positive = ; + zephyr,resolution = <12>; + }; + + channel@2 { + reg = <2>; + zephyr,gain = "ADC_GAIN_2_3"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,input-positive = ; + zephyr,resolution = <10>; + }; +}; diff --git a/tests/drivers/watchdog/wdt_basic_api/boards/nrf54l15dk_nrf54l05_cpuapp.overlay b/tests/drivers/watchdog/wdt_basic_api/boards/nrf54l15dk_nrf54l05_cpuapp.overlay new file mode 100644 index 00000000000000..8d3dce3b380057 --- /dev/null +++ b/tests/drivers/watchdog/wdt_basic_api/boards/nrf54l15dk_nrf54l05_cpuapp.overlay @@ -0,0 +1,9 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +&wdt31 { + status = "okay"; +}; diff --git a/tests/drivers/watchdog/wdt_basic_api/boards/nrf54l15dk_nrf54l10_cpuapp.overlay b/tests/drivers/watchdog/wdt_basic_api/boards/nrf54l15dk_nrf54l10_cpuapp.overlay new file mode 100644 index 00000000000000..8d3dce3b380057 --- /dev/null +++ b/tests/drivers/watchdog/wdt_basic_api/boards/nrf54l15dk_nrf54l10_cpuapp.overlay @@ -0,0 +1,9 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +&wdt31 { + status = "okay"; +}; diff --git a/tests/lib/cpp/cxx/testcase.yaml b/tests/lib/cpp/cxx/testcase.yaml index 06bbcfd5baefb8..e9fc90855c4c89 100644 --- a/tests/lib/cpp/cxx/testcase.yaml +++ b/tests/lib/cpp/cxx/testcase.yaml @@ -34,9 +34,11 @@ tests: # -std=c++98) cpp.main.cpp98: arch_exclude: posix - # Exclude nRF54L15, nRF54H20 and nRF9280 as Nordic HAL is not compatible with C++98. + # Exclude nRF54L series, nRF54H20 and nRF9280 as Nordic HAL is not compatible with C++98. # Exclude CONFIG_HAS_RENESAS_RA_FSP as Renesas RA HAL is not compatible with C++98. platform_exclude: + - nrf54l15dk/nrf54l05/cpuapp + - nrf54l15dk/nrf54l10/cpuapp - nrf54l15dk/nrf54l15/cpuapp - nrf54l20pdk/nrf54l20/cpuapp - nrf54h20dk/nrf54h20/cpuapp