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There is community interest to add support for Bouffalolab SoCs in Zephyr. This RFC was opened to serve as an umbrella to help community and Zephyr members know the initiatives.
Problem description
There is a pull request for the initial support: #78795 .
Work is ongoing for more.
Proposed changes
Give an overview about all pieces required to add Bouffalolab SoCs in Zephyr.
Detailed RFC
In this section of the document the target audience is the dev team. Upon reading this section each engineer should have a rather clear picture of what needs to be done in order to implement the described feature.
Vendor Documentation and SDK
Bouffalolab provides a open source SDK which can be used for reference, especially for peripherals for which the documentation is incomplete or absent.
There is some significant amount of documentation available in https://github.com/bouffalolab/bl_docs .
HAL
There is no HAL per se for Bouffalolab devices, the only materials from the vendor that are directly used are the headers providing peripheral register lists. These headers are Apache 2 and we are awaiting Bouffalolab confirmation for their usage in a zephyr HAL repository.
CPUs
Bouffalolab SoCs use various CPU designs: from SiFive (SiFive E24 on BL60x, BL70x and BL70xL), and from Xuantie T-HEAD (E907 on BL61x, and C906, E907, E902 on BL808 and BL606P).
SiFive E24 Reference Manual is available from sources such as starfive or alibaba. Xuantie CPUs reference manuals are available directly on Xuantie's website after registration.
Caches
Xuantie CPUs provide instruction caches and branch prediction, configured via the XTHeadCMO RISCV extension and various CSR.
The SiFive E24 used in BL60x and BL70x do not provide a cache, but Bouffalolab uses a peripheral, called L1C (Level 1 Cache) to use part of the ITCM from E24 as a fast instruction cache.
BL60x, BL70x, and BL61x rely heavily on these caching mechanisms due to slow flash, with 16KB to 48KB dedicated to instruction caching on the fastest memory in the device, it is recommended to pay close attention to it.
Examples of using those mechanisms and their pitfalls within zephyr are available in the initialization code, the flash driver, and the BL61x USB driver. It is very critical in drivers interacting with the flash or DMA.
Availability for developers
Devboards and modules for BL60x and BL61x are easily available from AI-Thinker, Pine64, and Sipeed via typical channels (Amazon, Aliexpress, LCSC...).
Devboards and modules for BL70x are sometimes available from XT/DOIT. Some noname boards are also available. It is also embbeded in some Sipeed products, such as the RV-debugger.
Devboards and modules for BL808 are available from Sipeed and Pine64.
BL606P is so far only available in the Pine64 PineVox.
TG7100C is a alternative packaging of BL602, available from AI-Thinker via typical channels.
Xiaomi offers modules for BL616 and BL602 at https://iot.mi.com/moduleBrowser.html
Qualcomm offers BL61x as QCC74x.
Peripherals Drivers
Most peripherals are either the same or very similar between SoCs. It is recommended to implement drivers in a way that make them usable for all SoCs.
CPU support
BL60x, BL70x, and BL61x can use riscv-privileged arch in CLIC vectored mode, and so all the basic features are supported out the box by Zephyr once the right settings are set.
Introduction
There is community interest to add support for Bouffalolab SoCs in Zephyr. This RFC was opened to serve as an umbrella to help community and Zephyr members know the initiatives.
Problem description
There is a pull request for the initial support: #78795 .
Work is ongoing for more.
Proposed changes
Give an overview about all pieces required to add Bouffalolab SoCs in Zephyr.
Detailed RFC
In this section of the document the target audience is the dev team. Upon reading this section each engineer should have a rather clear picture of what needs to be done in order to implement the described feature.
Vendor Documentation and SDK
Bouffalolab provides a open source SDK which can be used for reference, especially for peripherals for which the documentation is incomplete or absent.
There is some significant amount of documentation available in https://github.com/bouffalolab/bl_docs .
HAL
There is no HAL per se for Bouffalolab devices, the only materials from the vendor that are directly used are the headers providing peripheral register lists. These headers are Apache 2 and we are awaiting Bouffalolab confirmation for their usage in a zephyr HAL repository.
CPUs
Bouffalolab SoCs use various CPU designs: from SiFive (SiFive E24 on BL60x, BL70x and BL70xL), and from Xuantie T-HEAD (E907 on BL61x, and C906, E907, E902 on BL808 and BL606P).
SiFive E24 Reference Manual is available from sources such as starfive or alibaba. Xuantie CPUs reference manuals are available directly on Xuantie's website after registration.
Caches
Xuantie CPUs provide instruction caches and branch prediction, configured via the XTHeadCMO RISCV extension and various CSR.
The SiFive E24 used in BL60x and BL70x do not provide a cache, but Bouffalolab uses a peripheral, called L1C (Level 1 Cache) to use part of the ITCM from E24 as a fast instruction cache.
BL60x, BL70x, and BL61x rely heavily on these caching mechanisms due to slow flash, with 16KB to 48KB dedicated to instruction caching on the fastest memory in the device, it is recommended to pay close attention to it.
Examples of using those mechanisms and their pitfalls within zephyr are available in the initialization code, the flash driver, and the BL61x USB driver. It is very critical in drivers interacting with the flash or DMA.
Availability for developers
Devboards and modules for BL60x and BL61x are easily available from AI-Thinker, Pine64, and Sipeed via typical channels (Amazon, Aliexpress, LCSC...).
Devboards and modules for BL70x are sometimes available from XT/DOIT. Some noname boards are also available. It is also embbeded in some Sipeed products, such as the RV-debugger.
Devboards and modules for BL808 are available from Sipeed and Pine64.
BL606P is so far only available in the Pine64 PineVox.
TG7100C is a alternative packaging of BL602, available from AI-Thinker via typical channels.
Xiaomi offers modules for BL616 and BL602 at https://iot.mi.com/moduleBrowser.html
Qualcomm offers BL61x as QCC74x.
Peripherals Drivers
Most peripherals are either the same or very similar between SoCs. It is recommended to implement drivers in a way that make them usable for all SoCs.
Task List
Essentials
Essentials are understood to be:
BL60x, BL70x, and BL61x can use riscv-privileged arch in CLIC vectored mode, and so all the basic features are supported out the box by Zephyr once the right settings are set.
The initial support will be submitted in a series:
Future
SoCs
Introduce Bouffalo Lab SoC's #78795
Complete: https://github.com/VynDragon/zephyr/tree/bflb_upstreaming_efuse
Mostly Complete (no AUPLL init): https://github.com/VynDragon/zephyr/tree/bflb/bl61x
https://github.com/VynDragon/zephyr/tree/bflb/bl61x_usb
Boards
Introduce Bouffalo Lab SoC's #78795
Drivers
Drivers are 'complete' if they support all currently complete SoCs.
Complete in: https://github.com/VynDragon/zephyr/tree/bflb/bl61x
https://github.com/VynDragon/zephyr/tree/bflb/bl61x but for BL61x
Complete in: https://github.com/VynDragon/zephyr/tree/bflb/bl61x
Complete in: https://github.com/VynDragon/zephyr/tree/bflb/bl61x
Complete in: https://github.com/VynDragon/zephyr/tree/bflb/bl61x
Work Started in: https://github.com/VynDragon/zephyr/tree/bflb/bl61x_usb
Complete in: https://github.com/VynDragon/zephyr/tree/bflb/bl61x
Complete in: https://github.com/VynDragon/zephyr/tree/bflb/bl61x_usb
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